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6#include <common.h>
7#include <asm/io.h>
8#include <asm/types.h>
9#include <malloc.h>
10#include <net.h>
11#include <linux/compat.h>
12#include <asm/arch/fsl_serdes.h>
13#include <fsl-mc/ldpaa_wriop.h>
14
15struct wriop_dpmac_info dpmac_info[NUM_WRIOP_PORTS];
16
17__weak phy_interface_t wriop_dpmac_enet_if(int dpmac_id, int lane_prtc)
18{
19 return PHY_INTERFACE_MODE_NONE;
20}
21
22void wriop_init_dpmac(int sd, int dpmac_id, int lane_prtcl)
23{
24 phy_interface_t enet_if;
25 int phy_num;
26
27 dpmac_info[dpmac_id].enabled = 0;
28 dpmac_info[dpmac_id].id = 0;
29 dpmac_info[dpmac_id].enet_if = PHY_INTERFACE_MODE_NONE;
30
31 enet_if = wriop_dpmac_enet_if(dpmac_id, lane_prtcl);
32 if (enet_if != PHY_INTERFACE_MODE_NONE) {
33 dpmac_info[dpmac_id].enabled = 1;
34 dpmac_info[dpmac_id].id = dpmac_id;
35 dpmac_info[dpmac_id].enet_if = enet_if;
36 }
37 for (phy_num = 0; phy_num < WRIOP_MAX_PHY_NUM; phy_num++) {
38 dpmac_info[dpmac_id].phydev[phy_num] = NULL;
39 dpmac_info[dpmac_id].phy_addr[phy_num] = -1;
40 }
41}
42
43void wriop_init_dpmac_enet_if(int dpmac_id, phy_interface_t enet_if)
44{
45 int phy_num;
46
47 dpmac_info[dpmac_id].enabled = 1;
48 dpmac_info[dpmac_id].id = dpmac_id;
49 dpmac_info[dpmac_id].enet_if = enet_if;
50 for (phy_num = 0; phy_num < WRIOP_MAX_PHY_NUM; phy_num++) {
51 dpmac_info[dpmac_id].phydev[phy_num] = NULL;
52 dpmac_info[dpmac_id].phy_addr[phy_num] = -1;
53 }
54}
55
56
57
58static int wriop_dpmac_to_index(int dpmac_id)
59{
60 int i;
61
62 for (i = WRIOP1_DPMAC1; i < NUM_WRIOP_PORTS; i++) {
63 if (dpmac_info[i].id == dpmac_id)
64 return i;
65 }
66
67 return -1;
68}
69
70int wriop_disable_dpmac(int dpmac_id)
71{
72 int i = wriop_dpmac_to_index(dpmac_id);
73
74 if (i == -1)
75 return -ENODEV;
76
77 dpmac_info[i].enabled = 0;
78 wriop_dpmac_disable(dpmac_id);
79
80 return 0;
81}
82
83int wriop_enable_dpmac(int dpmac_id)
84{
85 int i = wriop_dpmac_to_index(dpmac_id);
86
87 if (i == -1)
88 return -ENODEV;
89
90 dpmac_info[i].enabled = 1;
91 wriop_dpmac_enable(dpmac_id);
92
93 return 0;
94}
95
96int wriop_is_enabled_dpmac(int dpmac_id)
97{
98 int i = wriop_dpmac_to_index(dpmac_id);
99
100 if (i == -1)
101 return -ENODEV;
102
103 return dpmac_info[i].enabled;
104}
105
106
107int wriop_set_mdio(int dpmac_id, struct mii_dev *bus)
108{
109 int i = wriop_dpmac_to_index(dpmac_id);
110
111 if (i == -1)
112 return -ENODEV;
113
114 dpmac_info[i].bus = bus;
115
116 return 0;
117}
118
119struct mii_dev *wriop_get_mdio(int dpmac_id)
120{
121 int i = wriop_dpmac_to_index(dpmac_id);
122
123 if (i == -1)
124 return NULL;
125
126 return dpmac_info[i].bus;
127}
128
129int wriop_set_phy_address(int dpmac_id, int phy_num, int address)
130{
131 int i = wriop_dpmac_to_index(dpmac_id);
132
133 if (i == -1)
134 return -ENODEV;
135 if (phy_num < 0 || phy_num >= WRIOP_MAX_PHY_NUM)
136 return -EINVAL;
137
138 dpmac_info[i].phy_addr[phy_num] = address;
139
140 return 0;
141}
142
143int wriop_get_phy_address(int dpmac_id, int phy_num)
144{
145 int i = wriop_dpmac_to_index(dpmac_id);
146
147 if (i == -1)
148 return -ENODEV;
149 if (phy_num < 0 || phy_num >= WRIOP_MAX_PHY_NUM)
150 return -EINVAL;
151
152 return dpmac_info[i].phy_addr[phy_num];
153}
154
155int wriop_set_phy_dev(int dpmac_id, int phy_num, struct phy_device *phydev)
156{
157 int i = wriop_dpmac_to_index(dpmac_id);
158
159 if (i == -1)
160 return -ENODEV;
161 if (phy_num < 0 || phy_num >= WRIOP_MAX_PHY_NUM)
162 return -EINVAL;
163
164 dpmac_info[i].phydev[phy_num] = phydev;
165
166 return 0;
167}
168
169struct phy_device *wriop_get_phy_dev(int dpmac_id, int phy_num)
170{
171 int i = wriop_dpmac_to_index(dpmac_id);
172
173 if (i == -1)
174 return NULL;
175 if (phy_num < 0 || phy_num >= WRIOP_MAX_PHY_NUM)
176 return NULL;
177
178 return dpmac_info[i].phydev[phy_num];
179}
180
181phy_interface_t wriop_get_enet_if(int dpmac_id)
182{
183 int i = wriop_dpmac_to_index(dpmac_id);
184
185 if (i == -1)
186 return PHY_INTERFACE_MODE_NONE;
187
188 if (dpmac_info[i].enabled)
189 return dpmac_info[i].enet_if;
190
191 return PHY_INTERFACE_MODE_NONE;
192}
193
