1/* SPDX-License-Identifier: GPL-2.0+ */ 2/* 3 * Copyright (C) 2009 Sergey Kubushyn <ksi@koi8.net> 4 * Copyright (C) 2009 - 2013 Heiko Schocher <hs@denx.de> 5 * Changes for multibus/multiadapter I2C support. 6 * 7 * (C) Copyright 2001 8 * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com. 9 * 10 * The original I2C interface was 11 * (C) 2000 by Paolo Scaffardi (arsenio@tin.it) 12 * AIRVENT SAM s.p.a - RIMINI(ITALY) 13 * but has been changed substantially. 14 */ 15 16#ifndef _I2C_H_ 17#define _I2C_H_ 18 19/* 20 * For now there are essentially two parts to this file - driver model 21 * here at the top, and the older code below (with CONFIG_SYS_I2C being 22 * most recent). The plan is to migrate everything to driver model. 23 * The driver model structures and API are separate as they are different 24 * enough as to be incompatible for compilation purposes. 25 */ 26 27enum dm_i2c_chip_flags { 28 DM_I2C_CHIP_10BIT = 1 << 0, /* Use 10-bit addressing */ 29 DM_I2C_CHIP_RD_ADDRESS = 1 << 1, /* Send address for each read byte */ 30 DM_I2C_CHIP_WR_ADDRESS = 1 << 2, /* Send address for each write byte */ 31}; 32 33struct udevice; 34/** 35 * struct dm_i2c_chip - information about an i2c chip 36 * 37 * An I2C chip is a device on the I2C bus. It sits at a particular address 38 * and normally supports 7-bit or 10-bit addressing. 39 * 40 * To obtain this structure, use dev_get_parent_platdata(dev) where dev is 41 * the chip to examine. 42 * 43 * @chip_addr: Chip address on bus 44 * @offset_len: Length of offset in bytes. A single byte offset can 45 * represent up to 256 bytes. A value larger than 1 may be 46 * needed for larger devices. 47 * @flags: Flags for this chip (dm_i2c_chip_flags) 48 * @emul: Emulator for this chip address (only used for emulation) 49 */ 50struct dm_i2c_chip { 51 uint chip_addr; 52 uint offset_len; 53 uint flags; 54#ifdef CONFIG_SANDBOX 55 struct udevice *emul; 56 bool test_mode; 57#endif 58}; 59 60/** 61 * struct dm_i2c_bus- information about an i2c bus 62 * 63 * An I2C bus contains 0 or more chips on it, each at its own address. The 64 * bus can operate at different speeds (measured in Hz, typically 100KHz 65 * or 400KHz). 66 * 67 * To obtain this structure, use dev_get_uclass_priv(bus) where bus is the 68 * I2C bus udevice. 69 * 70 * @speed_hz: Bus speed in hertz (typically 100000) 71 * @max_transaction_bytes: Maximal size of single I2C transfer 72 */ 73struct dm_i2c_bus { 74 int speed_hz; 75 int max_transaction_bytes; 76}; 77 78/* 79 * Not all of these flags are implemented in the U-Boot API 80 */ 81enum dm_i2c_msg_flags { 82 I2C_M_TEN = 0x0010, /* ten-bit chip address */ 83 I2C_M_RD = 0x0001, /* read data, from slave to master */ 84 I2C_M_STOP = 0x8000, /* send stop after this message */ 85 I2C_M_NOSTART = 0x4000, /* no start before this message */ 86 I2C_M_REV_DIR_ADDR = 0x2000, /* invert polarity of R/W bit */ 87 I2C_M_IGNORE_NAK = 0x1000, /* continue after NAK */ 88 I2C_M_NO_RD_ACK = 0x0800, /* skip the Ack bit on reads */ 89 I2C_M_RECV_LEN = 0x0400, /* length is first received byte */ 90}; 91 92/** 93 * struct i2c_msg - an I2C message 94 * 95 * @addr: Slave address 96 * @flags: Flags (see enum dm_i2c_msg_flags) 97 * @len: Length of buffer in bytes, may be 0 for a probe 98 * @buf: Buffer to send/receive, or NULL if no data 99 */ 100struct i2c_msg { 101 uint addr; 102 uint flags; 103 uint len; 104 u8 *buf; 105}; 106 107/** 108 * struct i2c_msg_list - a list of I2C messages 109 * 110 * This is called i2c_rdwr_ioctl_data in Linux but the name does not seem 111 * appropriate in U-Boot. 112 * 113 * @msg: Pointer to i2c_msg array 114 * @nmsgs: Number of elements in the array 115 */ 116struct i2c_msg_list { 117 struct i2c_msg *msgs; 118 uint nmsgs; 119}; 120 121/** 122 * dm_i2c_read() - read bytes from an I2C chip 123 * 124 * To obtain an I2C device (called a 'chip') given the I2C bus address you 125 * can use i2c_get_chip(). To obtain a bus by bus number use 126 * uclass_get_device_by_seq(UCLASS_I2C, <bus number>). 127 * 128 * To set the address length of a devce use i2c_set_addr_len(). It 129 * defaults to 1. 130 * 131 * @dev: Chip to read from 132 * @offset: Offset within chip to start reading 133 * @buffer: Place to put data 134 * @len: Number of bytes to read 135 * 136 * @return 0 on success, -ve on failure 137 */ 138int dm_i2c_read(struct udevice *dev, uint offset, uint8_t *buffer, int len); 139 140/** 141 * dm_i2c_write() - write bytes to an I2C chip 142 * 143 * See notes for dm_i2c_read() above. 144 * 145 * @dev: Chip to write to 146 * @offset: Offset within chip to start writing 147 * @buffer: Buffer containing data to write 148 * @len: Number of bytes to write 149 * 150 * @return 0 on success, -ve on failure 151 */ 152int dm_i2c_write(struct udevice *dev, uint offset, const uint8_t *buffer, 153 int len); 154 155/** 156 * dm_i2c_probe() - probe a particular chip address 157 * 158 * This can be useful to check for the existence of a chip on the bus. 159 * It is typically implemented by writing the chip address to the bus 160 * and checking that the chip replies with an ACK. 161 * 162 * @bus: Bus to probe 163 * @chip_addr: 7-bit address to probe (10-bit and others are not supported) 164 * @chip_flags: Flags for the probe (see enum dm_i2c_chip_flags) 165 * @devp: Returns the device found, or NULL if none 166 * @return 0 if a chip was found at that address, -ve if not 167 */ 168int dm_i2c_probe(struct udevice *bus, uint chip_addr, uint chip_flags, 169 struct udevice **devp); 170 171/** 172 * dm_i2c_reg_read() - Read a value from an I2C register 173 * 174 * This reads a single value from the given address in an I2C chip 175 * 176 * @dev: Device to use for transfer 177 * @addr: Address to read from 178 * @return value read, or -ve on error 179 */ 180int dm_i2c_reg_read(struct udevice *dev, uint offset); 181 182/** 183 * dm_i2c_reg_write() - Write a value to an I2C register 184 * 185 * This writes a single value to the given address in an I2C chip 186 * 187 * @dev: Device to use for transfer 188 * @addr: Address to write to 189 * @val: Value to write (normally a byte) 190 * @return 0 on success, -ve on error 191 */ 192int dm_i2c_reg_write(struct udevice *dev, uint offset, unsigned int val); 193 194/** 195 * dm_i2c_xfer() - Transfer messages over I2C 196 * 197 * This transfers a raw message. It is best to use dm_i2c_reg_read/write() 198 * instead. 199 * 200 * @dev: Device to use for transfer 201 * @msg: List of messages to transfer 202 * @nmsgs: Number of messages to transfer 203 * @return 0 on success, -ve on error 204 */ 205int dm_i2c_xfer(struct udevice *dev, struct i2c_msg *msg, int nmsgs); 206 207/** 208 * dm_i2c_set_bus_speed() - set the speed of a bus 209 * 210 * @bus: Bus to adjust 211 * @speed: Requested speed in Hz 212 * @return 0 if OK, -EINVAL for invalid values 213 */ 214int dm_i2c_set_bus_speed(struct udevice *bus, unsigned int speed); 215 216/** 217 * dm_i2c_get_bus_speed() - get the speed of a bus 218 * 219 * @bus: Bus to check 220 * @return speed of selected I2C bus in Hz, -ve on error 221 */ 222int dm_i2c_get_bus_speed(struct udevice *bus); 223 224/** 225 * i2c_set_chip_flags() - set flags for a chip 226 * 227 * Typically addresses are 7 bits, but for 10-bit addresses you should set 228 * flags to DM_I2C_CHIP_10BIT. All accesses will then use 10-bit addressing. 229 * 230 * @dev: Chip to adjust 231 * @flags: New flags 232 * @return 0 if OK, -EINVAL if value is unsupported, other -ve value on error 233 */ 234int i2c_set_chip_flags(struct udevice *dev, uint flags); 235 236/** 237 * i2c_get_chip_flags() - get flags for a chip 238 * 239 * @dev: Chip to check 240 * @flagsp: Place to put flags 241 * @return 0 if OK, other -ve value on error 242 */ 243int i2c_get_chip_flags(struct udevice *dev, uint *flagsp); 244 245/** 246 * i2c_set_offset_len() - set the offset length for a chip 247 * 248 * The offset used to access a chip may be up to 4 bytes long. Typically it 249 * is only 1 byte, which is enough for chips with 256 bytes of memory or 250 * registers. The default value is 1, but you can call this function to 251 * change it. 252 * 253 * @offset_len: New offset length value (typically 1 or 2) 254 */ 255int i2c_set_chip_offset_len(struct udevice *dev, uint offset_len); 256 257/** 258 * i2c_get_offset_len() - get the offset length for a chip 259 * 260 * @return: Current offset length value (typically 1 or 2) 261 */ 262int i2c_get_chip_offset_len(struct udevice *dev); 263 264/** 265 * i2c_deblock() - recover a bus that is in an unknown state 266 * 267 * See the deblock() method in 'struct dm_i2c_ops' for full information 268 * 269 * @bus: Bus to recover 270 * @return 0 if OK, -ve on error 271 */ 272int i2c_deblock(struct udevice *bus); 273 274#ifdef CONFIG_DM_I2C_COMPAT 275/** 276 * i2c_probe() - Compatibility function for driver model 277 * 278 * Calls dm_i2c_probe() on the current bus 279 */ 280int i2c_probe(uint8_t chip_addr); 281 282/** 283 * i2c_read() - Compatibility function for driver model 284 * 285 * Calls dm_i2c_read() with the device corresponding to @chip_addr, and offset 286 * set to @addr. @alen must match the current setting for the device. 287 */ 288int i2c_read(uint8_t chip_addr, unsigned int addr, int alen, uint8_t *buffer, 289 int len); 290 291/** 292 * i2c_write() - Compatibility function for driver model 293 * 294 * Calls dm_i2c_write() with the device corresponding to @chip_addr, and offset 295 * set to @addr. @alen must match the current setting for the device. 296 */ 297int i2c_write(uint8_t chip_addr, unsigned int addr, int alen, uint8_t *buffer, 298 int len); 299 300/** 301 * i2c_get_bus_num_fdt() - Compatibility function for driver model 302 * 303 * @return the bus number associated with the given device tree node 304 */ 305int i2c_get_bus_num_fdt(int node); 306 307/** 308 * i2c_get_bus_num() - Compatibility function for driver model 309 * 310 * @return the 'current' bus number 311 */ 312unsigned int i2c_get_bus_num(void); 313 314/** 315 * i2c_set_bus_num() - Compatibility function for driver model 316 * 317 * Sets the 'current' bus 318 */ 319int i2c_set_bus_num(unsigned int bus); 320 321static inline void I2C_SET_BUS(unsigned int bus) 322{ 323 i2c_set_bus_num(bus); 324} 325 326static inline unsigned int I2C_GET_BUS(void) 327{ 328 return i2c_get_bus_num(); 329} 330 331/** 332 * i2c_init() - Compatibility function for driver model 333 * 334 * This function does nothing. 335 */ 336void i2c_init(int speed, int slaveaddr); 337 338/** 339 * board_i2c_init() - Compatibility function for driver model 340 * 341 * @param blob Device tree blbo 342 * @return the number of I2C bus 343 */ 344void board_i2c_init(const void *blob); 345 346/* 347 * Compatibility functions for driver model. 348 */ 349uint8_t i2c_reg_read(uint8_t addr, uint8_t reg); 350void i2c_reg_write(uint8_t addr, uint8_t reg, uint8_t val); 351 352#endif 353 354/** 355 * struct dm_i2c_ops - driver operations for I2C uclass 356 * 357 * Drivers should support these operations unless otherwise noted. These 358 * operations are intended to be used by uclass code, not directly from 359 * other code. 360 */ 361struct dm_i2c_ops { 362 /** 363 * xfer() - transfer a list of I2C messages 364 * 365 * @bus: Bus to read from 366 * @msg: List of messages to transfer 367 * @nmsgs: Number of messages in the list 368 * @return 0 if OK, -EREMOTEIO if the slave did not ACK a byte, 369 * -ECOMM if the speed cannot be supported, -EPROTO if the chip 370 * flags cannot be supported, other -ve value on some other error 371 */ 372 int (*xfer)(struct udevice *bus, struct i2c_msg *msg, int nmsgs); 373 374 /** 375 * probe_chip() - probe for the presense of a chip address 376 * 377 * This function is optional. If omitted, the uclass will send a zero 378 * length message instead. 379 * 380 * @bus: Bus to probe 381 * @chip_addr: Chip address to probe 382 * @chip_flags: Probe flags (enum dm_i2c_chip_flags) 383 * @return 0 if chip was found, -EREMOTEIO if not, -ENOSYS to fall back 384 * to default probem other -ve value on error 385 */ 386 int (*probe_chip)(struct udevice *bus, uint chip_addr, uint chip_flags); 387 388 /** 389 * set_bus_speed() - set the speed of a bus (optional) 390 * 391 * The bus speed value will be updated by the uclass if this function 392 * does not return an error. This method is optional - if it is not 393 * provided then the driver can read the speed from 394 * dev_get_uclass_priv(bus)->speed_hz 395 * 396 * @bus: Bus to adjust 397 * @speed: Requested speed in Hz 398 * @return 0 if OK, -EINVAL for invalid values 399 */ 400 int (*set_bus_speed)(struct udevice *bus, unsigned int speed); 401 402 /** 403 * get_bus_speed() - get the speed of a bus (optional) 404 * 405 * Normally this can be provided by the uclass, but if you want your 406 * driver to check the bus speed by looking at the hardware, you can 407 * implement that here. This method is optional. This method would 408 * normally be expected to return dev_get_uclass_priv(bus)->speed_hz. 409 * 410 * @bus: Bus to check 411 * @return speed of selected I2C bus in Hz, -ve on error 412 */ 413 int (*get_bus_speed)(struct udevice *bus); 414 415 /** 416 * set_flags() - set the flags for a chip (optional) 417 * 418 * This is generally implemented by the uclass, but drivers can 419 * check the value to ensure that unsupported options are not used. 420 * This method is optional. If provided, this method will always be 421 * called when the flags change. 422 * 423 * @dev: Chip to adjust 424 * @flags: New flags value 425 * @return 0 if OK, -EINVAL if value is unsupported 426 */ 427 int (*set_flags)(struct udevice *dev, uint flags); 428 429 /** 430 * deblock() - recover a bus that is in an unknown state 431 * 432 * I2C is a synchronous protocol and resets of the processor in the 433 * middle of an access can block the I2C Bus until a powerdown of 434 * the full unit is done. This is because slaves can be stuck 435 * waiting for addition bus transitions for a transaction that will 436 * never complete. Resetting the I2C master does not help. The only 437 * way is to force the bus through a series of transitions to make 438 * sure that all slaves are done with the transaction. This method 439 * performs this 'deblocking' if support by the driver. 440 * 441 * This method is optional. 442 */ 443 int (*deblock)(struct udevice *bus); 444}; 445 446#define i2c_get_ops(dev) ((struct dm_i2c_ops *)(dev)->driver->ops) 447 448/** 449 * struct i2c_mux_ops - operations for an I2C mux 450 * 451 * The current mux state is expected to be stored in the mux itself since 452 * it is the only thing that knows how to make things work. The mux can 453 * record the current state and then avoid switching unless it is necessary. 454 * So select() can be skipped if the mux is already in the correct state. 455 * Also deselect() can be made a nop if required. 456 */ 457struct i2c_mux_ops { 458 /** 459 * select() - select one of of I2C buses attached to a mux 460 * 461 * This will be called when there is no bus currently selected by the 462 * mux. This method does not need to deselect the old bus since 463 * deselect() will be already have been called if necessary. 464 * 465 * @mux: Mux device 466 * @bus: I2C bus to select 467 * @channel: Channel number correponding to the bus to select 468 * @return 0 if OK, -ve on error 469 */ 470 int (*select)(struct udevice *mux, struct udevice *bus, uint channel); 471 472 /** 473 * deselect() - select one of of I2C buses attached to a mux 474 * 475 * This is used to deselect the currently selected I2C bus. 476 * 477 * @mux: Mux device 478 * @bus: I2C bus to deselect 479 * @channel: Channel number correponding to the bus to deselect 480 * @return 0 if OK, -ve on error 481 */ 482 int (*deselect)(struct udevice *mux, struct udevice *bus, uint channel); 483}; 484 485#define i2c_mux_get_ops(dev) ((struct i2c_mux_ops *)(dev)->driver->ops) 486 487/** 488 * i2c_get_chip() - get a device to use to access a chip on a bus 489 * 490 * This returns the device for the given chip address. The device can then 491 * be used with calls to i2c_read(), i2c_write(), i2c_probe(), etc. 492 * 493 * @bus: Bus to examine 494 * @chip_addr: Chip address for the new device 495 * @offset_len: Length of a register offset in bytes (normally 1) 496 * @devp: Returns pointer to new device if found or -ENODEV if not 497 * found 498 */ 499int i2c_get_chip(struct udevice *bus, uint chip_addr, uint offset_len, 500 struct udevice **devp); 501 502/** 503 * i2c_get_chip_for_busnum() - get a device to use to access a chip on 504 * a bus number 505 * 506 * This returns the device for the given chip address on a particular bus 507 * number. 508 * 509 * @busnum: Bus number to examine 510 * @chip_addr: Chip address for the new device 511 * @offset_len: Length of a register offset in bytes (normally 1) 512 * @devp: Returns pointer to new device if found or -ENODEV if not 513 * found 514 */ 515int i2c_get_chip_for_busnum(int busnum, int chip_addr, uint offset_len, 516 struct udevice **devp); 517 518/** 519 * i2c_chip_ofdata_to_platdata() - Decode standard I2C platform data 520 * 521 * This decodes the chip address from a device tree node and puts it into 522 * its dm_i2c_chip structure. This should be called in your driver's 523 * ofdata_to_platdata() method. 524 * 525 * @blob: Device tree blob 526 * @node: Node offset to read from 527 * @spi: Place to put the decoded information 528 */ 529int i2c_chip_ofdata_to_platdata(struct udevice *dev, struct dm_i2c_chip *chip); 530 531/** 532 * i2c_dump_msgs() - Dump a list of I2C messages 533 * 534 * This may be useful for debugging. 535 * 536 * @msg: Message list to dump 537 * @nmsgs: Number of messages 538 */ 539void i2c_dump_msgs(struct i2c_msg *msg, int nmsgs); 540 541/** 542 * i2c_emul_find() - Find an emulator for an i2c sandbox device 543 * 544 * This looks at the device's 'emul' phandle 545 * 546 * @dev: Device to find an emulator for 547 * @emulp: Returns the associated emulator, if found * 548 * @return 0 if OK, -ENOENT or -ENODEV if not found 549 */ 550int i2c_emul_find(struct udevice *dev, struct udevice **emulp); 551 552/** 553 * i2c_emul_get_device() - Find the device being emulated 554 * 555 * Given an emulator this returns the associated device 556 * 557 * @emul: Emulator for the device 558 * @return device that @emul is emulating 559 */ 560struct udevice *i2c_emul_get_device(struct udevice *emul); 561 562#ifndef CONFIG_DM_I2C 563 564/* 565 * WARNING WARNING WARNING WARNING WARNING WARNING WARNING WARNING 566 * 567 * The implementation MUST NOT use static or global variables if the 568 * I2C routines are used to read SDRAM configuration information 569 * because this is done before the memories are initialized. Limited 570 * use of stack-based variables are OK (the initial stack size is 571 * limited). 572 * 573 * WARNING WARNING WARNING WARNING WARNING WARNING WARNING WARNING 574 */ 575 576/* 577 * Configuration items. 578 */ 579#define I2C_RXTX_LEN 128 /* maximum tx/rx buffer length */ 580 581#if !defined(CONFIG_SYS_I2C_MAX_HOPS) 582/* no muxes used bus = i2c adapters */ 583#define CONFIG_SYS_I2C_DIRECT_BUS 1 584#define CONFIG_SYS_I2C_MAX_HOPS 0 585#define CONFIG_SYS_NUM_I2C_BUSES ll_entry_count(struct i2c_adapter, i2c) 586#else 587/* we use i2c muxes */ 588#undef CONFIG_SYS_I2C_DIRECT_BUS 589#endif 590 591/* define the I2C bus number for RTC and DTT if not already done */ 592#if !defined(CONFIG_SYS_RTC_BUS_NUM) 593#define CONFIG_SYS_RTC_BUS_NUM 0 594#endif 595#if !defined(CONFIG_SYS_SPD_BUS_NUM) 596#define CONFIG_SYS_SPD_BUS_NUM 0 597#endif 598 599struct i2c_adapter { 600 void (*init)(struct i2c_adapter *adap, int speed, 601 int slaveaddr); 602 int (*probe)(struct i2c_adapter *adap, uint8_t chip); 603 int (*read)(struct i2c_adapter *adap, uint8_t chip, 604 uint addr, int alen, uint8_t *buffer, 605 int len); 606 int (*write)(struct i2c_adapter *adap, uint8_t chip, 607 uint addr, int alen, uint8_t *buffer, 608 int len); 609 uint (*set_bus_speed)(struct i2c_adapter *adap, 610 uint speed); 611 int speed; 612 int waitdelay; 613 int slaveaddr; 614 int init_done; 615 int hwadapnr; 616 char *name; 617}; 618 619#define U_BOOT_I2C_MKENT_COMPLETE(_init, _probe, _read, _write, \ 620 _set_speed, _speed, _slaveaddr, _hwadapnr, _name) \ 621 { \ 622 .init = _init, \ 623 .probe = _probe, \ 624 .read = _read, \ 625 .write = _write, \ 626 .set_bus_speed = _set_speed, \ 627 .speed = _speed, \ 628 .slaveaddr = _slaveaddr, \ 629 .init_done = 0, \ 630 .hwadapnr = _hwadapnr, \ 631 .name = #_name \ 632}; 633 634#define U_BOOT_I2C_ADAP_COMPLETE(_name, _init, _probe, _read, _write, \ 635 _set_speed, _speed, _slaveaddr, _hwadapnr) \ 636 ll_entry_declare(struct i2c_adapter, _name, i2c) = \ 637 U_BOOT_I2C_MKENT_COMPLETE(_init, _probe, _read, _write, \ 638 _set_speed, _speed, _slaveaddr, _hwadapnr, _name); 639 640struct i2c_adapter *i2c_get_adapter(int index); 641 642#ifndef CONFIG_SYS_I2C_DIRECT_BUS 643struct i2c_mux { 644 int id; 645 char name[16]; 646}; 647 648struct i2c_next_hop { 649 struct i2c_mux mux; 650 uint8_t chip; 651 uint8_t channel; 652}; 653 654struct i2c_bus_hose { 655 int adapter; 656 struct i2c_next_hop next_hop[CONFIG_SYS_I2C_MAX_HOPS]; 657}; 658#define I2C_NULL_HOP {{-1, ""}, 0, 0} 659extern struct i2c_bus_hose i2c_bus[]; 660 661#define I2C_ADAPTER(bus) i2c_bus[bus].adapter 662#else 663#define I2C_ADAPTER(bus) bus 664#endif 665#define I2C_BUS gd->cur_i2c_bus 666 667#define I2C_ADAP_NR(bus) i2c_get_adapter(I2C_ADAPTER(bus)) 668#define I2C_ADAP I2C_ADAP_NR(gd->cur_i2c_bus) 669#define I2C_ADAP_HWNR (I2C_ADAP->hwadapnr) 670 671#ifndef CONFIG_SYS_I2C_DIRECT_BUS 672#define I2C_MUX_PCA9540_ID 1 673#define I2C_MUX_PCA9540 {I2C_MUX_PCA9540_ID, "PCA9540B"} 674#define I2C_MUX_PCA9542_ID 2 675#define I2C_MUX_PCA9542 {I2C_MUX_PCA9542_ID, "PCA9542A"} 676#define I2C_MUX_PCA9544_ID 3 677#define I2C_MUX_PCA9544 {I2C_MUX_PCA9544_ID, "PCA9544A"} 678#define I2C_MUX_PCA9547_ID 4 679#define I2C_MUX_PCA9547 {I2C_MUX_PCA9547_ID, "PCA9547A"} 680#define I2C_MUX_PCA9548_ID 5 681#define I2C_MUX_PCA9548 {I2C_MUX_PCA9548_ID, "PCA9548"} 682#endif 683 684#ifndef I2C_SOFT_DECLARATIONS 685# if (defined(CONFIG_AT91RM9200) || \ 686 defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9261) || \ 687 defined(CONFIG_AT91SAM9263)) 688# define I2C_SOFT_DECLARATIONS at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIOA; 689# else 690# define I2C_SOFT_DECLARATIONS 691# endif 692#endif 693 694/* 695 * Many boards/controllers/drivers don't support an I2C slave interface so 696 * provide a default slave address for them for use in common code. A real 697 * value for CONFIG_SYS_I2C_SLAVE should be defined for any board which does 698 * support a slave interface. 699 */ 700#ifndef CONFIG_SYS_I2C_SLAVE 701#define CONFIG_SYS_I2C_SLAVE 0xfe 702#endif 703 704/* 705 * Initialization, must be called once on start up, may be called 706 * repeatedly to change the speed and slave addresses. 707 */ 708#ifdef CONFIG_SYS_I2C_EARLY_INIT 709void i2c_early_init_f(void); 710#endif 711void i2c_init(int speed, int slaveaddr); 712void i2c_init_board(void); 713 714#ifdef CONFIG_SYS_I2C 715/* 716 * i2c_get_bus_num: 717 * 718 * Returns index of currently active I2C bus. Zero-based. 719 */ 720unsigned int i2c_get_bus_num(void); 721 722/* 723 * i2c_set_bus_num: 724 * 725 * Change the active I2C bus. Subsequent read/write calls will 726 * go to this one. 727 * 728 * bus - bus index, zero based 729 * 730 * Returns: 0 on success, not 0 on failure 731 * 732 */ 733int i2c_set_bus_num(unsigned int bus); 734 735/* 736 * i2c_init_all(): 737 * 738 * Initializes all I2C adapters in the system. All i2c_adap structures must 739 * be initialized beforehead with function pointers and data, including 740 * speed and slaveaddr. Returns 0 on success, non-0 on failure. 741 */ 742void i2c_init_all(void); 743 744/* 745 * Probe the given I2C chip address. Returns 0 if a chip responded, 746 * not 0 on failure. 747 */ 748int i2c_probe(uint8_t chip); 749 750/* 751 * Read/Write interface: 752 * chip: I2C chip address, range 0..127 753 * addr: Memory (register) address within the chip 754 * alen: Number of bytes to use for addr (typically 1, 2 for larger 755 * memories, 0 for register type devices with only one 756 * register) 757 * buffer: Where to read/write the data 758 * len: How many bytes to read/write 759 * 760 * Returns: 0 on success, not 0 on failure 761 */ 762int i2c_read(uint8_t chip, unsigned int addr, int alen, 763 uint8_t *buffer, int len); 764 765int i2c_write(uint8_t chip, unsigned int addr, int alen, 766 uint8_t *buffer, int len); 767 768/* 769 * Utility routines to read/write registers. 770 */ 771uint8_t i2c_reg_read(uint8_t addr, uint8_t reg); 772 773void i2c_reg_write(uint8_t addr, uint8_t reg, uint8_t val); 774 775/* 776 * i2c_set_bus_speed: 777 * 778 * Change the speed of the active I2C bus 779 * 780 * speed - bus speed in Hz 781 * 782 * Returns: new bus speed 783 * 784 */ 785unsigned int i2c_set_bus_speed(unsigned int speed); 786 787/* 788 * i2c_get_bus_speed: 789 * 790 * Returns speed of currently active I2C bus in Hz 791 */ 792 793unsigned int i2c_get_bus_speed(void); 794 795#else 796 797/* 798 * Probe the given I2C chip address. Returns 0 if a chip responded, 799 * not 0 on failure. 800 */ 801int i2c_probe(uchar chip); 802 803/* 804 * Read/Write interface: 805 * chip: I2C chip address, range 0..127 806 * addr: Memory (register) address within the chip 807 * alen: Number of bytes to use for addr (typically 1, 2 for larger 808 * memories, 0 for register type devices with only one 809 * register) 810 * buffer: Where to read/write the data 811 * len: How many bytes to read/write 812 * 813 * Returns: 0 on success, not 0 on failure 814 */ 815int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len); 816int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len); 817 818/* 819 * Utility routines to read/write registers. 820 */ 821static inline u8 i2c_reg_read(u8 addr, u8 reg) 822{ 823 u8 buf; 824 825#ifdef DEBUG 826 printf("%s: addr=0x%02x, reg=0x%02x\n", __func__, addr, reg); 827#endif 828 829 i2c_read(addr, reg, 1, &buf, 1); 830 831 return buf; 832} 833 834static inline void i2c_reg_write(u8 addr, u8 reg, u8 val) 835{ 836#ifdef DEBUG 837 printf("%s: addr=0x%02x, reg=0x%02x, val=0x%02x\n", 838 __func__, addr, reg, val); 839#endif 840 841 i2c_write(addr, reg, 1, &val, 1); 842} 843 844/* 845 * Functions for setting the current I2C bus and its speed 846 */ 847 848/* 849 * i2c_set_bus_num: 850 * 851 * Change the active I2C bus. Subsequent read/write calls will 852 * go to this one. 853 * 854 * bus - bus index, zero based 855 * 856 * Returns: 0 on success, not 0 on failure 857 * 858 */ 859int i2c_set_bus_num(unsigned int bus); 860 861/* 862 * i2c_get_bus_num: 863 * 864 * Returns index of currently active I2C bus. Zero-based. 865 */ 866 867unsigned int i2c_get_bus_num(void); 868 869/* 870 * i2c_set_bus_speed: 871 * 872 * Change the speed of the active I2C bus 873 * 874 * speed - bus speed in Hz 875 * 876 * Returns: 0 on success, not 0 on failure 877 * 878 */ 879int i2c_set_bus_speed(unsigned int); 880 881/* 882 * i2c_get_bus_speed: 883 * 884 * Returns speed of currently active I2C bus in Hz 885 */ 886 887unsigned int i2c_get_bus_speed(void); 888#endif /* CONFIG_SYS_I2C */ 889 890/* 891 * only for backwardcompatibility, should go away if we switched 892 * completely to new multibus support. 893 */ 894#if defined(CONFIG_SYS_I2C) || defined(CONFIG_I2C_MULTI_BUS) 895# if !defined(CONFIG_SYS_MAX_I2C_BUS) 896# define CONFIG_SYS_MAX_I2C_BUS 2 897# endif 898# define I2C_MULTI_BUS 1 899#else 900# define CONFIG_SYS_MAX_I2C_BUS 1 901# define I2C_MULTI_BUS 0 902#endif 903 904/* NOTE: These two functions MUST be always_inline to avoid code growth! */ 905static inline unsigned int I2C_GET_BUS(void) __attribute__((always_inline)); 906static inline unsigned int I2C_GET_BUS(void) 907{ 908 return I2C_MULTI_BUS ? i2c_get_bus_num() : 0; 909} 910 911static inline void I2C_SET_BUS(unsigned int bus) __attribute__((always_inline)); 912static inline void I2C_SET_BUS(unsigned int bus) 913{ 914 if (I2C_MULTI_BUS) 915 i2c_set_bus_num(bus); 916} 917 918/* Multi I2C definitions */ 919enum { 920 I2C_0, I2C_1, I2C_2, I2C_3, I2C_4, I2C_5, I2C_6, I2C_7, 921 I2C_8, I2C_9, I2C_10, 922}; 923 924/** 925 * Get FDT values for i2c bus. 926 * 927 * @param blob Device tree blbo 928 * @return the number of I2C bus 929 */ 930void board_i2c_init(const void *blob); 931 932/** 933 * Find the I2C bus number by given a FDT I2C node. 934 * 935 * @param blob Device tree blbo 936 * @param node FDT I2C node to find 937 * @return the number of I2C bus (zero based), or -1 on error 938 */ 939int i2c_get_bus_num_fdt(int node); 940 941/** 942 * Reset the I2C bus represented by the given a FDT I2C node. 943 * 944 * @param blob Device tree blbo 945 * @param node FDT I2C node to find 946 * @return 0 if port was reset, -1 if not found 947 */ 948int i2c_reset_port_fdt(const void *blob, int node); 949 950#endif /* !CONFIG_DM_I2C */ 951 952#endif /* _I2C_H_ */ 953