uboot/arch/arm/Kconfig
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   1menu "ARM architecture"
   2        depends on ARM
   3
   4config SYS_ARCH
   5        default "arm"
   6
   7config ARM64
   8        bool
   9        select PHYS_64BIT
  10        select SYS_CACHE_SHIFT_6
  11
  12if ARM64
  13config POSITION_INDEPENDENT
  14        bool "Generate position-independent pre-relocation code"
  15        help
  16          U-Boot expects to be linked to a specific hard-coded address, and to
  17          be loaded to and run from that address. This option lifts that
  18          restriction, thus allowing the code to be loaded to and executed
  19          from almost any address. This logic relies on the relocation
  20          information that is embedded into the binary to support U-Boot
  21          relocating itself to the top-of-RAM later during execution.
  22
  23config INIT_SP_RELATIVE
  24        bool "Specify the early stack pointer relative to the .bss section"
  25        help
  26          U-Boot typically uses a hard-coded value for the stack pointer
  27          before relocation. Enable this option to instead calculate the
  28          initial SP at run-time. This is useful to avoid hard-coding addresses
  29          into U-Boot, so that can be loaded and executed at arbitrary
  30          addresses and thus avoid using arbitrary addresses at runtime.
  31
  32          If this option is enabled, the early stack pointer is set to
  33          &_bss_start with a offset value added. The offset is specified by
  34          SYS_INIT_SP_BSS_OFFSET.
  35
  36config SYS_INIT_SP_BSS_OFFSET
  37        int "Early stack offset from the .bss base address"
  38        depends on INIT_SP_RELATIVE
  39        default 524288
  40        help
  41          This option's value is the offset added to &_bss_start in order to
  42          calculate the stack pointer. This offset should be large enough so
  43          that the early malloc region, global data (gd), and early stack usage
  44          do not overlap any appended DTB.
  45
  46config LINUX_KERNEL_IMAGE_HEADER
  47        bool
  48        help
  49          Place a Linux kernel image header at the start of the U-Boot binary.
  50          The format of the header is described in the Linux kernel source at
  51          Documentation/arm64/booting.txt. This feature is useful since the
  52          image header reports the amount of memory (BSS and similar) that
  53          U-Boot needs to use, but which isn't part of the binary.
  54
  55if LINUX_KERNEL_IMAGE_HEADER
  56config LNX_KRNL_IMG_TEXT_OFFSET_BASE
  57        hex
  58        help
  59          The value subtracted from CONFIG_SYS_TEXT_BASE to calculate the
  60          TEXT_OFFSET value written in to the Linux kernel image header.
  61endif
  62endif
  63
  64config STATIC_RELA
  65        bool
  66        default y if ARM64 && !POSITION_INDEPENDENT
  67
  68config DMA_ADDR_T_64BIT
  69        bool
  70        default y if ARM64
  71
  72config HAS_VBAR
  73        bool
  74
  75config HAS_THUMB2
  76        bool
  77
  78# Used for compatibility with asm files copied from the kernel
  79config ARM_ASM_UNIFIED
  80        bool
  81        default y
  82
  83# Used for compatibility with asm files copied from the kernel
  84config THUMB2_KERNEL
  85        bool
  86
  87config SYS_ICACHE_OFF
  88        bool "Do not enable icache"
  89        default n
  90        help
  91          Do not enable instruction cache in U-Boot.
  92
  93config SPL_SYS_ICACHE_OFF
  94        bool "Do not enable icache in SPL"
  95        depends on SPL
  96        default SYS_ICACHE_OFF
  97        help
  98          Do not enable instruction cache in SPL.
  99
 100config SYS_DCACHE_OFF
 101        bool "Do not enable dcache"
 102        default n
 103        help
 104          Do not enable data cache in U-Boot.
 105
 106config SPL_SYS_DCACHE_OFF
 107        bool "Do not enable dcache in SPL"
 108        depends on SPL
 109        default SYS_DCACHE_OFF
 110        help
 111          Do not enable data cache in SPL.
 112
 113config SYS_ARM_CACHE_CP15
 114        bool "CP15 based cache enabling support"
 115        help
 116          Select this if your processor suports enabling caches by using
 117          CP15 registers.
 118
 119config SYS_ARM_MMU
 120        bool "MMU-based Paged Memory Management Support"
 121        select SYS_ARM_CACHE_CP15
 122        help
 123          Select if you want MMU-based virtualised addressing space
 124          support by paged memory management.
 125
 126config SYS_ARM_MPU
 127        bool 'Use the ARM v7 PMSA Compliant MPU'
 128        help
 129          Some ARM systems without an MMU have instead a Memory Protection
 130          Unit (MPU) that defines the type and permissions for regions of
 131          memory.
 132          If your CPU has an MPU then you should choose 'y' here unless you
 133          know that you do not want to use the MPU.
 134
 135# If set, the workarounds for these ARM errata are applied early during U-Boot
 136# startup. Note that in general these options force the workarounds to be
 137# applied; no CPU-type/version detection exists, unlike the similar options in
 138# the Linux kernel. Do not set these options unless they apply!  Also note that
 139# the following can be machine specific errata. These do have ability to
 140# provide rudimentary version and machine specific checks, but expect no
 141# product checks:
 142# CONFIG_ARM_ERRATA_430973
 143# CONFIG_ARM_ERRATA_454179
 144# CONFIG_ARM_ERRATA_621766
 145# CONFIG_ARM_ERRATA_798870
 146# CONFIG_ARM_ERRATA_801819
 147# CONFIG_ARM_CORTEX_A8_CVE_2017_5715
 148# CONFIG_ARM_CORTEX_A15_CVE_2017_5715
 149
 150config ARM_ERRATA_430973
 151        bool
 152
 153config ARM_ERRATA_454179
 154        bool
 155
 156config ARM_ERRATA_621766
 157        bool
 158
 159config ARM_ERRATA_716044
 160        bool
 161
 162config ARM_ERRATA_725233
 163        bool
 164
 165config ARM_ERRATA_742230
 166        bool
 167
 168config ARM_ERRATA_743622
 169        bool
 170
 171config ARM_ERRATA_751472
 172        bool
 173
 174config ARM_ERRATA_761320
 175        bool
 176
 177config ARM_ERRATA_773022
 178        bool
 179
 180config ARM_ERRATA_774769
 181        bool
 182
 183config ARM_ERRATA_794072
 184        bool
 185
 186config ARM_ERRATA_798870
 187        bool
 188
 189config ARM_ERRATA_801819
 190        bool
 191
 192config ARM_ERRATA_826974
 193        bool
 194
 195config ARM_ERRATA_828024
 196        bool
 197
 198config ARM_ERRATA_829520
 199        bool
 200
 201config ARM_ERRATA_833069
 202        bool
 203
 204config ARM_ERRATA_833471
 205        bool
 206
 207config ARM_ERRATA_845369
 208        bool
 209
 210config ARM_ERRATA_852421
 211        bool
 212
 213config ARM_ERRATA_852423
 214        bool
 215
 216config ARM_ERRATA_855873
 217        bool
 218
 219config ARM_CORTEX_A8_CVE_2017_5715
 220        bool
 221
 222config ARM_CORTEX_A15_CVE_2017_5715
 223        bool
 224
 225config CPU_ARM720T
 226        bool
 227        select SYS_CACHE_SHIFT_5
 228        imply SYS_ARM_MMU
 229
 230config CPU_ARM920T
 231        bool
 232        select SYS_CACHE_SHIFT_5
 233        imply SYS_ARM_MMU
 234
 235config CPU_ARM926EJS
 236        bool
 237        select SYS_CACHE_SHIFT_5
 238        imply SYS_ARM_MMU
 239
 240config CPU_ARM946ES
 241        bool
 242        select SYS_CACHE_SHIFT_5
 243        imply SYS_ARM_MMU
 244
 245config CPU_ARM1136
 246        bool
 247        select SYS_CACHE_SHIFT_5
 248        imply SYS_ARM_MMU
 249
 250config CPU_ARM1176
 251        bool
 252        select HAS_VBAR
 253        select SYS_CACHE_SHIFT_5
 254        imply SYS_ARM_MMU
 255
 256config CPU_V7A
 257        bool
 258        select HAS_THUMB2
 259        select HAS_VBAR
 260        select SYS_CACHE_SHIFT_6
 261        imply SYS_ARM_MMU
 262
 263config CPU_V7M
 264        bool
 265        select HAS_THUMB2
 266        select SYS_ARM_MPU
 267        select SYS_CACHE_SHIFT_5
 268        select SYS_THUMB_BUILD
 269        select THUMB2_KERNEL
 270
 271config CPU_V7R
 272        bool
 273        select HAS_THUMB2
 274        select SYS_ARM_CACHE_CP15
 275        select SYS_ARM_MPU
 276        select SYS_CACHE_SHIFT_6
 277
 278config CPU_PXA
 279        bool
 280        select SYS_CACHE_SHIFT_5
 281        imply SYS_ARM_MMU
 282
 283config CPU_SA1100
 284        bool
 285        select SYS_CACHE_SHIFT_5
 286        imply SYS_ARM_MMU
 287
 288config SYS_CPU
 289        default "arm720t" if CPU_ARM720T
 290        default "arm920t" if CPU_ARM920T
 291        default "arm926ejs" if CPU_ARM926EJS
 292        default "arm946es" if CPU_ARM946ES
 293        default "arm1136" if CPU_ARM1136
 294        default "arm1176" if CPU_ARM1176
 295        default "armv7" if CPU_V7A
 296        default "armv7" if CPU_V7R
 297        default "armv7m" if CPU_V7M
 298        default "pxa" if CPU_PXA
 299        default "sa1100" if CPU_SA1100
 300        default "armv8" if ARM64
 301
 302config SYS_ARM_ARCH
 303        int
 304        default 4 if CPU_ARM720T
 305        default 4 if CPU_ARM920T
 306        default 5 if CPU_ARM926EJS
 307        default 5 if CPU_ARM946ES
 308        default 6 if CPU_ARM1136
 309        default 6 if CPU_ARM1176
 310        default 7 if CPU_V7A
 311        default 7 if CPU_V7M
 312        default 7 if CPU_V7R
 313        default 5 if CPU_PXA
 314        default 4 if CPU_SA1100
 315        default 8 if ARM64
 316
 317config SYS_CACHE_SHIFT_5
 318        bool
 319
 320config SYS_CACHE_SHIFT_6
 321        bool
 322
 323config SYS_CACHE_SHIFT_7
 324        bool
 325
 326config SYS_CACHELINE_SIZE
 327        int
 328        default 128 if SYS_CACHE_SHIFT_7
 329        default 64 if SYS_CACHE_SHIFT_6
 330        default 32 if SYS_CACHE_SHIFT_5
 331
 332config ARCH_CPU_INIT
 333        bool "Enable ARCH_CPU_INIT"
 334        help
 335          Some architectures require a call to arch_cpu_init()
 336          Say Y here to enable it
 337
 338config SYS_ARCH_TIMER
 339        bool "ARM Generic Timer support"
 340        depends on CPU_V7A || ARM64
 341        default y if ARM64
 342        help
 343          The ARM Generic Timer (aka arch-timer) provides an architected
 344          interface to a timer source on an SoC.
 345          It is mandantory for ARMv8 implementation and widely available
 346          on ARMv7 systems.
 347
 348config ARM_SMCCC
 349        bool "Support for ARM SMC Calling Convention (SMCCC)"
 350        depends on CPU_V7A || ARM64
 351        select ARM_PSCI_FW
 352        help
 353          Say Y here if you want to enable ARM SMC Calling Convention.
 354          This should be enabled if U-Boot needs to communicate with system
 355          firmware (for example, PSCI) according to SMCCC.
 356
 357config SEMIHOSTING
 358        bool "support boot from semihosting"
 359        help
 360          In emulated environments, semihosting is a way for
 361          the hosted environment to call out to the emulator to
 362          retrieve files from the host machine.
 363
 364config SYS_THUMB_BUILD
 365        bool "Build U-Boot using the Thumb instruction set"
 366        depends on !ARM64
 367        help
 368           Use this flag to build U-Boot using the Thumb instruction set for
 369           ARM architectures. Thumb instruction set provides better code
 370           density. For ARM architectures that support Thumb2 this flag will
 371           result in Thumb2 code generated by GCC.
 372
 373config SPL_SYS_THUMB_BUILD
 374        bool "Build SPL using the Thumb instruction set"
 375        default y if SYS_THUMB_BUILD
 376        depends on !ARM64 && SPL
 377        help
 378           Use this flag to build SPL using the Thumb instruction set for
 379           ARM architectures. Thumb instruction set provides better code
 380           density. For ARM architectures that support Thumb2 this flag will
 381           result in Thumb2 code generated by GCC.
 382
 383config TPL_SYS_THUMB_BUILD
 384        bool "Build TPL using the Thumb instruction set"
 385        default y if SYS_THUMB_BUILD
 386        depends on TPL && !ARM64
 387        help
 388           Use this flag to build SPL using the Thumb instruction set for
 389           ARM architectures. Thumb instruction set provides better code
 390           density. For ARM architectures that support Thumb2 this flag will
 391           result in Thumb2 code generated by GCC.
 392
 393
 394config SYS_L2CACHE_OFF
 395        bool "L2cache off"
 396        help
 397          If SoC does not support L2CACHE or one do not want to enable
 398          L2CACHE, choose this option.
 399
 400config ENABLE_ARM_SOC_BOOT0_HOOK
 401        bool "prepare BOOT0 header"
 402        help
 403          If the SoC's BOOT0 requires a header area filled with (magic)
 404          values, then choose this option, and create a file included as
 405          <asm/arch/boot0.h> which contains the required assembler code.
 406
 407config ARM_CORTEX_CPU_IS_UP
 408        bool
 409        default n
 410
 411config USE_ARCH_MEMCPY
 412        bool "Use an assembly optimized implementation of memcpy"
 413        default y
 414        depends on !ARM64
 415        help
 416          Enable the generation of an optimized version of memcpy.
 417          Such implementation may be faster under some conditions
 418          but may increase the binary size.
 419
 420config SPL_USE_ARCH_MEMCPY
 421        bool "Use an assembly optimized implementation of memcpy for SPL"
 422        default y if USE_ARCH_MEMCPY
 423        depends on !ARM64 && SPL
 424        help
 425          Enable the generation of an optimized version of memcpy.
 426          Such implementation may be faster under some conditions
 427          but may increase the binary size.
 428
 429config TPL_USE_ARCH_MEMCPY
 430        bool "Use an assembly optimized implementation of memcpy for TPL"
 431        default y if USE_ARCH_MEMCPY
 432        depends on !ARM64 && TPL
 433        help
 434          Enable the generation of an optimized version of memcpy.
 435          Such implementation may be faster under some conditions
 436          but may increase the binary size.
 437
 438config USE_ARCH_MEMSET
 439        bool "Use an assembly optimized implementation of memset"
 440        default y
 441        depends on !ARM64
 442        help
 443          Enable the generation of an optimized version of memset.
 444          Such implementation may be faster under some conditions
 445          but may increase the binary size.
 446
 447config SPL_USE_ARCH_MEMSET
 448        bool "Use an assembly optimized implementation of memset for SPL"
 449        default y if USE_ARCH_MEMSET
 450        depends on !ARM64 && SPL
 451        help
 452          Enable the generation of an optimized version of memset.
 453          Such implementation may be faster under some conditions
 454          but may increase the binary size.
 455
 456config TPL_USE_ARCH_MEMSET
 457        bool "Use an assembly optimized implementation of memset for TPL"
 458        default y if USE_ARCH_MEMSET
 459        depends on !ARM64 && TPL
 460        help
 461          Enable the generation of an optimized version of memset.
 462          Such implementation may be faster under some conditions
 463          but may increase the binary size.
 464
 465config ARM64_SUPPORT_AARCH32
 466        bool "ARM64 system support AArch32 execution state"
 467        depends on ARM64
 468        default y if !TARGET_THUNDERX_88XX
 469        help
 470          This ARM64 system supports AArch32 execution state.
 471
 472choice
 473        prompt "Target select"
 474        default TARGET_HIKEY
 475
 476config ARCH_AT91
 477        bool "Atmel AT91"
 478        select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB
 479
 480config TARGET_EDB93XX
 481        bool "Support edb93xx"
 482        select CPU_ARM920T
 483        select PL010_SERIAL
 484
 485config TARGET_ASPENITE
 486        bool "Support aspenite"
 487        select CPU_ARM926EJS
 488
 489config TARGET_GPLUGD
 490        bool "Support gplugd"
 491        select CPU_ARM926EJS
 492
 493config ARCH_DAVINCI
 494        bool "TI DaVinci"
 495        select CPU_ARM926EJS
 496        imply CMD_SAVES
 497        help
 498          Support for TI's DaVinci platform.
 499
 500config KIRKWOOD
 501        bool "Marvell Kirkwood"
 502        select ARCH_MISC_INIT
 503        select BOARD_EARLY_INIT_F
 504        select CPU_ARM926EJS
 505
 506config ARCH_MVEBU
 507        bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)"
 508        select DM
 509        select DM_ETH
 510        select DM_SERIAL
 511        select DM_SPI
 512        select DM_SPI_FLASH
 513        select OF_CONTROL
 514        select OF_SEPARATE
 515        select SPI
 516        imply CMD_DM
 517
 518config TARGET_APF27
 519        bool "Support apf27"
 520        select CPU_ARM926EJS
 521        select SUPPORT_SPL
 522
 523config ORION5X
 524        bool "Marvell Orion"
 525        select CPU_ARM926EJS
 526
 527config TARGET_SPEAR300
 528        bool "Support spear300"
 529        select BOARD_EARLY_INIT_F
 530        select CPU_ARM926EJS
 531        select PL011_SERIAL
 532        imply CMD_SAVES
 533
 534config TARGET_SPEAR310
 535        bool "Support spear310"
 536        select BOARD_EARLY_INIT_F
 537        select CPU_ARM926EJS
 538        select PL011_SERIAL
 539        imply CMD_SAVES
 540
 541config TARGET_SPEAR320
 542        bool "Support spear320"
 543        select BOARD_EARLY_INIT_F
 544        select CPU_ARM926EJS
 545        select PL011_SERIAL
 546        imply CMD_SAVES
 547
 548config TARGET_SPEAR600
 549        bool "Support spear600"
 550        select BOARD_EARLY_INIT_F
 551        select CPU_ARM926EJS
 552        select PL011_SERIAL
 553        imply CMD_SAVES
 554
 555config TARGET_STV0991
 556        bool "Support stv0991"
 557        select CPU_V7A
 558        select DM
 559        select DM_SERIAL
 560        select DM_SPI
 561        select DM_SPI_FLASH
 562        select PL01X_SERIAL
 563        select SPI
 564        select SPI_FLASH
 565        imply CMD_DM
 566
 567config TARGET_X600
 568        bool "Support x600"
 569        select BOARD_LATE_INIT
 570        select CPU_ARM926EJS
 571        select PL011_SERIAL
 572        select SUPPORT_SPL
 573
 574config TARGET_WOODBURN
 575        bool "Support woodburn"
 576        select CPU_ARM1136
 577
 578config TARGET_WOODBURN_SD
 579        bool "Support woodburn_sd"
 580        select CPU_ARM1136
 581        select SUPPORT_SPL
 582
 583config TARGET_FLEA3
 584        bool "Support flea3"
 585        select CPU_ARM1136
 586
 587config TARGET_MX35PDK
 588        bool "Support mx35pdk"
 589        select BOARD_LATE_INIT
 590        select CPU_ARM1136
 591
 592config ARCH_BCM283X
 593        bool "Broadcom BCM283X family"
 594        select DM
 595        select DM_GPIO
 596        select DM_SERIAL
 597        select OF_CONTROL
 598        select PL01X_SERIAL
 599        select SERIAL_SEARCH_ALL
 600        imply CMD_DM
 601        imply FAT_WRITE
 602
 603config ARCH_BCM63158
 604        bool "Broadcom BCM63158 family"
 605        select DM
 606        select OF_CONTROL
 607        imply CMD_DM
 608
 609config ARCH_BCM6858
 610        bool "Broadcom BCM6858 family"
 611        select DM
 612        select OF_CONTROL
 613        imply CMD_DM
 614
 615config TARGET_VEXPRESS_CA15_TC2
 616        bool "Support vexpress_ca15_tc2"
 617        select CPU_V7A
 618        select CPU_V7_HAS_NONSEC
 619        select CPU_V7_HAS_VIRT
 620        select PL011_SERIAL
 621
 622config ARCH_BCMSTB
 623        bool "Broadcom BCM7XXX family"
 624        select CPU_V7A
 625        select DM
 626        select OF_CONTROL
 627        select OF_PRIOR_STAGE
 628        imply CMD_DM
 629        help
 630          This enables support for Broadcom ARM-based set-top box
 631          chipsets, including the 7445 family of chips.
 632
 633config TARGET_VEXPRESS_CA5X2
 634        bool "Support vexpress_ca5x2"
 635        select CPU_V7A
 636        select PL011_SERIAL
 637
 638config TARGET_VEXPRESS_CA9X4
 639        bool "Support vexpress_ca9x4"
 640        select CPU_V7A
 641        select PL011_SERIAL
 642
 643config TARGET_BCM23550_W1D
 644        bool "Support bcm23550_w1d"
 645        select CPU_V7A
 646        imply CRC32_VERIFY
 647        imply FAT_WRITE
 648
 649config TARGET_BCM28155_AP
 650        bool "Support bcm28155_ap"
 651        select CPU_V7A
 652        imply CRC32_VERIFY
 653        imply FAT_WRITE
 654
 655config TARGET_BCMCYGNUS
 656        bool "Support bcmcygnus"
 657        select CPU_V7A
 658        imply BCM_SF2_ETH
 659        imply BCM_SF2_ETH_GMAC
 660        imply CMD_HASH
 661        imply CRC32_VERIFY
 662        imply FAT_WRITE
 663        imply HASH_VERIFY
 664        imply NETDEVICES
 665
 666config TARGET_BCMNSP
 667        bool "Support bcmnsp"
 668        select CPU_V7A
 669
 670config TARGET_BCMNS2
 671        bool "Support Broadcom Northstar2"
 672        select ARM64
 673        help
 674          Support for Broadcom Northstar 2 SoCs.  NS2 is a quad-core 64-bit
 675          ARMv8 Cortex-A57 processors targeting a broad range of networking
 676          applications
 677
 678config ARCH_EXYNOS
 679        bool "Samsung EXYNOS"
 680        select DM
 681        select DM_GPIO
 682        select DM_I2C
 683        select DM_KEYBOARD
 684        select DM_SERIAL
 685        select DM_SPI
 686        select DM_SPI_FLASH
 687        select SPI
 688        imply SYS_THUMB_BUILD
 689        imply CMD_DM
 690        imply FAT_WRITE
 691
 692config ARCH_S5PC1XX
 693        bool "Samsung S5PC1XX"
 694        select CPU_V7A
 695        select DM
 696        select DM_GPIO
 697        select DM_I2C
 698        select DM_SERIAL
 699        imply CMD_DM
 700
 701config ARCH_HIGHBANK
 702        bool "Calxeda Highbank"
 703        select CPU_V7A
 704        select PL011_SERIAL
 705
 706config ARCH_INTEGRATOR
 707        bool "ARM Ltd. Integrator family"
 708        select DM
 709        select DM_SERIAL
 710        select PL01X_SERIAL
 711        imply CMD_DM
 712
 713config ARCH_KEYSTONE
 714        bool "TI Keystone"
 715        select CMD_POWEROFF
 716        select CPU_V7A
 717        select SUPPORT_SPL
 718        select SYS_ARCH_TIMER
 719        select SYS_THUMB_BUILD
 720        imply CMD_MTDPARTS
 721        imply CMD_SAVES
 722        imply FIT
 723
 724config ARCH_K3
 725        bool "Texas Instruments' K3 Architecture"
 726        select SPL
 727        select SUPPORT_SPL
 728        select FIT
 729
 730config ARCH_OMAP2PLUS
 731        bool "TI OMAP2+"
 732        select CPU_V7A
 733        select SPL_BOARD_INIT if SPL
 734        select SPL_STACK_R if SPL
 735        select SUPPORT_SPL
 736        imply FIT
 737
 738config ARCH_MESON
 739        bool "Amlogic Meson"
 740        imply DISTRO_DEFAULTS
 741        help
 742          Support for the Meson SoC family developed by Amlogic Inc.,
 743          targeted at media players and tablet computers. We currently
 744          support the S905 (GXBaby) 64-bit SoC.
 745
 746config ARCH_MEDIATEK
 747        bool "MediaTek SoCs"
 748        select BINMAN
 749        select DM
 750        select OF_CONTROL
 751        select SPL_DM if SPL
 752        select SPL_LIBCOMMON_SUPPORT if SPL
 753        select SPL_LIBGENERIC_SUPPORT if SPL
 754        select SPL_OF_CONTROL if SPL
 755        select SUPPORT_SPL
 756        help
 757          Support for the MediaTek SoCs family developed by MediaTek Inc.
 758          Please refer to doc/README.mediatek for more information.
 759
 760config ARCH_LPC32XX
 761        bool "NXP LPC32xx platform"
 762        select CPU_ARM926EJS
 763        select DM
 764        select DM_GPIO
 765        select DM_SERIAL
 766        select SPL_DM if SPL
 767        select SUPPORT_SPL
 768        imply CMD_DM
 769
 770config ARCH_IMX8
 771        bool "NXP i.MX8 platform"
 772        select ARM64
 773        select DM
 774        select OF_CONTROL
 775
 776config ARCH_IMX8M
 777        bool "NXP i.MX8M platform"
 778        select ARM64
 779        select DM
 780        select SUPPORT_SPL
 781        imply CMD_DM
 782
 783config ARCH_MX23
 784        bool "NXP i.MX23 family"
 785        select CPU_ARM926EJS
 786        select PL011_SERIAL
 787        select SUPPORT_SPL
 788
 789config ARCH_MX25
 790        bool "NXP MX25"
 791        select CPU_ARM926EJS
 792        imply MXC_GPIO
 793
 794config ARCH_MX28
 795        bool "NXP i.MX28 family"
 796        select CPU_ARM926EJS
 797        select PL011_SERIAL
 798        select SUPPORT_SPL
 799
 800config ARCH_MX31
 801        bool "NXP i.MX31 family"
 802        select CPU_ARM1136
 803
 804config ARCH_MX7ULP
 805        bool "NXP MX7ULP"
 806        select CPU_V7A
 807        select ROM_UNIFIED_SECTIONS
 808        imply MXC_GPIO
 809
 810config ARCH_MX7
 811        bool "Freescale MX7"
 812        select ARCH_MISC_INIT
 813        select BOARD_EARLY_INIT_F
 814        select CPU_V7A
 815        select SYS_FSL_HAS_SEC if SECURE_BOOT
 816        select SYS_FSL_SEC_COMPAT_4
 817        select SYS_FSL_SEC_LE
 818        imply MXC_GPIO
 819
 820config ARCH_MX6
 821        bool "Freescale MX6"
 822        select CPU_V7A
 823        select SYS_FSL_HAS_SEC if SECURE_BOOT
 824        select SYS_FSL_SEC_COMPAT_4
 825        select SYS_FSL_SEC_LE
 826        select SYS_THUMB_BUILD if SPL
 827        imply MXC_GPIO
 828
 829if ARCH_MX6
 830config SPL_LDSCRIPT
 831        default "arch/arm/mach-omap2/u-boot-spl.lds"
 832endif
 833
 834config ARCH_MX5
 835        bool "Freescale MX5"
 836        select BOARD_EARLY_INIT_F
 837        select CPU_V7A
 838        imply MXC_GPIO
 839
 840config ARCH_OWL
 841        bool "Actions Semi OWL SoCs"
 842        select ARM64
 843        select DM
 844        select DM_SERIAL
 845        select OF_CONTROL
 846        imply CMD_DM
 847
 848config ARCH_QEMU
 849        bool "QEMU Virtual Platform"
 850        select ARCH_SUPPORT_TFABOOT
 851        select DM
 852        select DM_SERIAL
 853        select OF_CONTROL
 854        select PL01X_SERIAL
 855        imply CMD_DM
 856        imply DM_RTC
 857        imply RTC_PL031
 858
 859config ARCH_RMOBILE
 860        bool "Renesas ARM SoCs"
 861        select BOARD_EARLY_INIT_F if !RZA1
 862        select DM
 863        select DM_SERIAL
 864        imply CMD_DM
 865        imply FAT_WRITE
 866        imply SYS_THUMB_BUILD
 867        imply ARCH_MISC_INIT if DISPLAY_CPUINFO
 868
 869config TARGET_S32V234EVB
 870        bool "Support s32v234evb"
 871        select ARM64
 872        select SYS_FSL_ERRATUM_ESDHC111
 873
 874config ARCH_SNAPDRAGON
 875        bool "Qualcomm Snapdragon SoCs"
 876        select ARM64
 877        select DM
 878        select DM_GPIO
 879        select DM_SERIAL
 880        select MSM_SMEM
 881        select OF_CONTROL
 882        select OF_SEPARATE
 883        select SMEM
 884        select SPMI
 885        imply CMD_DM
 886
 887config ARCH_SOCFPGA
 888        bool "Altera SOCFPGA family"
 889        select ARCH_EARLY_INIT_R
 890        select ARCH_MISC_INIT if !TARGET_SOCFPGA_ARRIA10
 891        select ARM64 if TARGET_SOCFPGA_STRATIX10
 892        select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
 893        select DM
 894        select DM_SERIAL
 895        select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
 896        select OF_CONTROL
 897        select SPL_DM_RESET if DM_RESET
 898        select SPL_DM_SERIAL
 899        select SPL_LIBCOMMON_SUPPORT
 900        select SPL_LIBGENERIC_SUPPORT
 901        select SPL_NAND_SUPPORT if SPL_NAND_DENALI
 902        select SPL_OF_CONTROL
 903        select SPL_SEPARATE_BSS if TARGET_SOCFPGA_STRATIX10
 904        select SPL_SERIAL_SUPPORT
 905        select SPL_SYSRESET
 906        select SPL_WATCHDOG_SUPPORT
 907        select SUPPORT_SPL
 908        select SYS_NS16550
 909        select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
 910        select SYSRESET
 911        select SYSRESET_SOCFPGA if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
 912        select SYSRESET_SOCFPGA_S10 if TARGET_SOCFPGA_STRATIX10
 913        imply CMD_DM
 914        imply CMD_MTDPARTS
 915        imply CRC32_VERIFY
 916        imply DM_SPI
 917        imply DM_SPI_FLASH
 918        imply FAT_WRITE
 919        imply SPL
 920        imply SPL_DM
 921        imply SPL_LIBDISK_SUPPORT
 922        imply SPL_MMC_SUPPORT
 923        imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
 924        imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
 925        imply SPL_SPI_FLASH_SUPPORT
 926        imply SPL_SPI_SUPPORT
 927        imply L2X0_CACHE
 928
 929config ARCH_SUNXI
 930        bool "Support sunxi (Allwinner) SoCs"
 931        select BINMAN
 932        select CMD_GPIO
 933        select CMD_MMC if MMC
 934        select CMD_USB if DISTRO_DEFAULTS
 935        select CLK
 936        select DM
 937        select DM_ETH
 938        select DM_GPIO
 939        select DM_KEYBOARD
 940        select DM_MMC if MMC
 941        select DM_SCSI if SCSI
 942        select DM_SERIAL
 943        select DM_USB if DISTRO_DEFAULTS
 944        select OF_BOARD_SETUP
 945        select OF_CONTROL
 946        select OF_SEPARATE
 947        select SPECIFY_CONSOLE_INDEX
 948        select SPL_STACK_R if SPL
 949        select SPL_SYS_MALLOC_SIMPLE if SPL
 950        select SPL_SYS_THUMB_BUILD if !ARM64
 951        select SUNXI_GPIO
 952        select SYS_NS16550
 953        select SYS_THUMB_BUILD if !ARM64
 954        select USB if DISTRO_DEFAULTS
 955        select USB_KEYBOARD if DISTRO_DEFAULTS
 956        select USB_STORAGE if DISTRO_DEFAULTS
 957        select USE_TINY_PRINTF
 958        imply CMD_DM
 959        imply CMD_GPT
 960        imply CMD_UBI if NAND
 961        imply DISTRO_DEFAULTS
 962        imply FAT_WRITE
 963        imply FIT
 964        imply OF_LIBFDT_OVERLAY
 965        imply PRE_CONSOLE_BUFFER
 966        imply SPL_GPIO_SUPPORT
 967        imply SPL_LIBCOMMON_SUPPORT
 968        imply SPL_LIBGENERIC_SUPPORT
 969        imply SPL_MMC_SUPPORT if MMC
 970        imply SPL_POWER_SUPPORT
 971        imply SPL_SERIAL_SUPPORT
 972        imply USB_GADGET
 973
 974config ARCH_VERSAL
 975        bool "Support Xilinx Versal Platform"
 976        select ARM64
 977        select CLK
 978        select DM
 979        select DM_ETH if NET
 980        select DM_MMC if MMC
 981        select DM_SERIAL
 982        select OF_CONTROL
 983
 984config ARCH_VF610
 985        bool "Freescale Vybrid"
 986        select CPU_V7A
 987        select SYS_FSL_ERRATUM_ESDHC111
 988        imply CMD_MTDPARTS
 989        imply NAND
 990
 991config ARCH_ZYNQ
 992        bool "Xilinx Zynq based platform"
 993        select BOARD_EARLY_INIT_F if WDT
 994        select CLK
 995        select CLK_ZYNQ
 996        select CPU_V7A
 997        select DM
 998        select DM_ETH if NET
 999        select DM_MMC if MMC
1000        select DM_SERIAL
1001        select DM_SPI
1002        select DM_SPI_FLASH
1003        select DM_USB if USB
1004        select OF_CONTROL
1005        select SPI
1006        select SPL_BOARD_INIT if SPL
1007        select SPL_CLK if SPL
1008        select SPL_DM if SPL
1009        select SPL_OF_CONTROL if SPL
1010        select SPL_SEPARATE_BSS if SPL
1011        select SUPPORT_SPL
1012        imply ARCH_EARLY_INIT_R
1013        imply BOARD_LATE_INIT
1014        imply CMD_CLK
1015        imply CMD_DM
1016        imply CMD_SPL
1017        imply FAT_WRITE
1018
1019config ARCH_ZYNQMP_R5
1020        bool "Xilinx ZynqMP R5 based platform"
1021        select CLK
1022        select CPU_V7R
1023        select DM
1024        select DM_ETH if NET
1025        select DM_MMC if MMC
1026        select DM_SERIAL
1027        select OF_CONTROL
1028        imply CMD_DM
1029        imply DM_USB_GADGET
1030
1031config ARCH_ZYNQMP
1032        bool "Xilinx ZynqMP based platform"
1033        select ARM64
1034        select CLK
1035        select DM
1036        select DM_ETH if NET
1037        select DM_MMC if MMC
1038        select DM_SERIAL
1039        select DM_SPI if SPI
1040        select DM_SPI_FLASH if DM_SPI
1041        select DM_USB if USB
1042        select OF_CONTROL
1043        select SPL_BOARD_INIT if SPL
1044        select SPL_CLK if SPL
1045        select SPL_SEPARATE_BSS if SPL
1046        select SUPPORT_SPL
1047        imply BOARD_LATE_INIT
1048        imply CMD_DM
1049        imply FAT_WRITE
1050        imply MP
1051        imply DM_USB_GADGET
1052
1053config TEGRA
1054        bool "NVIDIA Tegra"
1055        imply DISTRO_DEFAULTS
1056        imply FAT_WRITE
1057
1058config TARGET_VEXPRESS64_AEMV8A
1059        bool "Support vexpress_aemv8a"
1060        select ARM64
1061        select PL01X_SERIAL
1062
1063config TARGET_VEXPRESS64_BASE_FVP
1064        bool "Support Versatile Express ARMv8a FVP BASE model"
1065        select ARM64
1066        select PL01X_SERIAL
1067        select SEMIHOSTING
1068
1069config TARGET_VEXPRESS64_JUNO
1070        bool "Support Versatile Express Juno Development Platform"
1071        select ARM64
1072        select PL01X_SERIAL
1073
1074config TARGET_LS2080A_EMU
1075        bool "Support ls2080a_emu"
1076        select ARCH_LS2080A
1077        select ARCH_MISC_INIT
1078        select ARM64
1079        select ARMV8_MULTIENTRY
1080        select FSL_DDR_SYNC_REFRESH
1081        help
1082          Support for Freescale LS2080A_EMU platform
1083          The LS2080A Development System (EMULATOR) is a pre silicon
1084          development platform that supports the QorIQ LS2080A
1085          Layerscape Architecture processor.
1086
1087config TARGET_LS2080A_SIMU
1088        bool "Support ls2080a_simu"
1089        select ARCH_LS2080A
1090        select ARCH_MISC_INIT
1091        select ARM64
1092        select ARMV8_MULTIENTRY
1093        select BOARD_LATE_INIT
1094        help
1095          Support for Freescale LS2080A_SIMU platform
1096          The LS2080A Development System (QDS) is a pre silicon
1097          development platform that supports the QorIQ LS2080A
1098          Layerscape Architecture processor.
1099
1100config TARGET_LS1088AQDS
1101        bool "Support ls1088aqds"
1102        select ARCH_LS1088A
1103        select ARCH_MISC_INIT
1104        select ARM64
1105        select ARMV8_MULTIENTRY
1106        select ARCH_SUPPORT_TFABOOT
1107        select BOARD_LATE_INIT
1108        select SUPPORT_SPL
1109        select FSL_DDR_INTERACTIVE if !SD_BOOT
1110        help
1111          Support for NXP LS1088AQDS platform
1112          The LS1088A Development System (QDS) is a high-performance
1113          development platform that supports the QorIQ LS1088A
1114          Layerscape Architecture processor.
1115
1116config TARGET_LS2080AQDS
1117        bool "Support ls2080aqds"
1118        select ARCH_LS2080A
1119        select ARCH_MISC_INIT
1120        select ARM64
1121        select ARMV8_MULTIENTRY
1122        select ARCH_SUPPORT_TFABOOT
1123        select BOARD_LATE_INIT
1124        select SUPPORT_SPL
1125        imply SCSI
1126        imply SCSI_AHCI
1127        select FSL_DDR_BIST
1128        select FSL_DDR_INTERACTIVE if !SPL
1129        help
1130          Support for Freescale LS2080AQDS platform
1131          The LS2080A Development System (QDS) is a high-performance
1132          development platform that supports the QorIQ LS2080A
1133          Layerscape Architecture processor.
1134
1135config TARGET_LS2080ARDB
1136        bool "Support ls2080ardb"
1137        select ARCH_LS2080A
1138        select ARCH_MISC_INIT
1139        select ARM64
1140        select ARMV8_MULTIENTRY
1141        select ARCH_SUPPORT_TFABOOT
1142        select BOARD_LATE_INIT
1143        select SUPPORT_SPL
1144        select FSL_DDR_BIST
1145        select FSL_DDR_INTERACTIVE if !SPL
1146        imply SCSI
1147        imply SCSI_AHCI
1148        help
1149          Support for Freescale LS2080ARDB platform.
1150          The LS2080A Reference design board (RDB) is a high-performance
1151          development platform that supports the QorIQ LS2080A
1152          Layerscape Architecture processor.
1153
1154config TARGET_LS2081ARDB
1155        bool "Support ls2081ardb"
1156        select ARCH_LS2080A
1157        select ARCH_MISC_INIT
1158        select ARM64
1159        select ARMV8_MULTIENTRY
1160        select BOARD_LATE_INIT
1161        select SUPPORT_SPL
1162        help
1163          Support for Freescale LS2081ARDB platform.
1164          The LS2081A Reference design board (RDB) is a high-performance
1165          development platform that supports the QorIQ LS2081A/LS2041A
1166          Layerscape Architecture processor.
1167
1168config TARGET_LX2160ARDB
1169        bool "Support lx2160ardb"
1170        select ARCH_LX2160A
1171        select ARCH_MISC_INIT
1172        select ARM64
1173        select ARMV8_MULTIENTRY
1174        select ARCH_SUPPORT_TFABOOT
1175        select BOARD_LATE_INIT
1176        help
1177          Support for NXP LX2160ARDB platform.
1178          The lx2160ardb (LX2160A Reference design board (RDB)
1179          is a high-performance development platform that supports the
1180          QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1181
1182config TARGET_LX2160AQDS
1183        bool "Support lx2160aqds"
1184        select ARCH_LX2160A
1185        select ARCH_MISC_INIT
1186        select ARM64
1187        select ARMV8_MULTIENTRY
1188        select ARCH_SUPPORT_TFABOOT
1189        select BOARD_LATE_INIT
1190        help
1191          Support for NXP LX2160AQDS platform.
1192          The lx2160aqds (LX2160A QorIQ Development System (QDS)
1193          is a high-performance development platform that supports the
1194          QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1195
1196config TARGET_HIKEY
1197        bool "Support HiKey 96boards Consumer Edition Platform"
1198        select ARM64
1199        select DM
1200        select DM_GPIO
1201        select DM_SERIAL
1202        select OF_CONTROL
1203        select PL01X_SERIAL
1204        select SPECIFY_CONSOLE_INDEX
1205        imply CMD_DM
1206          help
1207          Support for HiKey 96boards platform. It features a HI6220
1208          SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM.
1209
1210config TARGET_HIKEY960
1211        bool "Support HiKey960 96boards Consumer Edition Platform"
1212        select ARM64
1213        select DM
1214        select DM_SERIAL
1215        select OF_CONTROL
1216        select PL01X_SERIAL
1217        imply CMD_DM
1218          help
1219          Support for HiKey960 96boards platform. It features a HI3660
1220          SoC, with 4xA73 CPU, 4xA53 CPU, MALI-G71 GPU, and 3GB RAM.
1221
1222config TARGET_POPLAR
1223        bool "Support Poplar 96boards Enterprise Edition Platform"
1224        select ARM64
1225        select DM
1226        select DM_SERIAL
1227        select DM_USB
1228        select OF_CONTROL
1229        select PL01X_SERIAL
1230        imply CMD_DM
1231          help
1232          Support for Poplar 96boards EE platform. It features a HI3798cv200
1233          SoC, with 4xA53 CPU, 1GB RAM and the high performance Mali T720 GPU
1234          making it capable of running any commercial set-top solution based on
1235          Linux or Android.
1236
1237config TARGET_LS1012AQDS
1238        bool "Support ls1012aqds"
1239        select ARCH_LS1012A
1240        select ARM64
1241        select ARCH_SUPPORT_TFABOOT
1242        select BOARD_LATE_INIT
1243        help
1244          Support for Freescale LS1012AQDS platform.
1245          The LS1012A Development System (QDS) is a high-performance
1246          development platform that supports the QorIQ LS1012A
1247          Layerscape Architecture processor.
1248
1249config TARGET_LS1012ARDB
1250        bool "Support ls1012ardb"
1251        select ARCH_LS1012A
1252        select ARM64
1253        select ARCH_SUPPORT_TFABOOT
1254        select BOARD_LATE_INIT
1255        imply SCSI
1256        imply SCSI_AHCI
1257        help
1258          Support for Freescale LS1012ARDB platform.
1259          The LS1012A Reference design board (RDB) is a high-performance
1260          development platform that supports the QorIQ LS1012A
1261          Layerscape Architecture processor.
1262
1263config TARGET_LS1012A2G5RDB
1264        bool "Support ls1012a2g5rdb"
1265        select ARCH_LS1012A
1266        select ARM64
1267        select ARCH_SUPPORT_TFABOOT
1268        select BOARD_LATE_INIT
1269        imply SCSI
1270        help
1271          Support for Freescale LS1012A2G5RDB platform.
1272          The LS1012A 2G5 Reference design board (RDB) is a high-performance
1273          development platform that supports the QorIQ LS1012A
1274          Layerscape Architecture processor.
1275
1276config TARGET_LS1012AFRWY
1277        bool "Support ls1012afrwy"
1278        select ARCH_LS1012A
1279        select ARM64
1280        select ARCH_SUPPORT_TFABOOT
1281        select BOARD_LATE_INIT
1282        imply SCSI
1283        imply SCSI_AHCI
1284        help
1285         Support for Freescale LS1012AFRWY platform.
1286         The LS1012A FRWY board (FRWY) is a high-performance
1287         development platform that supports the QorIQ LS1012A
1288         Layerscape Architecture processor.
1289
1290config TARGET_LS1012AFRDM
1291        bool "Support ls1012afrdm"
1292        select ARCH_LS1012A
1293        select ARM64
1294        select ARCH_SUPPORT_TFABOOT
1295        help
1296          Support for Freescale LS1012AFRDM platform.
1297          The LS1012A Freedom  board (FRDM) is a high-performance
1298          development platform that supports the QorIQ LS1012A
1299          Layerscape Architecture processor.
1300
1301config TARGET_LS1028AQDS
1302        bool "Support ls1028aqds"
1303        select ARCH_LS1028A
1304        select ARM64
1305        select ARMV8_MULTIENTRY
1306        select ARCH_SUPPORT_TFABOOT
1307        select BOARD_LATE_INIT
1308        select ARCH_MISC_INIT
1309        help
1310          Support for Freescale LS1028AQDS platform
1311          The LS1028A Development System (QDS) is a high-performance
1312          development platform that supports the QorIQ LS1028A
1313          Layerscape Architecture processor.
1314
1315config TARGET_LS1028ARDB
1316        bool "Support ls1028ardb"
1317        select ARCH_LS1028A
1318        select ARM64
1319        select ARMV8_MULTIENTRY
1320        select ARCH_SUPPORT_TFABOOT
1321        help
1322          Support for Freescale LS1028ARDB platform
1323          The LS1028A Development System (RDB) is a high-performance
1324          development platform that supports the QorIQ LS1028A
1325          Layerscape Architecture processor.
1326
1327config TARGET_LS1088ARDB
1328        bool "Support ls1088ardb"
1329        select ARCH_LS1088A
1330        select ARCH_MISC_INIT
1331        select ARM64
1332        select ARMV8_MULTIENTRY
1333        select ARCH_SUPPORT_TFABOOT
1334        select BOARD_LATE_INIT
1335        select SUPPORT_SPL
1336        select FSL_DDR_INTERACTIVE if !SD_BOOT
1337        help
1338          Support for NXP LS1088ARDB platform.
1339          The LS1088A Reference design board (RDB) is a high-performance
1340          development platform that supports the QorIQ LS1088A
1341          Layerscape Architecture processor.
1342
1343config TARGET_LS1021AQDS
1344        bool "Support ls1021aqds"
1345        select ARCH_LS1021A
1346        select ARCH_SUPPORT_PSCI
1347        select BOARD_EARLY_INIT_F
1348        select BOARD_LATE_INIT
1349        select CPU_V7A
1350        select CPU_V7_HAS_NONSEC
1351        select CPU_V7_HAS_VIRT
1352        select LS1_DEEP_SLEEP
1353        select SUPPORT_SPL
1354        select SYS_FSL_DDR
1355        select FSL_DDR_INTERACTIVE
1356        imply SCSI
1357
1358config TARGET_LS1021ATWR
1359        bool "Support ls1021atwr"
1360        select ARCH_LS1021A
1361        select ARCH_SUPPORT_PSCI
1362        select BOARD_EARLY_INIT_F
1363        select BOARD_LATE_INIT
1364        select CPU_V7A
1365        select CPU_V7_HAS_NONSEC
1366        select CPU_V7_HAS_VIRT
1367        select LS1_DEEP_SLEEP
1368        select SUPPORT_SPL
1369        imply SCSI
1370
1371config TARGET_LS1021ATSN
1372        bool "Support ls1021atsn"
1373        select ARCH_LS1021A
1374        select ARCH_SUPPORT_PSCI
1375        select BOARD_EARLY_INIT_F
1376        select BOARD_LATE_INIT
1377        select CPU_V7A
1378        select CPU_V7_HAS_NONSEC
1379        select CPU_V7_HAS_VIRT
1380        select LS1_DEEP_SLEEP
1381        select SUPPORT_SPL
1382        imply SCSI
1383
1384config TARGET_LS1021AIOT
1385        bool "Support ls1021aiot"
1386        select ARCH_LS1021A
1387        select ARCH_SUPPORT_PSCI
1388        select BOARD_LATE_INIT
1389        select CPU_V7A
1390        select CPU_V7_HAS_NONSEC
1391        select CPU_V7_HAS_VIRT
1392        select SUPPORT_SPL
1393        imply SCSI
1394        help
1395          Support for Freescale LS1021AIOT platform.
1396          The LS1021A Freescale board (IOT) is a high-performance
1397          development platform that supports the QorIQ LS1021A
1398          Layerscape Architecture processor.
1399
1400config TARGET_LS1043AQDS
1401        bool "Support ls1043aqds"
1402        select ARCH_LS1043A
1403        select ARM64
1404        select ARMV8_MULTIENTRY
1405        select ARCH_SUPPORT_TFABOOT
1406        select BOARD_EARLY_INIT_F
1407        select BOARD_LATE_INIT
1408        select SUPPORT_SPL
1409        select FSL_DDR_INTERACTIVE if !SPL
1410        imply SCSI
1411        imply SCSI_AHCI
1412        help
1413          Support for Freescale LS1043AQDS platform.
1414
1415config TARGET_LS1043ARDB
1416        bool "Support ls1043ardb"
1417        select ARCH_LS1043A
1418        select ARM64
1419        select ARMV8_MULTIENTRY
1420        select ARCH_SUPPORT_TFABOOT
1421        select BOARD_EARLY_INIT_F
1422        select BOARD_LATE_INIT
1423        select SUPPORT_SPL
1424        help
1425          Support for Freescale LS1043ARDB platform.
1426
1427config TARGET_LS1046AQDS
1428        bool "Support ls1046aqds"
1429        select ARCH_LS1046A
1430        select ARM64
1431        select ARMV8_MULTIENTRY
1432        select ARCH_SUPPORT_TFABOOT
1433        select BOARD_EARLY_INIT_F
1434        select BOARD_LATE_INIT
1435        select DM_SPI_FLASH if DM_SPI
1436        select SUPPORT_SPL
1437        select FSL_DDR_BIST if !SPL
1438        select FSL_DDR_INTERACTIVE  if !SPL
1439        select FSL_DDR_INTERACTIVE if !SPL
1440        imply SCSI
1441        help
1442          Support for Freescale LS1046AQDS platform.
1443          The LS1046A Development System (QDS) is a high-performance
1444          development platform that supports the QorIQ LS1046A
1445          Layerscape Architecture processor.
1446
1447config TARGET_LS1046ARDB
1448        bool "Support ls1046ardb"
1449        select ARCH_LS1046A
1450        select ARM64
1451        select ARMV8_MULTIENTRY
1452        select ARCH_SUPPORT_TFABOOT
1453        select BOARD_EARLY_INIT_F
1454        select BOARD_LATE_INIT
1455        select DM_SPI_FLASH if DM_SPI
1456        select POWER_MC34VR500
1457        select SUPPORT_SPL
1458        select FSL_DDR_BIST
1459        select FSL_DDR_INTERACTIVE if !SPL
1460        imply SCSI
1461        help
1462          Support for Freescale LS1046ARDB platform.
1463          The LS1046A Reference Design Board (RDB) is a high-performance
1464          development platform that supports the QorIQ LS1046A
1465          Layerscape Architecture processor.
1466
1467config TARGET_LS1046AFRWY
1468        bool "Support ls1046afrwy"
1469        select ARCH_LS1046A
1470        select ARM64
1471        select ARMV8_MULTIENTRY
1472        select ARCH_SUPPORT_TFABOOT
1473        select BOARD_EARLY_INIT_F
1474        select BOARD_LATE_INIT
1475        select DM_SPI_FLASH if DM_SPI
1476        imply SCSI
1477        help
1478          Support for Freescale LS1046AFRWY platform.
1479          The LS1046A Freeway Board (FRWY) is a high-performance
1480          development platform that supports the QorIQ LS1046A
1481          Layerscape Architecture processor.
1482config TARGET_H2200
1483        bool "Support h2200"
1484        select CPU_PXA
1485
1486config TARGET_COLIBRI_PXA270
1487        bool "Support colibri_pxa270"
1488        select CPU_PXA
1489
1490config ARCH_UNIPHIER
1491        bool "Socionext UniPhier SoCs"
1492        select BOARD_LATE_INIT
1493        select DM
1494        select DM_GPIO
1495        select DM_I2C
1496        select DM_MMC
1497        select DM_RESET
1498        select DM_SERIAL
1499        select DM_USB
1500        select OF_BOARD_SETUP
1501        select OF_CONTROL
1502        select OF_LIBFDT
1503        select PINCTRL
1504        select SPL_BOARD_INIT if SPL
1505        select SPL_DM if SPL
1506        select SPL_LIBCOMMON_SUPPORT if SPL
1507        select SPL_LIBGENERIC_SUPPORT if SPL
1508        select SPL_OF_CONTROL if SPL
1509        select SPL_PINCTRL if SPL
1510        select SUPPORT_SPL
1511        imply CMD_DM
1512        imply DISTRO_DEFAULTS
1513        imply FAT_WRITE
1514        help
1515          Support for UniPhier SoC family developed by Socionext Inc.
1516          (formerly, System LSI Business Division of Panasonic Corporation)
1517
1518config STM32
1519        bool "Support STMicroelectronics STM32 MCU with cortex M"
1520        select CPU_V7M
1521        select DM
1522        select DM_SERIAL
1523        imply CMD_DM
1524
1525config ARCH_STI
1526        bool "Support STMicrolectronics SoCs"
1527        select BLK
1528        select CPU_V7A
1529        select DM
1530        select DM_MMC
1531        select DM_RESET
1532        select DM_SERIAL
1533        imply CMD_DM
1534        help
1535          Support for STMicroelectronics STiH407/10 SoC family.
1536          This SoC is used on Linaro 96Board STiH410-B2260
1537
1538config ARCH_STM32MP
1539        bool "Support STMicroelectronics STM32MP Socs with cortex A"
1540        select ARCH_MISC_INIT
1541        select BOARD_LATE_INIT
1542        select CLK
1543        select DM
1544        select DM_GPIO
1545        select DM_RESET
1546        select DM_SERIAL
1547        select MISC
1548        select OF_CONTROL
1549        select OF_LIBFDT
1550        select OF_SYSTEM_SETUP
1551        select PINCTRL
1552        select REGMAP
1553        select SUPPORT_SPL
1554        select SYSCON
1555        select SYSRESET
1556        select SYS_THUMB_BUILD
1557        imply SPL_SYSRESET
1558        imply CMD_DM
1559        imply CMD_POWEROFF
1560        imply OF_LIBFDT_OVERLAY
1561        imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1562        imply USE_PREBOOT
1563        help
1564          Support for STM32MP SoC family developed by STMicroelectronics,
1565          MPUs based on ARM cortex A core
1566          U-BOOT is running in DDR, loaded by the First Stage BootLoader (FSBL).
1567          FSBL can be TF-A: Trusted Firmware for Cortex A, for trusted boot
1568          chain.
1569          SPL is the unsecure FSBL for the basic boot chain.
1570
1571config ARCH_ROCKCHIP
1572        bool "Support Rockchip SoCs"
1573        select BLK
1574        select DM
1575        select DM_GPIO
1576        select DM_I2C
1577        select DM_MMC
1578        select DM_PWM
1579        select DM_REGULATOR
1580        select DM_SERIAL
1581        select DM_SPI
1582        select DM_SPI_FLASH
1583        select DM_USB if USB
1584        select ENABLE_ARM_SOC_BOOT0_HOOK
1585        select OF_CONTROL
1586        select SPI
1587        select SPL_DM if SPL
1588        select SPL_SYS_MALLOC_SIMPLE if SPL
1589        select SYS_MALLOC_F
1590        select SYS_THUMB_BUILD if !ARM64
1591        imply ADC
1592        imply CMD_DM
1593        imply DEBUG_UART_BOARD_INIT
1594        imply DISTRO_DEFAULTS
1595        imply FAT_WRITE
1596        imply SARADC_ROCKCHIP
1597        imply SPL_SYSRESET
1598        imply SYS_NS16550
1599        imply TPL_SYSRESET
1600        imply USB_FUNCTION_FASTBOOT
1601
1602config TARGET_THUNDERX_88XX
1603        bool "Support ThunderX 88xx"
1604        select ARM64
1605        select OF_CONTROL
1606        select PL01X_SERIAL
1607        select SYS_CACHE_SHIFT_7
1608
1609config ARCH_ASPEED
1610        bool "Support Aspeed SoCs"
1611        select DM
1612        select OF_CONTROL
1613        imply CMD_DM
1614
1615endchoice
1616
1617config ARCH_SUPPORT_TFABOOT
1618        bool
1619
1620config TFABOOT
1621        bool "Support for booting from TF-A"
1622        depends on ARCH_SUPPORT_TFABOOT
1623        default n
1624        help
1625          Enabling this will make a U-Boot binary that is capable of being
1626          booted via TF-A.
1627
1628config TI_SECURE_DEVICE
1629        bool "HS Device Type Support"
1630        depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_K3
1631        help
1632          If a high secure (HS) device type is being used, this config
1633          must be set. This option impacts various aspects of the
1634          build system (to create signed boot images that can be
1635          authenticated) and the code. See the doc/README.ti-secure
1636          file for further details.
1637
1638if AM43XX || AM33XX || OMAP54XX || ARCH_KEYSTONE
1639config ISW_ENTRY_ADDR
1640        hex "Address in memory or XIP address of bootloader entry point"
1641        default 0x402F4000 if AM43XX
1642        default 0x402F0400 if AM33XX
1643        default 0x40301350 if OMAP54XX
1644        help
1645          After any reset, the boot ROM searches the boot media for a valid
1646          boot image. For non-XIP devices, the ROM then copies the image into
1647          internal memory. For all boot modes, after the ROM processes the
1648          boot image it eventually computes the entry point address depending
1649          on the device type (secure/non-secure), boot media (xip/non-xip) and
1650          image headers.
1651endif
1652
1653source "arch/arm/mach-aspeed/Kconfig"
1654
1655source "arch/arm/mach-at91/Kconfig"
1656
1657source "arch/arm/mach-bcm283x/Kconfig"
1658
1659source "arch/arm/mach-bcmstb/Kconfig"
1660
1661source "arch/arm/mach-davinci/Kconfig"
1662
1663source "arch/arm/mach-exynos/Kconfig"
1664
1665source "arch/arm/mach-highbank/Kconfig"
1666
1667source "arch/arm/mach-integrator/Kconfig"
1668
1669source "arch/arm/mach-k3/Kconfig"
1670
1671source "arch/arm/mach-keystone/Kconfig"
1672
1673source "arch/arm/mach-kirkwood/Kconfig"
1674
1675source "arch/arm/cpu/arm926ejs/lpc32xx/Kconfig"
1676
1677source "arch/arm/mach-mvebu/Kconfig"
1678
1679source "arch/arm/cpu/armv7/ls102xa/Kconfig"
1680
1681source "arch/arm/mach-imx/mx2/Kconfig"
1682
1683source "arch/arm/mach-imx/mx3/Kconfig"
1684
1685source "arch/arm/mach-imx/mx5/Kconfig"
1686
1687source "arch/arm/mach-imx/mx6/Kconfig"
1688
1689source "arch/arm/mach-imx/mx7/Kconfig"
1690
1691source "arch/arm/mach-imx/mx7ulp/Kconfig"
1692
1693source "arch/arm/mach-imx/imx8/Kconfig"
1694
1695source "arch/arm/mach-imx/imx8m/Kconfig"
1696
1697source "arch/arm/mach-imx/mxs/Kconfig"
1698
1699source "arch/arm/mach-omap2/Kconfig"
1700
1701source "arch/arm/cpu/armv8/fsl-layerscape/Kconfig"
1702
1703source "arch/arm/mach-orion5x/Kconfig"
1704
1705source "arch/arm/mach-owl/Kconfig"
1706
1707source "arch/arm/mach-rmobile/Kconfig"
1708
1709source "arch/arm/mach-meson/Kconfig"
1710
1711source "arch/arm/mach-mediatek/Kconfig"
1712
1713source "arch/arm/mach-qemu/Kconfig"
1714
1715source "arch/arm/mach-rockchip/Kconfig"
1716
1717source "arch/arm/mach-s5pc1xx/Kconfig"
1718
1719source "arch/arm/mach-snapdragon/Kconfig"
1720
1721source "arch/arm/mach-socfpga/Kconfig"
1722
1723source "arch/arm/mach-sti/Kconfig"
1724
1725source "arch/arm/mach-stm32/Kconfig"
1726
1727source "arch/arm/mach-stm32mp/Kconfig"
1728
1729source "arch/arm/mach-sunxi/Kconfig"
1730
1731source "arch/arm/mach-tegra/Kconfig"
1732
1733source "arch/arm/mach-uniphier/Kconfig"
1734
1735source "arch/arm/cpu/armv7/vf610/Kconfig"
1736
1737source "arch/arm/mach-zynq/Kconfig"
1738
1739source "arch/arm/mach-zynqmp/Kconfig"
1740
1741source "arch/arm/mach-versal/Kconfig"
1742
1743source "arch/arm/mach-zynqmp-r5/Kconfig"
1744
1745source "arch/arm/cpu/armv7/Kconfig"
1746
1747source "arch/arm/cpu/armv8/Kconfig"
1748
1749source "arch/arm/mach-imx/Kconfig"
1750
1751source "board/bosch/shc/Kconfig"
1752source "board/bosch/guardian/Kconfig"
1753source "board/CarMediaLab/flea3/Kconfig"
1754source "board/Marvell/aspenite/Kconfig"
1755source "board/Marvell/gplugd/Kconfig"
1756source "board/armadeus/apf27/Kconfig"
1757source "board/armltd/vexpress/Kconfig"
1758source "board/armltd/vexpress64/Kconfig"
1759source "board/broadcom/bcm23550_w1d/Kconfig"
1760source "board/broadcom/bcm28155_ap/Kconfig"
1761source "board/broadcom/bcm963158/Kconfig"
1762source "board/broadcom/bcm968580xref/Kconfig"
1763source "board/broadcom/bcmcygnus/Kconfig"
1764source "board/broadcom/bcmnsp/Kconfig"
1765source "board/broadcom/bcmns2/Kconfig"
1766source "board/cavium/thunderx/Kconfig"
1767source "board/cirrus/edb93xx/Kconfig"
1768source "board/eets/pdu001/Kconfig"
1769source "board/emulation/qemu-arm/Kconfig"
1770source "board/freescale/ls2080a/Kconfig"
1771source "board/freescale/ls2080aqds/Kconfig"
1772source "board/freescale/ls2080ardb/Kconfig"
1773source "board/freescale/ls1088a/Kconfig"
1774source "board/freescale/ls1028a/Kconfig"
1775source "board/freescale/ls1021aqds/Kconfig"
1776source "board/freescale/ls1043aqds/Kconfig"
1777source "board/freescale/ls1021atwr/Kconfig"
1778source "board/freescale/ls1021atsn/Kconfig"
1779source "board/freescale/ls1021aiot/Kconfig"
1780source "board/freescale/ls1046aqds/Kconfig"
1781source "board/freescale/ls1043ardb/Kconfig"
1782source "board/freescale/ls1046ardb/Kconfig"
1783source "board/freescale/ls1046afrwy/Kconfig"
1784source "board/freescale/ls1012aqds/Kconfig"
1785source "board/freescale/ls1012ardb/Kconfig"
1786source "board/freescale/ls1012afrdm/Kconfig"
1787source "board/freescale/lx2160a/Kconfig"
1788source "board/freescale/mx35pdk/Kconfig"
1789source "board/freescale/s32v234evb/Kconfig"
1790source "board/grinn/chiliboard/Kconfig"
1791source "board/gumstix/pepper/Kconfig"
1792source "board/h2200/Kconfig"
1793source "board/hisilicon/hikey/Kconfig"
1794source "board/hisilicon/hikey960/Kconfig"
1795source "board/hisilicon/poplar/Kconfig"
1796source "board/isee/igep003x/Kconfig"
1797source "board/phytec/pcm051/Kconfig"
1798source "board/silica/pengwyn/Kconfig"
1799source "board/spear/spear300/Kconfig"
1800source "board/spear/spear310/Kconfig"
1801source "board/spear/spear320/Kconfig"
1802source "board/spear/spear600/Kconfig"
1803source "board/spear/x600/Kconfig"
1804source "board/st/stv0991/Kconfig"
1805source "board/tcl/sl50/Kconfig"
1806source "board/ucRobotics/bubblegum_96/Kconfig"
1807source "board/birdland/bav335x/Kconfig"
1808source "board/toradex/colibri_pxa270/Kconfig"
1809source "board/variscite/dart_6ul/Kconfig"
1810source "board/vscom/baltos/Kconfig"
1811source "board/woodburn/Kconfig"
1812source "board/xilinx/Kconfig"
1813source "board/xilinx/zynq/Kconfig"
1814source "board/xilinx/zynqmp/Kconfig"
1815
1816source "arch/arm/Kconfig.debug"
1817
1818endmenu
1819
1820config SPL_LDSCRIPT
1821        default "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" if (ARCH_MX23 || ARCH_MX28) && !SPL_FRAMEWORK
1822        default "arch/arm/cpu/arm1136/u-boot-spl.lds" if CPU_ARM1136
1823        default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARM64
1824
1825
1826