LXR uboot/arch/arm/cpu/arm926ejs/lpc32xx/timer.c

   1// SPDX-License-Identifier: GPL-2.0+
   2/*
   3 * Copyright (C) 2011 Vladimir Zapolskiy <vz@mleia.com>
   4 */
   5
   6#include <common.h>
   7#include <asm/arch/cpu.h>
   8#include <asm/arch/clk.h>
   9#include <asm/arch/timer.h>
  10#include <asm/io.h>
  11
  12static struct timer_regs  *timer0 = (struct timer_regs *)TIMER0_BASE;
  13static struct timer_regs  *timer1 = (struct timer_regs *)TIMER1_BASE;
  14static struct clk_pm_regs *clk    = (struct clk_pm_regs *)CLK_PM_BASE;
  15
  16static void lpc32xx_timer_clock(u32 bit, int enable)
  17{
  18        if (enable)
  19                setbits_le32(&clk->timclk_ctrl1, bit);
  20        else
  21                clrbits_le32(&clk->timclk_ctrl1, bit);
  22}
  23
  24static void lpc32xx_timer_reset(struct timer_regs *timer, u32 freq)
  25{
  26        writel(TIMER_TCR_COUNTER_RESET,   &timer->tcr);
  27        writel(TIMER_TCR_COUNTER_DISABLE, &timer->tcr);
  28        writel(0, &timer->tc);
  29        writel(0, &timer->pr);
  30
  31        /* Count mode is every rising PCLK edge */
  32        writel(TIMER_CTCR_MODE_TIMER, &timer->ctcr);
  33
  34        /* Set prescale counter value */
  35        writel((get_periph_clk_rate() / freq) - 1, &timer->pr);
  36
  37        /* Ensure that the counter is not reset when matching TC */
  38        writel(0,  &timer->mcr);
  39}
  40
  41static void lpc32xx_timer_count(struct timer_regs *timer, int enable)
  42{
  43        if (enable)
  44                writel(TIMER_TCR_COUNTER_ENABLE,  &timer->tcr);
  45        else
  46                writel(TIMER_TCR_COUNTER_DISABLE, &timer->tcr);
  47}
  48
  49int timer_init(void)
  50{
  51        lpc32xx_timer_clock(CLK_TIMCLK_TIMER0, 1);
  52        lpc32xx_timer_reset(timer0, CONFIG_SYS_HZ);
  53        lpc32xx_timer_count(timer0, 1);
  54
  55        return 0;
  56}
  57
  58ulong get_timer(ulong base)
  59{
  60        return readl(&timer0->tc) - base;
  61}
  62
  63void __udelay(unsigned long usec)
  64{
  65        lpc32xx_timer_clock(CLK_TIMCLK_TIMER1, 1);
  66        lpc32xx_timer_reset(timer1, CONFIG_SYS_HZ * 1000);
  67        lpc32xx_timer_count(timer1, 1);
  68
  69        while (readl(&timer1->tc) < usec)
  70                /* NOP */;
  71
  72        lpc32xx_timer_count(timer1, 0);
  73        lpc32xx_timer_clock(CLK_TIMCLK_TIMER1, 0);
  74}
  75
  76unsigned long long get_ticks(void)
  77{
  78        return get_timer(0);
  79}
  80
  81ulong get_tbclk(void)
  82{
  83        return CONFIG_SYS_HZ;
  84}
  85