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7#ifndef _SYS_PROTO_H_
8#define _SYS_PROTO_H_
9
10#include <asm/io.h>
11#include <asm/mach-imx/regs-common.h>
12#include <common.h>
13#include "../arch-imx/cpu.h"
14
15#define soc_rev() (get_cpu_rev() & 0xFF)
16#define is_soc_rev(rev) (soc_rev() == rev)
17
18
19#define cpu_type(rev) (((rev) >> 12) & 0xff)
20#define soc_type(rev) (((rev) >> 12) & 0xf0)
21
22#define get_cpu_type() (cpu_type(get_cpu_rev()))
23#define get_soc_type() (soc_type(get_cpu_rev()))
24#define is_cpu_type(cpu) (get_cpu_type() == cpu)
25#define is_soc_type(soc) (get_soc_type() == soc)
26
27#define is_mx6() (is_soc_type(MXC_SOC_MX6))
28#define is_mx7() (is_soc_type(MXC_SOC_MX7))
29#define is_imx8m() (is_soc_type(MXC_SOC_IMX8M))
30#define is_imx8() (is_soc_type(MXC_SOC_IMX8))
31
32#define is_mx6dqp() (is_cpu_type(MXC_CPU_MX6QP) || is_cpu_type(MXC_CPU_MX6DP))
33#define is_mx6dq() (is_cpu_type(MXC_CPU_MX6Q) || is_cpu_type(MXC_CPU_MX6D))
34#define is_mx6sdl() (is_cpu_type(MXC_CPU_MX6SOLO) || is_cpu_type(MXC_CPU_MX6DL))
35#define is_mx6dl() (is_cpu_type(MXC_CPU_MX6DL))
36#define is_mx6sx() (is_cpu_type(MXC_CPU_MX6SX))
37#define is_mx6sl() (is_cpu_type(MXC_CPU_MX6SL))
38#define is_mx6solo() (is_cpu_type(MXC_CPU_MX6SOLO))
39#define is_mx6ul() (is_cpu_type(MXC_CPU_MX6UL))
40#define is_mx6ull() (is_cpu_type(MXC_CPU_MX6ULL))
41#define is_mx6sll() (is_cpu_type(MXC_CPU_MX6SLL))
42
43#define is_mx7ulp() (is_cpu_type(MXC_CPU_MX7ULP))
44
45#define is_imx8mq() (is_cpu_type(MXC_CPU_IMX8MQ))
46#define is_imx8qxp() (is_cpu_type(MXC_CPU_IMX8QXP))
47
48#ifdef CONFIG_MX6
49#define IMX6_SRC_GPR10_BMODE BIT(28)
50
51#define IMX6_BMODE_MASK GENMASK(7, 0)
52#define IMX6_BMODE_SHIFT 4
53#define IMX6_BMODE_EMI_MASK BIT(3)
54#define IMX6_BMODE_EMI_SHIFT 3
55#define IMX6_BMODE_SERIAL_ROM_MASK GENMASK(26, 24)
56#define IMX6_BMODE_SERIAL_ROM_SHIFT 24
57
58enum imx6_bmode_serial_rom {
59 IMX6_BMODE_ECSPI1,
60 IMX6_BMODE_ECSPI2,
61 IMX6_BMODE_ECSPI3,
62 IMX6_BMODE_ECSPI4,
63 IMX6_BMODE_ECSPI5,
64 IMX6_BMODE_I2C1,
65 IMX6_BMODE_I2C2,
66 IMX6_BMODE_I2C3,
67};
68
69enum imx6_bmode_emi {
70 IMX6_BMODE_NOR,
71 IMX6_BMODE_ONENAND,
72};
73
74enum imx6_bmode {
75 IMX6_BMODE_EMI,
76#if defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL)
77 IMX6_BMODE_QSPI,
78 IMX6_BMODE_RESERVED,
79#else
80 IMX6_BMODE_RESERVED,
81 IMX6_BMODE_SATA,
82#endif
83 IMX6_BMODE_SERIAL_ROM,
84 IMX6_BMODE_SD,
85 IMX6_BMODE_ESD,
86 IMX6_BMODE_MMC,
87 IMX6_BMODE_EMMC,
88 IMX6_BMODE_NAND_MIN,
89 IMX6_BMODE_NAND_MAX = 0xf,
90};
91
92static inline u8 imx6_is_bmode_from_gpr9(void)
93{
94 return readl(&src_base->gpr10) & IMX6_SRC_GPR10_BMODE;
95}
96
97u32 imx6_src_get_boot_mode(void);
98void gpr_init(void);
99
100#endif
101
102u32 get_nr_cpus(void);
103u32 get_cpu_rev(void);
104u32 get_cpu_speed_grade_hz(void);
105u32 get_cpu_temp_grade(int *minc, int *maxc);
106const char *get_imx_type(u32 imxtype);
107u32 imx_ddr_size(void);
108void sdelay(unsigned long);
109void set_chipselect_size(int const);
110
111void init_aips(void);
112void init_src(void);
113void init_snvs(void);
114void imx_wdog_disable_powerdown(void);
115
116int board_mmc_get_env_dev(int devno);
117
118int nxp_board_rev(void);
119char nxp_board_rev_string(void);
120
121
122
123
124
125int fecmxc_initialize(bd_t *bis);
126u32 get_ahb_clk(void);
127u32 get_periph_clk(void);
128
129void lcdif_power_down(void);
130
131int mxs_reset_block(struct mxs_register_32 *reg);
132int mxs_wait_mask_set(struct mxs_register_32 *reg, u32 mask, u32 timeout);
133int mxs_wait_mask_clr(struct mxs_register_32 *reg, u32 mask, u32 timeout);
134
135unsigned long call_imx_sip(unsigned long id, unsigned long reg0,
136 unsigned long reg1, unsigned long reg2);
137unsigned long call_imx_sip_ret2(unsigned long id, unsigned long reg0,
138 unsigned long *reg1, unsigned long reg2,
139 unsigned long reg3);
140#endif
141
