1
2
3
4
5
6
7
8#ifndef __ASM_ARM_ARCH_CLOCK_H_
9#define __ASM_ARM_ARCH_CLOCK_H_
10
11#ifndef __ASSEMBLY__
12struct s5pc100_clock {
13 unsigned int apll_lock;
14 unsigned int mpll_lock;
15 unsigned int epll_lock;
16 unsigned int hpll_lock;
17 unsigned char res1[0xf0];
18 unsigned int apll_con;
19 unsigned int mpll_con;
20 unsigned int epll_con;
21 unsigned int hpll_con;
22 unsigned char res2[0xf0];
23 unsigned int src0;
24 unsigned int src1;
25 unsigned int src2;
26 unsigned int src3;
27 unsigned char res3[0xf0];
28 unsigned int div0;
29 unsigned int div1;
30 unsigned int div2;
31 unsigned int div3;
32 unsigned int div4;
33 unsigned char res4[0x1ec];
34 unsigned int gate_d00;
35 unsigned int gate_d01;
36 unsigned int gate_d02;
37 unsigned char res5[0x54];
38 unsigned int gate_sclk0;
39 unsigned int gate_sclk1;
40};
41
42struct s5pc110_clock {
43 unsigned int apll_lock;
44 unsigned char res1[0x4];
45 unsigned int mpll_lock;
46 unsigned char res2[0x4];
47 unsigned int epll_lock;
48 unsigned char res3[0xc];
49 unsigned int vpll_lock;
50 unsigned char res4[0xdc];
51 unsigned int apll_con;
52 unsigned char res5[0x4];
53 unsigned int mpll_con;
54 unsigned char res6[0x4];
55 unsigned int epll_con;
56 unsigned char res7[0xc];
57 unsigned int vpll_con;
58 unsigned char res8[0xdc];
59 unsigned int src0;
60 unsigned int src1;
61 unsigned int src2;
62 unsigned int src3;
63 unsigned char res9[0xf0];
64 unsigned int div0;
65 unsigned int div1;
66 unsigned int div2;
67 unsigned int div3;
68 unsigned int div4;
69 unsigned char res10[0x1ec];
70 unsigned int gate_d00;
71 unsigned int gate_d01;
72 unsigned int gate_d02;
73 unsigned char res11[0x54];
74 unsigned int gate_sclk0;
75 unsigned int gate_sclk1;
76};
77#endif
78
79#endif
80