LXR uboot/drivers/clk/at91/clk-h32mx.c

   1// SPDX-License-Identifier: GPL-2.0+
   2/*
   3 * Copyright (C) 2016 Atmel Corporation
   4 *               Wenyou.Yang <wenyou.yang@atmel.com>
   5 */
   6
   7#include <common.h>
   8#include <clk-uclass.h>
   9#include <dm.h>
  10#include <dm/util.h>
  11#include <linux/io.h>
  12#include <mach/at91_pmc.h>
  13#include "pmc.h"
  14
  15DECLARE_GLOBAL_DATA_PTR;
  16
  17#define H32MX_MAX_FREQ  90000000
  18
  19static ulong sama5d4_h32mx_clk_get_rate(struct clk *clk)
  20{
  21        struct pmc_platdata *plat = dev_get_platdata(clk->dev);
  22        struct at91_pmc *pmc = plat->reg_base;
  23        ulong rate = gd->arch.mck_rate_hz;
  24
  25        if (readl(&pmc->mckr) & AT91_PMC_MCKR_H32MXDIV)
  26                rate /= 2;
  27
  28        if (rate > H32MX_MAX_FREQ)
  29                dev_dbg(clk->dev, "H32MX clock is too fast\n");
  30
  31        return rate;
  32}
  33
  34static struct clk_ops sama5d4_h32mx_clk_ops = {
  35        .get_rate = sama5d4_h32mx_clk_get_rate,
  36};
  37
  38static int sama5d4_h32mx_clk_probe(struct udevice *dev)
  39{
  40        return at91_pmc_core_probe(dev);
  41}
  42
  43static const struct udevice_id sama5d4_h32mx_clk_match[] = {
  44        { .compatible = "atmel,sama5d4-clk-h32mx" },
  45        {}
  46};
  47
  48U_BOOT_DRIVER(sama5d4_h32mx_clk) = {
  49        .name = "sama5d4-h32mx-clk",
  50        .id = UCLASS_CLK,
  51        .of_match = sama5d4_h32mx_clk_match,
  52        .probe = sama5d4_h32mx_clk_probe,
  53        .platdata_auto_alloc_size = sizeof(struct pmc_platdata),
  54        .ops = &sama5d4_h32mx_clk_ops,
  55};
  56