uboot/drivers/net/fm/fm.h
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   1/* SPDX-License-Identifier: GPL-2.0+ */
   2/*
   3 * Copyright 2009-2011 Freescale Semiconductor, Inc.
   4 */
   5
   6#ifndef __FM_H__
   7#define __FM_H__
   8
   9#include <common.h>
  10#include <phy.h>
  11#include <fm_eth.h>
  12#include <fsl_fman.h>
  13
  14/* Port ID */
  15#define OH_PORT_ID_BASE         0x01
  16#define MAX_NUM_OH_PORT         7
  17#define RX_PORT_1G_BASE         0x08
  18#define MAX_NUM_RX_PORT_1G      CONFIG_SYS_NUM_FM1_DTSEC
  19#define RX_PORT_10G_BASE        0x10
  20#define RX_PORT_10G_BASE2       0x08
  21#define TX_PORT_1G_BASE         0x28
  22#define MAX_NUM_TX_PORT_1G      CONFIG_SYS_NUM_FM1_DTSEC
  23#define TX_PORT_10G_BASE        0x30
  24#define TX_PORT_10G_BASE2       0x28
  25#define MIIM_TIMEOUT    0xFFFF
  26
  27struct fm_muram {
  28        void *base;
  29        void *top;
  30        size_t size;
  31        void *alloc;
  32};
  33#define FM_MURAM_RES_SIZE       0x01000
  34
  35/* Rx/Tx buffer descriptor */
  36struct fm_port_bd {
  37        u16 status;
  38        u16 len;
  39        u32 res0;
  40        u16 res1;
  41        u16 buf_ptr_hi;
  42        u32 buf_ptr_lo;
  43};
  44
  45/* Common BD flags */
  46#define BD_LAST                 0x0800
  47
  48/* Rx BD status flags */
  49#define RxBD_EMPTY              0x8000
  50#define RxBD_LAST               BD_LAST
  51#define RxBD_FIRST              0x0400
  52#define RxBD_PHYS_ERR           0x0008
  53#define RxBD_SIZE_ERR           0x0004
  54#define RxBD_ERROR              (RxBD_PHYS_ERR | RxBD_SIZE_ERR)
  55
  56/* Tx BD status flags */
  57#define TxBD_READY              0x8000
  58#define TxBD_LAST               BD_LAST
  59
  60/* Rx/Tx queue descriptor */
  61struct fm_port_qd {
  62        u16 gen;
  63        u16 bd_ring_base_hi;
  64        u32 bd_ring_base_lo;
  65        u16 bd_ring_size;
  66        u16 offset_in;
  67        u16 offset_out;
  68        u16 res0;
  69        u32 res1[0x4];
  70};
  71
  72/* IM global parameter RAM */
  73struct fm_port_global_pram {
  74        u32 mode;       /* independent mode register */
  75        u32 rxqd_ptr;   /* Rx queue descriptor pointer */
  76        u32 txqd_ptr;   /* Tx queue descriptor pointer */
  77        u16 mrblr;      /* max Rx buffer length */
  78        u16 rxqd_bsy_cnt;       /* RxQD busy counter, should be cleared */
  79        u32 res0[0x4];
  80        struct fm_port_qd rxqd; /* Rx queue descriptor */
  81        struct fm_port_qd txqd; /* Tx queue descriptor */
  82        u32 res1[0x28];
  83};
  84
  85#define FM_PRAM_SIZE            sizeof(struct fm_port_global_pram)
  86#define FM_PRAM_ALIGN           256
  87#define PRAM_MODE_GLOBAL        0x20000000
  88#define PRAM_MODE_GRACEFUL_STOP 0x00800000
  89
  90#if defined(CONFIG_ARCH_P1023)
  91#define FM_FREE_POOL_SIZE       0x2000 /* 8K bytes */
  92#else
  93#define FM_FREE_POOL_SIZE       0x20000 /* 128K bytes */
  94#endif
  95#define FM_FREE_POOL_ALIGN      256
  96
  97void *fm_muram_alloc(int fm_idx, size_t size, ulong align);
  98void *fm_muram_base(int fm_idx);
  99int fm_init_common(int index, struct ccsr_fman *reg);
 100int fm_eth_initialize(struct ccsr_fman *reg, struct fm_eth_info *info);
 101phy_interface_t fman_port_enet_if(enum fm_port port);
 102void fman_disable_port(enum fm_port port);
 103void fman_enable_port(enum fm_port port);
 104
 105struct fsl_enet_mac {
 106        void *base; /* MAC controller registers base address */
 107        void *phyregs;
 108        int max_rx_len;
 109        void (*init_mac)(struct fsl_enet_mac *mac);
 110        void (*enable_mac)(struct fsl_enet_mac *mac);
 111        void (*disable_mac)(struct fsl_enet_mac *mac);
 112        void (*set_mac_addr)(struct fsl_enet_mac *mac, u8 *mac_addr);
 113        void (*set_if_mode)(struct fsl_enet_mac *mac, phy_interface_t type,
 114                                int speed);
 115};
 116
 117/* Fman ethernet private struct */
 118struct fm_eth {
 119        int fm_index;                   /* Fman index */
 120        u32 num;                        /* 0..n-1 for give type */
 121        struct fm_bmi_tx_port *tx_port;
 122        struct fm_bmi_rx_port *rx_port;
 123        enum fm_eth_type type;          /* 1G or 10G ethernet */
 124        phy_interface_t enet_if;
 125        struct fsl_enet_mac *mac;       /* MAC controller */
 126        struct mii_dev *bus;
 127        struct phy_device *phydev;
 128        int phyaddr;
 129        struct eth_device *dev;
 130        int max_rx_len;
 131        struct fm_port_global_pram *rx_pram; /* Rx parameter table */
 132        struct fm_port_global_pram *tx_pram; /* Tx parameter table */
 133        void *rx_bd_ring;               /* Rx BD ring base */
 134        void *cur_rxbd;                 /* current Rx BD */
 135        void *rx_buf;                   /* Rx buffer base */
 136        void *tx_bd_ring;               /* Tx BD ring base */
 137        void *cur_txbd;                 /* current Tx BD */
 138};
 139
 140#define RX_BD_RING_SIZE         8
 141#define TX_BD_RING_SIZE         8
 142#define MAX_RXBUF_LOG2          11
 143#define MAX_RXBUF_LEN           (1 << MAX_RXBUF_LOG2)
 144
 145#define PORT_IS_ENABLED(port)   (fm_port_to_index(port) == -1 ? \
 146        0 : fm_info[fm_port_to_index(port)].enabled)
 147
 148#endif /* __FM_H__ */
 149