1/* SPDX-License-Identifier: GPL-2.0+ */ 2/* 3 * Copyright (C) 2013-2016 Synopsys, Inc. All rights reserved. 4 */ 5 6#ifndef _CONFIG_AXS10X_H_ 7#define _CONFIG_AXS10X_H_ 8 9#include <linux/sizes.h> 10/* 11 * CPU configuration 12 */ 13#define ARC_FPGA_PERIPHERAL_BASE 0xE0000000 14#define ARC_APB_PERIPHERAL_BASE 0xF0000000 15#define ARC_DWMMC_BASE (ARC_FPGA_PERIPHERAL_BASE + 0x15000) 16#define ARC_DWGMAC_BASE (ARC_FPGA_PERIPHERAL_BASE + 0x18000) 17 18/* 19 * Memory configuration 20 */ 21#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE 22 23#define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000 24#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE 25#define CONFIG_SYS_SDRAM_SIZE SZ_512M 26 27#define CONFIG_SYS_INIT_SP_ADDR \ 28 (CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE) 29 30#define CONFIG_SYS_MALLOC_LEN SZ_2M 31#define CONFIG_SYS_BOOTM_LEN SZ_128M 32#define CONFIG_SYS_LOAD_ADDR 0x82000000 33 34/* 35 * UART configuration 36 */ 37#define CONFIG_SYS_NS16550_SERIAL 38#define CONFIG_SYS_NS16550_CLK 33333333 39#define CONFIG_SYS_NS16550_MEM32 40 41/* 42 * Ethernet PHY configuration 43 */ 44 45/* 46 * USB 1.1 configuration 47 */ 48#define CONFIG_USB_OHCI_NEW 49#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1 50 51/* 52 * Environment settings 53 */ 54#define CONFIG_EXTRA_ENV_SETTINGS \ 55 "upgrade=if mmc rescan && " \ 56 "fatload mmc 0:1 ${loadaddr} u-boot-update.img && " \ 57 "iminfo ${loadaddr} && source ${loadaddr}; then; else echo " \ 58 "\"Fail to upgrade.\n" \ 59 "Do you have u-boot-update.img and u-boot.head on first (FAT) SD card partition?\"" \ 60 "; fi\0" 61 62/* 63 * Environment configuration 64 */ 65#define CONFIG_BOOTFILE "uImage" 66#define CONFIG_LOADADDR CONFIG_SYS_LOAD_ADDR 67 68/* 69 * Console configuration 70 */ 71 72#endif /* _CONFIG_AXS10X_H_ */ 73