1/* SPDX-License-Identifier: GPL-2.0+ */ 2/* 3 * Board configuration file for Variscite DART-6UL Evaluation Kit 4 * Copyright (C) 2019 Parthiban Nallathambi <parthitce@gmail.com> 5 */ 6#ifndef __DART_6UL_H 7#define __DART_6UL_H 8 9#include <linux/sizes.h> 10#include "mx6_common.h" 11 12/* SPL options */ 13#include "imx6_spl.h" 14 15/* NAND pin conflicts with usdhc2 */ 16#ifdef CONFIG_CMD_NAND 17#define CONFIG_SYS_FSL_USDHC_NUM 1 18#else 19#define CONFIG_SYS_FSL_USDHC_NUM 2 20#endif 21 22#ifdef CONFIG_CMD_NET 23#define CONFIG_FEC_ENET_DEV 0 24 25#if (CONFIG_FEC_ENET_DEV == 0) 26#define IMX_FEC_BASE ENET_BASE_ADDR 27#define CONFIG_FEC_MXC_PHYADDR 0x1 28#define CONFIG_FEC_XCV_TYPE RMII 29#define CONFIG_ETHPRIME "eth0" 30#elif (CONFIG_FEC_ENET_DEV == 1) 31#define IMX_FEC_BASE ENET2_BASE_ADDR 32#define CONFIG_FEC_MXC_PHYADDR 0x3 33#define CONFIG_FEC_XCV_TYPE RMII 34#define CONFIG_ETHPRIME "eth1" 35#endif 36#endif 37 38/* Size of malloc() pool */ 39#define CONFIG_SYS_MALLOC_LEN (16 * SZ_1M) 40 41/* Environment settings */ 42#define CONFIG_ENV_SIZE SZ_8K 43#define CONFIG_ENV_OFFSET (14 * SZ_64K) 44#define CONFIG_SYS_REDUNDAND_ENVIRONMENT 45#define CONFIG_ENV_OFFSET_REDUND \ 46 (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) 47 48/* Environment in SD */ 49#define CONFIG_SYS_MMC_ENV_DEV 0 50#define CONFIG_SYS_MMC_ENV_PART 0 51#define MMC_ROOTFS_DEV 0 52#define MMC_ROOTFS_PART 2 53 54/* Console configs */ 55#define CONFIG_MXC_UART_BASE UART1_BASE 56 57/* MMC Configs */ 58 59#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR 60#define CONFIG_SUPPORT_EMMC_BOOT 61 62/* I2C configs */ 63#ifdef CONFIG_CMD_I2C 64#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 65#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 66#define CONFIG_SYS_I2C_SPEED 100000 67#endif 68 69/* Miscellaneous configurable options */ 70#define CONFIG_SYS_MEMTEST_START 0x80000000 71#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x8000000) 72 73#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 74#define CONFIG_SYS_HZ 1000 75 76/* Physical Memory Map */ 77#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR 78#define PHYS_SDRAM_SIZE SZ_512M 79 80#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 81#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 82#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 83 84#define CONFIG_SYS_INIT_SP_OFFSET \ 85 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 86#define CONFIG_SYS_INIT_SP_ADDR \ 87 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 88 89/* USB Configs */ 90#define CONFIG_EHCI_HCD_INIT_AFTER_RESET 91#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 92#define CONFIG_MXC_USB_FLAGS 0 93#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 94 95#define CONFIG_IMX_THERMAL 96 97#define ENV_MMC \ 98 "mmcdev=" __stringify(MMC_ROOTFS_DEV) "\0" \ 99 "mmcpart=" __stringify(MMC_ROOTFS_PART) "\0" \ 100 "fitpart=1\0" \ 101 "bootdelay=3\0" \ 102 "silent=1\0" \ 103 "optargs=rw rootwait\0" \ 104 "mmcautodetect=yes\0" \ 105 "mmcrootfstype=ext4\0" \ 106 "mmcfit_name=fitImage\0" \ 107 "mmcloadfit=fatload mmc ${mmcdev}:${fitpart} ${fit_addr} " \ 108 "${mmcfit_name}\0" \ 109 "mmcargs=setenv bootargs " \ 110 "root=/dev/mmcblk${mmcdev}p${mmcpart} ${optargs} " \ 111 "console=${console} rootfstype=${mmcrootfstype}\0" \ 112 "mmc_mmc_fit=run mmcloadfit;run mmcargs addcon; bootm ${fit_addr}\0" \ 113 114/* Default environment */ 115#define CONFIG_EXTRA_ENV_SETTINGS \ 116 "fdt_high=0xffffffff\0" \ 117 "console=ttymxc0,115200n8\0" \ 118 "addcon=setenv bootargs ${bootargs} console=${console},${baudrate}\0" \ 119 "fit_addr=0x82000000\0" \ 120 ENV_MMC 121 122#define CONFIG_BOOTCOMMAND "run mmc_mmc_fit" 123 124#define BOOT_TARGET_DEVICES(func) \ 125 func(MMC, mmc, 0) \ 126 func(MMC, mmc, 1) \ 127 func(DHCP, dhcp, na) 128 129#include <config_distro_bootcmd.h> 130#endif /* __DART_6UL_H */ 131