LXR uboot/include/configs/imx8qm

   1/* SPDX-License-Identifier: GPL-2.0+ */
   2/*
   3 * Copyright 2018 NXP
   4 */
   5
   6#ifndef __IMX8QM_MEK_H
   7#define __IMX8QM_MEK_H
   8
   9#include <linux/sizes.h>
  10#include <asm/arch/imx-regs.h>
  11
  12#ifdef CONFIG_SPL_BUILD
  13#define CONFIG_SPL_TEXT_BASE                            0x0
  14#define CONFIG_SPL_MAX_SIZE                             (124 * 1024)
  15#define CONFIG_SYS_MONITOR_LEN                          (1024 * 1024)
  16#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
  17#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR         0x800
  18#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION              0
  19
  20#define CONFIG_SPL_LDSCRIPT             "arch/arm/cpu/armv8/u-boot-spl.lds"
  21#define CONFIG_SPL_STACK                0x013E000
  22#define CONFIG_SPL_BSS_START_ADDR       0x00128000
  23#define CONFIG_SPL_BSS_MAX_SIZE         0x1000  /* 4 KB */
  24#define CONFIG_SYS_SPL_MALLOC_START     0x00120000
  25#define CONFIG_SYS_SPL_MALLOC_SIZE      0x3000  /* 12 KB */
  26#define CONFIG_SERIAL_LPUART_BASE       0x5a060000
  27#define CONFIG_MALLOC_F_ADDR            0x00120000
  28
  29#define CONFIG_SPL_RAW_IMAGE_ARM_TRUSTED_FIRMWARE
  30
  31#define CONFIG_SPL_ABORT_ON_RAW_IMAGE
  32
  33#define CONFIG_OF_EMBED
  34#endif
  35
  36#define CONFIG_REMAKE_ELF
  37
  38#define CONFIG_BOARD_EARLY_INIT_F
  39
  40/* Flat Device Tree Definitions */
  41#define CONFIG_OF_BOARD_SETUP
  42
  43#undef CONFIG_CMD_EXPORTENV
  44#undef CONFIG_CMD_IMPORTENV
  45#undef CONFIG_CMD_IMLS
  46
  47#undef CONFIG_CMD_CRC32
  48
  49#define CONFIG_SYS_FSL_ESDHC_ADDR       0
  50#define USDHC1_BASE_ADDR                0x5B010000
  51#define USDHC2_BASE_ADDR                0x5B020000
  52#define CONFIG_SUPPORT_EMMC_BOOT        /* eMMC specific */
  53
  54#define CONFIG_ENV_OVERWRITE
  55
  56#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
  57
  58/* Initial environment variables */
  59#define CONFIG_EXTRA_ENV_SETTINGS               \
  60        "script=boot.scr\0" \
  61        "image=Image\0" \
  62        "panel=NULL\0" \
  63        "console=ttyLP0,${baudrate} earlycon=lpuart32,0x5a060000,${baudrate}\0" \
  64        "fdt_addr=0x83000000\0"                 \
  65        "fdt_high=0xffffffffffffffff\0"         \
  66        "boot_fdt=try\0" \
  67        "fdt_file=fsl-imx8qxp-mek.dtb\0" \
  68        "initrd_addr=0x83800000\0"              \
  69        "initrd_high=0xffffffffffffffff\0" \
  70        "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
  71        "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
  72        "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
  73        "mmcautodetect=yes\0" \
  74        "mmcargs=setenv bootargs console=${console} root=${mmcroot}\0 " \
  75        "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
  76        "bootscript=echo Running bootscript from mmc ...; " \
  77                "source\0" \
  78        "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
  79        "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
  80        "mmcboot=echo Booting from mmc ...; " \
  81                "run mmcargs; " \
  82                "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
  83                        "if run loadfdt; then " \
  84                                "booti ${loadaddr} - ${fdt_addr}; " \
  85                        "else " \
  86                                "echo WARN: Cannot load the DT; " \
  87                        "fi; " \
  88                "else " \
  89                        "echo wait for boot; " \
  90                "fi;\0" \
  91        "netargs=setenv bootargs console=${console} " \
  92                "root=/dev/nfs " \
  93                "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
  94        "netboot=echo Booting from net ...; " \
  95                "run netargs;  " \
  96                "if test ${ip_dyn} = yes; then " \
  97                        "setenv get_cmd dhcp; " \
  98                "else " \
  99                        "setenv get_cmd tftp; " \
 100                "fi; " \
 101                "${get_cmd} ${loadaddr} ${image}; " \
 102                "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
 103                        "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
 104                                "booti ${loadaddr} - ${fdt_addr}; " \
 105                        "else " \
 106                                "echo WARN: Cannot load the DT; " \
 107                        "fi; " \
 108                "else " \
 109                        "booti; " \
 110                "fi;\0"
 111
 112#define CONFIG_BOOTCOMMAND \
 113           "mmc dev ${mmcdev}; if mmc rescan; then " \
 114                   "if run loadbootscript; then " \
 115                           "run bootscript; " \
 116                   "else " \
 117                           "if run loadimage; then " \
 118                                   "run mmcboot; " \
 119                           "else run netboot; " \
 120                           "fi; " \
 121                   "fi; " \
 122           "else booti ${loadaddr} - ${fdt_addr}; fi"
 123
 124/* Link Definitions */
 125#define CONFIG_LOADADDR                 0x80280000
 126
 127#define CONFIG_SYS_LOAD_ADDR           CONFIG_LOADADDR
 128
 129#define CONFIG_SYS_INIT_SP_ADDR         0x80200000
 130
 131/* Default environment is in SD */
 132#define CONFIG_ENV_SIZE                 0x1000
 133#define CONFIG_ENV_OFFSET               (64 * SZ_64K)
 134#define CONFIG_SYS_MMC_ENV_PART         0       /* user area */
 135
 136#define CONFIG_SYS_MMC_IMG_LOAD_PART    1
 137
 138/* On LPDDR4 board, USDHC1 is for eMMC, USDHC2 is for SD on CPU board */
 139#define CONFIG_SYS_MMC_ENV_DEV          1   /* USDHC2 */
 140#define CONFIG_MMCROOT                  "/dev/mmcblk1p2"  /* USDHC2 */
 141#define CONFIG_SYS_FSL_USDHC_NUM        2
 142
 143/* Size of malloc() pool */
 144#define CONFIG_SYS_MALLOC_LEN           ((CONFIG_ENV_SIZE + (32 * 1024)) * 1024)
 145
 146#define CONFIG_SYS_SDRAM_BASE           0x80000000
 147#define PHYS_SDRAM_1                    0x80000000
 148#define PHYS_SDRAM_2                    0x880000000
 149#define PHYS_SDRAM_1_SIZE               0x80000000      /* 2 GB */
 150#define PHYS_SDRAM_2_SIZE               0x100000000     /* 4 GB */
 151
 152/* Serial */
 153#define CONFIG_BAUDRATE                 115200
 154
 155/* Generic Timer Definitions */
 156#define COUNTER_FREQUENCY               8000000 /* 8MHz */
 157
 158/* Networking */
 159#define CONFIG_FEC_XCV_TYPE             RGMII
 160#define FEC_QUIRK_ENET_MAC
 161
 162#endif /* __IMX8QM_MEK_H */
 163