1/* SPDX-License-Identifier: GPL-2.0+ */ 2/* 3 * ti_omap3_common.h 4 * 5 * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ 6 * 7 * For more details, please see the technical documents listed at 8 * http://www.ti.com/product/omap3530 9 * http://www.ti.com/product/omap3630 10 * http://www.ti.com/product/dm3730 11 */ 12 13#ifndef __CONFIG_TI_OMAP3_COMMON_H__ 14#define __CONFIG_TI_OMAP3_COMMON_H__ 15 16/* 17 * High Level Configuration Options 18 */ 19 20#include <asm/arch/cpu.h> 21#include <asm/arch/omap.h> 22 23/* Clock Defines */ 24#define V_OSCK 26000000 /* Clock output from T2 */ 25#define V_SCLK (V_OSCK >> 1) 26 27/* NS16550 Configuration */ 28#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ 29#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK 30#if !defined(CONFIG_DM_SERIAL) 31#define CONFIG_SYS_NS16550_SERIAL 32#define CONFIG_SYS_NS16550_REG_SIZE (-4) 33#endif /* !CONFIG_DM_SERIAL */ 34#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, \ 35 115200} 36 37/* Select serial console configuration */ 38#ifdef CONFIG_SPL_BUILD 39#define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1 40#define CONFIG_SYS_NS16550_COM2 OMAP34XX_UART2 41#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 42#endif 43 44/* Physical Memory Map */ 45#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 46#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 47 48/* 49 * OMAP3 has 12 GP timers, they can be driven by the system clock 50 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). 51 * This rate is divided by a local divisor. 52 */ 53#define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) 54 55#define CONFIG_SYS_MONITOR_LEN (256 << 10) 56 57/* SPL */ 58#define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_SDRAM_BASE + \ 59 (64 << 20)) 60 61#ifdef CONFIG_NAND 62#define CONFIG_SYS_NAND_BASE 0x30000000 63#endif 64 65/* Now bring in the rest of the common code. */ 66#include <configs/ti_armv7_omap.h> 67 68#endif /* __CONFIG_TI_OMAP3_COMMON_H__ */ 69