LXR uboot/arch/arm/cpu/arm926ejs/lpc32xx/timer.c

   1// SPDX-License-Identifier: GPL-2.0+
   2/*
   3 * Copyright (C) 2011 Vladimir Zapolskiy <vz@mleia.com>
   4 */
   5
   6#include <common.h>
   7#include <time.h>
   8#include <asm/arch/cpu.h>
   9#include <asm/arch/clk.h>
  10#include <asm/arch/timer.h>
  11#include <asm/io.h>
  12
  13static struct timer_regs  *timer0 = (struct timer_regs *)TIMER0_BASE;
  14static struct timer_regs  *timer1 = (struct timer_regs *)TIMER1_BASE;
  15static struct clk_pm_regs *clk    = (struct clk_pm_regs *)CLK_PM_BASE;
  16
  17static void lpc32xx_timer_clock(u32 bit, int enable)
  18{
  19        if (enable)
  20                setbits_le32(&clk->timclk_ctrl1, bit);
  21        else
  22                clrbits_le32(&clk->timclk_ctrl1, bit);
  23}
  24
  25static void lpc32xx_timer_reset(struct timer_regs *timer, u32 freq)
  26{
  27        writel(TIMER_TCR_COUNTER_RESET,   &timer->tcr);
  28        writel(TIMER_TCR_COUNTER_DISABLE, &timer->tcr);
  29        writel(0, &timer->tc);
  30        writel(0, &timer->pr);
  31
  32        /* Count mode is every rising PCLK edge */
  33        writel(TIMER_CTCR_MODE_TIMER, &timer->ctcr);
  34
  35        /* Set prescale counter value */
  36        writel((get_periph_clk_rate() / freq) - 1, &timer->pr);
  37
  38        /* Ensure that the counter is not reset when matching TC */
  39        writel(0,  &timer->mcr);
  40}
  41
  42static void lpc32xx_timer_count(struct timer_regs *timer, int enable)
  43{
  44        if (enable)
  45                writel(TIMER_TCR_COUNTER_ENABLE,  &timer->tcr);
  46        else
  47                writel(TIMER_TCR_COUNTER_DISABLE, &timer->tcr);
  48}
  49
  50int timer_init(void)
  51{
  52        lpc32xx_timer_clock(CLK_TIMCLK_TIMER0, 1);
  53        lpc32xx_timer_reset(timer0, CONFIG_SYS_HZ);
  54        lpc32xx_timer_count(timer0, 1);
  55
  56        return 0;
  57}
  58
  59ulong get_timer(ulong base)
  60{
  61        return readl(&timer0->tc) - base;
  62}
  63
  64void __udelay(unsigned long usec)
  65{
  66        lpc32xx_timer_clock(CLK_TIMCLK_TIMER1, 1);
  67        lpc32xx_timer_reset(timer1, CONFIG_SYS_HZ * 1000);
  68        lpc32xx_timer_count(timer1, 1);
  69
  70        while (readl(&timer1->tc) < usec)
  71                /* NOP */;
  72
  73        lpc32xx_timer_count(timer1, 0);
  74        lpc32xx_timer_clock(CLK_TIMCLK_TIMER1, 0);
  75}
  76
  77unsigned long long get_ticks(void)
  78{
  79        return get_timer(0);
  80}
  81
  82ulong get_tbclk(void)
  83{
  84        return CONFIG_SYS_HZ;
  85}
  86