LXR uboot/arch/arm/mach-rockchip/rk3188/rk3188.c

   1// SPDX-License-Identifier: GPL-2.0+
   2/*
   3 * (C) Copyright 2019 Rockchip Electronics Co., Ltd
   4 */
   5#include <common.h>
   6#include <dm.h>
   7#include <syscon.h>
   8#include <asm/io.h>
   9#include <asm/arch-rockchip/bootrom.h>
  10#include <asm/arch-rockchip/clock.h>
  11#include <asm/arch-rockchip/grf_rk3188.h>
  12#include <asm/arch-rockchip/hardware.h>
  13
  14#define GRF_BASE        0x20008000
  15
  16const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = {
  17        [BROM_BOOTSOURCE_EMMC] = "/dwmmc@1021c000",
  18        [BROM_BOOTSOURCE_SD] = "/dwmmc@10214000",
  19};
  20
  21#ifdef CONFIG_DEBUG_UART_BOARD_INIT
  22void board_debug_uart_init(void)
  23{
  24        /* Enable early UART on the RK3188 */
  25        struct rk3188_grf * const grf = (void *)GRF_BASE;
  26        enum {
  27                GPIO1B1_SHIFT           = 2,
  28                GPIO1B1_MASK            = 3,
  29                GPIO1B1_GPIO            = 0,
  30                GPIO1B1_UART2_SOUT,
  31                GPIO1B1_JTAG_TDO,
  32
  33                GPIO1B0_SHIFT           = 0,
  34                GPIO1B0_MASK            = 3,
  35                GPIO1B0_GPIO            = 0,
  36                GPIO1B0_UART2_SIN,
  37                GPIO1B0_JTAG_TDI,
  38        };
  39
  40        rk_clrsetreg(&grf->gpio1b_iomux,
  41                     GPIO1B1_MASK << GPIO1B1_SHIFT |
  42                     GPIO1B0_MASK << GPIO1B0_SHIFT,
  43                     GPIO1B1_UART2_SOUT << GPIO1B1_SHIFT |
  44                     GPIO1B0_UART2_SIN << GPIO1B0_SHIFT);
  45}
  46#endif
  47
  48#ifdef CONFIG_SPL_BUILD
  49int arch_cpu_init(void)
  50{
  51        struct rk3188_grf *grf;
  52
  53        grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
  54        if (IS_ERR(grf)) {
  55                pr_err("grf syscon returned %ld\n", PTR_ERR(grf));
  56                return 0;
  57        }
  58#ifdef CONFIG_ROCKCHIP_USB_UART
  59        rk_clrsetreg(&grf->uoc0_con[0],
  60                     SIDDQ_MASK | UOC_DISABLE_MASK | COMMON_ON_N_MASK,
  61                     1 << SIDDQ_SHIFT | 1 << UOC_DISABLE_SHIFT |
  62                     1 << COMMON_ON_N_SHIFT);
  63        rk_clrsetreg(&grf->uoc0_con[2],
  64                     SOFT_CON_SEL_MASK, 1 << SOFT_CON_SEL_SHIFT);
  65        rk_clrsetreg(&grf->uoc0_con[3],
  66                     OPMODE_MASK | XCVRSELECT_MASK |
  67                     TERMSEL_FULLSPEED_MASK | SUSPENDN_MASK,
  68                     OPMODE_NODRIVING << OPMODE_SHIFT |
  69                     XCVRSELECT_FSTRANSC << XCVRSELECT_SHIFT |
  70                     1 << TERMSEL_FULLSPEED_SHIFT |
  71                     1 << SUSPENDN_SHIFT);
  72        rk_clrsetreg(&grf->uoc0_con[0],
  73                     BYPASSSEL_MASK | BYPASSDMEN_MASK,
  74                     1 << BYPASSSEL_SHIFT | 1 << BYPASSDMEN_SHIFT);
  75#endif
  76
  77        /* enable noc remap to mimic legacy loaders */
  78        rk_clrsetreg(&grf->soc_con0,
  79                     NOC_REMAP_MASK << NOC_REMAP_SHIFT,
  80                     NOC_REMAP_MASK << NOC_REMAP_SHIFT);
  81
  82        return 0;
  83}
  84#endif
  85
  86#ifdef CONFIG_SPL_BUILD
  87static int setup_led(void)
  88{
  89#ifdef CONFIG_SPL_LED
  90        struct udevice *dev;
  91        char *led_name;
  92        int ret;
  93
  94        led_name = fdtdec_get_config_string(gd->fdt_blob, "u-boot,boot-led");
  95        if (!led_name)
  96                return 0;
  97        ret = led_get_by_label(led_name, &dev);
  98        if (ret) {
  99                debug("%s: get=%d\n", __func__, ret);
 100                return ret;
 101        }
 102        ret = led_set_on(dev, 1);
 103        if (ret)
 104                return ret;
 105#endif
 106
 107        return 0;
 108}
 109
 110void spl_board_init(void)
 111{
 112        int ret;
 113
 114        ret = setup_led();
 115        if (ret) {
 116                debug("LED ret=%d\n", ret);
 117                hang();
 118        }
 119}
 120#endif
 121