1// SPDX-License-Identifier: GPL-2.0+ 2/* 3 * (C) Copyright 2002 4 * Sysgo Real-Time Solutions, GmbH <www.elinos.com> 5 * Marius Groeger <mgroeger@sysgo.de> 6 * 7 * (C) Copyright 2002 8 * David Mueller, ELSOFT AG, <d.mueller@elsoft.ch> 9 * 10 * (C) Copyright 2003 11 * Texas Instruments, <www.ti.com> 12 * Kshitij Gupta <Kshitij@ti.com> 13 * 14 * (C) Copyright 2004 15 * ARM Ltd. 16 * Philippe Robin, <philippe.robin@arm.com> 17 */ 18 19#include <common.h> 20#include <div64.h> 21#include <time.h> 22 23#ifdef CONFIG_ARCH_CINTEGRATOR 24#define DIV_CLOCK_INIT 1 25#define TIMER_LOAD_VAL 0xFFFFFFFFL 26#else 27#define DIV_CLOCK_INIT 256 28#define TIMER_LOAD_VAL 0x0000FFFFL 29#endif 30/* The Integrator/CP timer1 is clocked at 1MHz 31 * can be divided by 16 or 256 32 * and can be set up as a 32-bit timer 33 */ 34/* U-Boot expects a 32 bit timer, running at CONFIG_SYS_HZ */ 35/* Keep total timer count to avoid losing decrements < div_timer */ 36static unsigned long long total_count = 0; 37static unsigned long long lastdec; /* Timer reading at last call */ 38/* Divisor applied to timer clock */ 39static unsigned long long div_clock = DIV_CLOCK_INIT; 40static unsigned long long div_timer = 1; /* Divisor to convert timer reading 41 * change to U-Boot ticks 42 */ 43/* CONFIG_SYS_HZ = CONFIG_SYS_HZ_CLOCK/(div_clock * div_timer) */ 44static ulong timestamp; /* U-Boot ticks since startup */ 45 46#define READ_TIMER (*(volatile ulong *)(CONFIG_SYS_TIMERBASE+4)) 47 48/* all function return values in U-Boot ticks i.e. (1/CONFIG_SYS_HZ) sec 49 * - unless otherwise stated 50 */ 51 52/* starts up a counter 53 * - the Integrator/CP timer can be set up to issue an interrupt */ 54int timer_init (void) 55{ 56 /* Load timer with initial value */ 57 *(volatile ulong *)(CONFIG_SYS_TIMERBASE + 0) = TIMER_LOAD_VAL; 58#ifdef CONFIG_ARCH_CINTEGRATOR 59 /* Set timer to be 60 * enabled 1 61 * periodic 1 62 * no interrupts 0 63 * X 0 64 * divider 1 00 == less rounding error 65 * 32 bit 1 66 * wrapping 0 67 */ 68 *(volatile ulong *)(CONFIG_SYS_TIMERBASE + 8) = 0x000000C2; 69#else 70 /* Set timer to be 71 * enabled 1 72 * free-running 0 73 * XX 00 74 * divider 256 10 75 * XX 00 76 */ 77 *(volatile ulong *)(CONFIG_SYS_TIMERBASE + 8) = 0x00000088; 78#endif 79 80 /* init the timestamp */ 81 total_count = 0ULL; 82 /* capure current decrementer value */ 83 lastdec = READ_TIMER; 84 /* start "advancing" time stamp from 0 */ 85 timestamp = 0L; 86 87 div_timer = CONFIG_SYS_HZ_CLOCK; 88 do_div(div_timer, CONFIG_SYS_HZ); 89 do_div(div_timer, div_clock); 90 91 return (0); 92} 93 94/* 95 * timer without interrupts 96 */ 97 98/* converts the timer reading to U-Boot ticks */ 99/* the timestamp is the number of ticks since reset */ 100static ulong get_timer_masked (void) 101{ 102 /* get current count */ 103 unsigned long long now = READ_TIMER; 104 105 if(now > lastdec) { 106 /* Must have wrapped */ 107 total_count += lastdec + TIMER_LOAD_VAL + 1 - now; 108 } else { 109 total_count += lastdec - now; 110 } 111 lastdec = now; 112 113 /* Reuse "now" */ 114 now = total_count; 115 do_div(now, div_timer); 116 timestamp = now; 117 118 return timestamp; 119} 120 121ulong get_timer (ulong base_ticks) 122{ 123 return get_timer_masked () - base_ticks; 124} 125 126/* delay usec useconds */ 127void __udelay (unsigned long usec) 128{ 129 ulong tmo, tmp; 130 131 /* Convert to U-Boot ticks */ 132 tmo = usec * CONFIG_SYS_HZ; 133 tmo /= (1000000L); 134 135 tmp = get_timer_masked(); /* get current timestamp */ 136 tmo += tmp; /* form target timestamp */ 137 138 while (get_timer_masked () < tmo) {/* loop till event */ 139 /*NOP*/; 140 } 141} 142 143/* 144 * This function is derived from PowerPC code (read timebase as long long). 145 * On ARM it just returns the timer value. 146 */ 147unsigned long long get_ticks(void) 148{ 149 return get_timer(0); 150} 151 152/* 153 * Return the timebase clock frequency 154 * i.e. how often the timer decrements 155 */ 156ulong get_tbclk (void) 157{ 158 unsigned long long tmp = CONFIG_SYS_HZ_CLOCK; 159 160 do_div(tmp, div_clock); 161 162 return tmp; 163} 164