LXR uboot/board/freescale/mpc8313erdb/mpc8313erdb.c

   1// SPDX-License-Identifier: GPL-2.0+
   2/*
   3 * Copyright (C) Freescale Semiconductor, Inc. 2006-2007
   4 *
   5 * Author: Scott Wood <scottwood@freescale.com>
   6 */
   7
   8#include <common.h>
   9#include <init.h>
  10#if defined(CONFIG_OF_LIBFDT)
  11#include <linux/libfdt.h>
  12#endif
  13#include <pci.h>
  14#include <mpc83xx.h>
  15#include <vsc7385.h>
  16#include <ns16550.h>
  17#include <nand.h>
  18#if defined(CONFIG_MPC83XX_GPIO) && !defined(CONFIG_SPL_BUILD)
  19#include <asm/gpio.h>
  20#endif
  21
  22DECLARE_GLOBAL_DATA_PTR;
  23
  24int board_early_init_f(void)
  25{
  26#ifndef CONFIG_SYS_8313ERDB_BROKEN_PMC
  27        volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
  28
  29        if (im->pmc.pmccr1 & PMCCR1_POWER_OFF)
  30                gd->flags |= GD_FLG_SILENT;
  31#endif
  32#if defined(CONFIG_MPC83XX_GPIO) && !defined(CONFIG_SPL_BUILD)
  33        mpc83xx_gpio_init_f();
  34#endif
  35
  36        return 0;
  37}
  38
  39int board_early_init_r(void)
  40{
  41#if defined(CONFIG_MPC83XX_GPIO) && !defined(CONFIG_SPL_BUILD)
  42        mpc83xx_gpio_init_r();
  43#endif
  44
  45        return 0;
  46}
  47
  48int checkboard(void)
  49{
  50        puts("Board: Freescale MPC8313ERDB\n");
  51        return 0;
  52}
  53
  54#ifndef CONFIG_SPL_BUILD
  55static struct pci_region pci_regions[] = {
  56        {
  57                .bus_start = CONFIG_SYS_PCI1_MEM_BASE,
  58                .phys_start = CONFIG_SYS_PCI1_MEM_PHYS,
  59                .size = CONFIG_SYS_PCI1_MEM_SIZE,
  60                .flags = PCI_REGION_MEM | PCI_REGION_PREFETCH
  61        },
  62        {
  63                .bus_start = CONFIG_SYS_PCI1_MMIO_BASE,
  64                .phys_start = CONFIG_SYS_PCI1_MMIO_PHYS,
  65                .size = CONFIG_SYS_PCI1_MMIO_SIZE,
  66                .flags = PCI_REGION_MEM
  67        },
  68        {
  69                .bus_start = CONFIG_SYS_PCI1_IO_BASE,
  70                .phys_start = CONFIG_SYS_PCI1_IO_PHYS,
  71                .size = CONFIG_SYS_PCI1_IO_SIZE,
  72                .flags = PCI_REGION_IO
  73        }
  74};
  75
  76void pci_init_board(void)
  77{
  78        volatile immap_t *immr = (volatile immap_t *)CONFIG_SYS_IMMR;
  79        volatile clk83xx_t *clk = (volatile clk83xx_t *)&immr->clk;
  80        volatile law83xx_t *pci_law = immr->sysconf.pcilaw;
  81        struct pci_region *reg[] = { pci_regions };
  82
  83        /* Enable all 3 PCI_CLK_OUTPUTs. */
  84        clk->occr |= 0xe0000000;
  85
  86        /*
  87         * Configure PCI Local Access Windows
  88         */
  89        pci_law[0].bar = CONFIG_SYS_PCI1_MEM_PHYS & LAWBAR_BAR;
  90        pci_law[0].ar = LBLAWAR_EN | LBLAWAR_512MB;
  91
  92        pci_law[1].bar = CONFIG_SYS_PCI1_IO_PHYS & LAWBAR_BAR;
  93        pci_law[1].ar = LBLAWAR_EN | LBLAWAR_1MB;
  94
  95        mpc83xx_pci_init(1, reg);
  96}
  97
  98/*
  99 * Miscellaneous late-boot configurations
 100 *
 101 * If a VSC7385 microcode image is present, then upload it.
 102*/
 103int misc_init_r(void)
 104{
 105        int rc = 0;
 106
 107#ifdef CONFIG_VSC7385_IMAGE
 108        if (vsc7385_upload_firmware((void *) CONFIG_VSC7385_IMAGE,
 109                CONFIG_VSC7385_IMAGE_SIZE)) {
 110                puts("Failure uploading VSC7385 microcode.\n");
 111                rc = 1;
 112        }
 113#endif
 114
 115        return rc;
 116}
 117
 118#if defined(CONFIG_OF_BOARD_SETUP)
 119int ft_board_setup(void *blob, bd_t *bd)
 120{
 121        ft_cpu_setup(blob, bd);
 122#ifdef CONFIG_PCI
 123        ft_pci_setup(blob, bd);
 124#endif
 125
 126        return 0;
 127}
 128#endif
 129#else /* CONFIG_SPL_BUILD */
 130void board_init_f(ulong bootflag)
 131{
 132        board_early_init_f();
 133        NS16550_init((NS16550_t)(CONFIG_SYS_IMMR + 0x4500),
 134                     CONFIG_SYS_NS16550_CLK / 16 / CONFIG_BAUDRATE);
 135        puts("NAND boot... ");
 136        timer_init();
 137        dram_init();
 138        relocate_code(CONFIG_SYS_NAND_U_BOOT_RELOC_SP, (gd_t *)gd,
 139                      CONFIG_SYS_NAND_U_BOOT_RELOC);
 140}
 141
 142void board_init_r(gd_t *gd, ulong dest_addr)
 143{
 144        nand_boot();
 145}
 146
 147void putc(char c)
 148{
 149        if (gd->flags & GD_FLG_SILENT)
 150                return;
 151
 152        if (c == '\n')
 153                NS16550_putc((NS16550_t)(CONFIG_SYS_IMMR + 0x4500), '\r');
 154
 155        NS16550_putc((NS16550_t)(CONFIG_SYS_IMMR + 0x4500), c);
 156}
 157#endif
 158