LXR uboot/drivers/pinctrl/nxp/pinctrl-scu.c

   1// SPDX-License-Identifier: GPL-2.0+
   2/*
   3 * Copyright 2018 NXP
   4 */
   5
   6#include <common.h>
   7#include <errno.h>
   8#include <linux/bitops.h>
   9#include <asm/io.h>
  10#include <asm/arch/sci/sci.h>
  11#include <misc.h>
  12
  13#include "pinctrl-imx.h"
  14
  15#define PADRING_IFMUX_EN_SHIFT          31
  16#define PADRING_IFMUX_EN_MASK           BIT(31)
  17#define PADRING_GP_EN_SHIFT             30
  18#define PADRING_GP_EN_MASK              BIT(30)
  19#define PADRING_IFMUX_SHIFT             27
  20#define PADRING_IFMUX_MASK              GENMASK(29, 27)
  21
  22static int imx_pinconf_scu_set(struct imx_pinctrl_soc_info *info, u32 pad,
  23                               u32 mux, u32 val)
  24{
  25        int ret;
  26
  27        /*
  28         * Mux should be done in pmx set, but we do not have a good api
  29         * to handle that in scfw, so config it in pad conf func
  30         */
  31
  32        val |= PADRING_IFMUX_EN_MASK;
  33        val |= PADRING_GP_EN_MASK;
  34        val |= (mux << PADRING_IFMUX_SHIFT) & PADRING_IFMUX_MASK;
  35
  36        ret = sc_pad_set(-1, pad, val);
  37        if (ret)
  38                printf("%s %d\n", __func__, ret);
  39
  40        return 0;
  41}
  42
  43int imx_pinctrl_scu_conf_pins(struct imx_pinctrl_soc_info *info, u32 *pin_data,
  44                              int npins)
  45{
  46        int pin_id, mux, config_val;
  47        int i, j = 0;
  48        int ret;
  49
  50        /*
  51         * Refer to linux documentation for details:
  52         * Documentation/devicetree/bindings/pinctrl/fsl,imx-pinctrl.txt
  53         */
  54        for (i = 0; i < npins; i++) {
  55                pin_id = pin_data[j++];
  56                mux = pin_data[j++];
  57                config_val = pin_data[j++];
  58
  59                ret = imx_pinconf_scu_set(info, pin_id, mux, config_val);
  60                if (ret)
  61                        printf("Set pin %d, mux %d, val %d, error\n", pin_id,
  62                               mux, config_val);
  63        }
  64
  65        return 0;
  66}
  67