1/* SPDX-License-Identifier: GPL-2.0+ */ 2/* 3 * Register definitions for the Atmel USART3 module. 4 * 5 * Copyright (C) 2005-2006 Atmel Corporation 6 * 7 * Modified to support C structure SoC access by 8 * Andreas Bießmann <biessmann@corscience.de> 9 */ 10#ifndef __DRIVERS_ATMEL_USART_H__ 11#define __DRIVERS_ATMEL_USART_H__ 12 13/* USART3 register footprint */ 14typedef struct atmel_usart3 { 15 u32 cr; 16 u32 mr; 17 u32 ier; 18 u32 idr; 19 u32 imr; 20 u32 csr; 21 u32 rhr; 22 u32 thr; 23 u32 brgr; 24 u32 rtor; 25 u32 ttgr; 26 u32 reserved0[5]; 27 u32 fidi; 28 u32 ner; 29 u32 reserved1; 30 u32 ifr; 31 u32 man; 32 u32 reserved2[54]; /* version and PDC not needed */ 33} atmel_usart3_t; 34 35/* Bitfields in CR */ 36#define USART3_RSTRX_OFFSET 2 37#define USART3_RSTRX_SIZE 1 38#define USART3_RSTTX_OFFSET 3 39#define USART3_RSTTX_SIZE 1 40#define USART3_RXEN_OFFSET 4 41#define USART3_RXEN_SIZE 1 42#define USART3_RXDIS_OFFSET 5 43#define USART3_RXDIS_SIZE 1 44#define USART3_TXEN_OFFSET 6 45#define USART3_TXEN_SIZE 1 46#define USART3_TXDIS_OFFSET 7 47#define USART3_TXDIS_SIZE 1 48#define USART3_RSTSTA_OFFSET 8 49#define USART3_RSTSTA_SIZE 1 50#define USART3_STTBRK_OFFSET 9 51#define USART3_STTBRK_SIZE 1 52#define USART3_STPBRK_OFFSET 10 53#define USART3_STPBRK_SIZE 1 54#define USART3_STTTO_OFFSET 11 55#define USART3_STTTO_SIZE 1 56#define USART3_SENDA_OFFSET 12 57#define USART3_SENDA_SIZE 1 58#define USART3_RSTIT_OFFSET 13 59#define USART3_RSTIT_SIZE 1 60#define USART3_RSTNACK_OFFSET 14 61#define USART3_RSTNACK_SIZE 1 62#define USART3_RETTO_OFFSET 15 63#define USART3_RETTO_SIZE 1 64#define USART3_DTREN_OFFSET 16 65#define USART3_DTREN_SIZE 1 66#define USART3_DTRDIS_OFFSET 17 67#define USART3_DTRDIS_SIZE 1 68#define USART3_RTSEN_OFFSET 18 69#define USART3_RTSEN_SIZE 1 70#define USART3_RTSDIS_OFFSET 19 71#define USART3_RTSDIS_SIZE 1 72#define USART3_COMM_TX_OFFSET 30 73#define USART3_COMM_TX_SIZE 1 74#define USART3_COMM_RX_OFFSET 31 75#define USART3_COMM_RX_SIZE 1 76 77/* Bitfields in MR */ 78#define USART3_USART_MODE_OFFSET 0 79#define USART3_USART_MODE_SIZE 4 80#define USART3_USCLKS_OFFSET 4 81#define USART3_USCLKS_SIZE 2 82#define USART3_CHRL_OFFSET 6 83#define USART3_CHRL_SIZE 2 84#define USART3_SYNC_OFFSET 8 85#define USART3_SYNC_SIZE 1 86#define USART3_PAR_OFFSET 9 87#define USART3_PAR_SIZE 3 88#define USART3_NBSTOP_OFFSET 12 89#define USART3_NBSTOP_SIZE 2 90#define USART3_CHMODE_OFFSET 14 91#define USART3_CHMODE_SIZE 2 92#define USART3_MSBF_OFFSET 16 93#define USART3_MSBF_SIZE 1 94#define USART3_MODE9_OFFSET 17 95#define USART3_MODE9_SIZE 1 96#define USART3_CLKO_OFFSET 18 97#define USART3_CLKO_SIZE 1 98#define USART3_OVER_OFFSET 19 99#define USART3_OVER_SIZE 1 100#define USART3_INACK_OFFSET 20 101#define USART3_INACK_SIZE 1 102#define USART3_DSNACK_OFFSET 21 103#define USART3_DSNACK_SIZE 1 104#define USART3_MAX_ITERATION_OFFSET 24 105#define USART3_MAX_ITERATION_SIZE 3 106#define USART3_FILTER_OFFSET 28 107#define USART3_FILTER_SIZE 1 108 109/* Bitfields in CSR */ 110#define USART3_RXRDY_OFFSET 0 111#define USART3_RXRDY_SIZE 1 112#define USART3_TXRDY_OFFSET 1 113#define USART3_TXRDY_SIZE 1 114#define USART3_RXBRK_OFFSET 2 115#define USART3_RXBRK_SIZE 1 116#define USART3_ENDRX_OFFSET 3 117#define USART3_ENDRX_SIZE 1 118#define USART3_ENDTX_OFFSET 4 119#define USART3_ENDTX_SIZE 1 120#define USART3_OVRE_OFFSET 5 121#define USART3_OVRE_SIZE 1 122#define USART3_FRAME_OFFSET 6 123#define USART3_FRAME_SIZE 1 124#define USART3_PARE_OFFSET 7 125#define USART3_PARE_SIZE 1 126#define USART3_TIMEOUT_OFFSET 8 127#define USART3_TIMEOUT_SIZE 1 128#define USART3_TXEMPTY_OFFSET 9 129#define USART3_TXEMPTY_SIZE 1 130#define USART3_ITERATION_OFFSET 10 131#define USART3_ITERATION_SIZE 1 132#define USART3_TXBUFE_OFFSET 11 133#define USART3_TXBUFE_SIZE 1 134#define USART3_RXBUFF_OFFSET 12 135#define USART3_RXBUFF_SIZE 1 136#define USART3_NACK_OFFSET 13 137#define USART3_NACK_SIZE 1 138#define USART3_RIIC_OFFSET 16 139#define USART3_RIIC_SIZE 1 140#define USART3_DSRIC_OFFSET 17 141#define USART3_DSRIC_SIZE 1 142#define USART3_DCDIC_OFFSET 18 143#define USART3_DCDIC_SIZE 1 144#define USART3_CTSIC_OFFSET 19 145#define USART3_CTSIC_SIZE 1 146#define USART3_RI_OFFSET 20 147#define USART3_RI_SIZE 1 148#define USART3_DSR_OFFSET 21 149#define USART3_DSR_SIZE 1 150#define USART3_DCD_OFFSET 22 151#define USART3_DCD_SIZE 1 152#define USART3_CTS_OFFSET 23 153#define USART3_CTS_SIZE 1 154 155/* Bitfields in RHR */ 156#define USART3_RXCHR_OFFSET 0 157#define USART3_RXCHR_SIZE 9 158 159/* Bitfields in THR */ 160#define USART3_TXCHR_OFFSET 0 161#define USART3_TXCHR_SIZE 9 162 163/* Bitfields in BRGR */ 164#define USART3_CD_OFFSET 0 165#define USART3_CD_SIZE 16 166 167/* Bitfields in RTOR */ 168#define USART3_TO_OFFSET 0 169#define USART3_TO_SIZE 16 170 171/* Bitfields in TTGR */ 172#define USART3_TG_OFFSET 0 173#define USART3_TG_SIZE 8 174 175/* Bitfields in FIDI */ 176#define USART3_FI_DI_RATIO_OFFSET 0 177#define USART3_FI_DI_RATIO_SIZE 11 178 179/* Bitfields in NER */ 180#define USART3_NB_ERRORS_OFFSET 0 181#define USART3_NB_ERRORS_SIZE 8 182 183/* Bitfields in XXR */ 184#define USART3_XOFF_OFFSET 0 185#define USART3_XOFF_SIZE 8 186#define USART3_XON_OFFSET 8 187#define USART3_XON_SIZE 8 188 189/* Bitfields in IFR */ 190#define USART3_IRDA_FILTER_OFFSET 0 191#define USART3_IRDA_FILTER_SIZE 8 192 193/* Bitfields in RCR */ 194#define USART3_RXCTR_OFFSET 0 195#define USART3_RXCTR_SIZE 16 196 197/* Bitfields in TCR */ 198#define USART3_TXCTR_OFFSET 0 199#define USART3_TXCTR_SIZE 16 200 201/* Bitfields in RNCR */ 202#define USART3_RXNCR_OFFSET 0 203#define USART3_RXNCR_SIZE 16 204 205/* Bitfields in TNCR */ 206#define USART3_TXNCR_OFFSET 0 207#define USART3_TXNCR_SIZE 16 208 209/* Bitfields in PTCR */ 210#define USART3_RXTEN_OFFSET 0 211#define USART3_RXTEN_SIZE 1 212#define USART3_RXTDIS_OFFSET 1 213#define USART3_RXTDIS_SIZE 1 214#define USART3_TXTEN_OFFSET 8 215#define USART3_TXTEN_SIZE 1 216#define USART3_TXTDIS_OFFSET 9 217#define USART3_TXTDIS_SIZE 1 218 219/* Constants for USART_MODE */ 220#define USART3_USART_MODE_NORMAL 0 221#define USART3_USART_MODE_RS485 1 222#define USART3_USART_MODE_HARDWARE 2 223#define USART3_USART_MODE_MODEM 3 224#define USART3_USART_MODE_ISO7816_T0 4 225#define USART3_USART_MODE_ISO7816_T1 6 226#define USART3_USART_MODE_IRDA 8 227 228/* Constants for USCLKS */ 229#define USART3_USCLKS_MCK 0 230#define USART3_USCLKS_MCK_DIV 1 231#define USART3_USCLKS_SCK 3 232 233/* Constants for CHRL */ 234#define USART3_CHRL_5 0 235#define USART3_CHRL_6 1 236#define USART3_CHRL_7 2 237#define USART3_CHRL_8 3 238 239/* Constants for PAR */ 240#define USART3_PAR_EVEN 0 241#define USART3_PAR_ODD 1 242#define USART3_PAR_SPACE 2 243#define USART3_PAR_MARK 3 244#define USART3_PAR_NONE 4 245#define USART3_PAR_MULTI 6 246 247/* Constants for NBSTOP */ 248#define USART3_NBSTOP_1 0 249#define USART3_NBSTOP_1_5 1 250#define USART3_NBSTOP_2 2 251 252/* Constants for CHMODE */ 253#define USART3_CHMODE_NORMAL 0 254#define USART3_CHMODE_ECHO 1 255#define USART3_CHMODE_LOCAL_LOOP 2 256#define USART3_CHMODE_REMOTE_LOOP 3 257 258/* Constants for MSBF */ 259#define USART3_MSBF_LSBF 0 260#define USART3_MSBF_MSBF 1 261 262/* Constants for OVER */ 263#define USART3_OVER_X16 0 264#define USART3_OVER_X8 1 265 266/* Constants for CD */ 267#define USART3_CD_DISABLE 0 268#define USART3_CD_BYPASS 1 269 270/* Constants for TO */ 271#define USART3_TO_DISABLE 0 272 273/* Constants for TG */ 274#define USART3_TG_DISABLE 0 275 276/* Constants for FI_DI_RATIO */ 277#define USART3_FI_DI_RATIO_DISABLE 0 278 279/* Bit manipulation macros */ 280#define USART3_BIT(name) \ 281 (1 << USART3_##name##_OFFSET) 282#define USART3_BF(name,value) \ 283 (((value) & ((1 << USART3_##name##_SIZE) - 1)) \ 284 << USART3_##name##_OFFSET) 285#define USART3_BFEXT(name,value) \ 286 (((value) >> USART3_##name##_OFFSET) \ 287 & ((1 << USART3_##name##_SIZE) - 1)) 288#define USART3_BFINS(name,value,old) \ 289 (((old) & ~(((1 << USART3_##name##_SIZE) - 1) \ 290 << USART3_##name##_OFFSET)) \ 291 | USART3_BF(name,value)) 292 293#endif /* __DRIVERS_ATMEL_USART_H__ */ 294