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5
6#define LOG_CATEGORY UCLASS_SOUND
7
8#include <common.h>
9#include <audio_codec.h>
10#include <dm.h>
11#include <i2c.h>
12#include "rt5677.h"
13
14struct rt5677_priv {
15 struct udevice *dev;
16};
17
18
19struct rt5677_init_reg {
20 u8 reg;
21 u16 val;
22};
23
24static struct rt5677_init_reg init_list[] = {
25 {RT5677_LOUT1, 0x0800},
26 {RT5677_SIDETONE_CTRL, 0x0000},
27 {RT5677_STO1_ADC_DIG_VOL, 0x3F3F},
28 {RT5677_DAC1_DIG_VOL, 0x9090},
29 {RT5677_STO2_ADC_MIXER, 0xA441},
30 {RT5677_STO1_ADC_MIXER, 0x5480},
31 {RT5677_STO1_DAC_MIXER, 0x8A8A},
32 {RT5677_PWR_DIG1, 0x9800},
33 {RT5677_PWR_ANLG1, 0xE9D5},
34 {RT5677_PWR_ANLG2, 0x2CC0},
35 {RT5677_PWR_DSP2, 0x0C00},
36 {RT5677_I2S2_SDP, 0x0000},
37 {RT5677_CLK_TREE_CTRL1, 0x1111},
38 {RT5677_PLL1_CTRL1, 0x0000},
39 {RT5677_PLL1_CTRL2, 0x0000},
40 {RT5677_DIG_MISC, 0x0029},
41 {RT5677_GEN_CTRL1, 0x00FF},
42 {RT5677_GPIO_CTRL2, 0x0020},
43 {RT5677_PWR_DIG2, 0x9024},
44 {RT5677_PDM_OUT_CTRL, 0x0088},
45 {RT5677_PDM_DATA_CTRL1, 0x0001},
46};
47
48
49
50
51
52
53
54
55static int rt5677_i2c_read(struct rt5677_priv *priv, uint reg)
56{
57 u8 buf[2];
58 int ret;
59
60 ret = dm_i2c_read(priv->dev, reg, buf, sizeof(u16));
61 if (ret)
62 return ret;
63 return buf[0] << 8 | buf[1];
64}
65
66
67
68
69
70
71
72
73
74static int rt5677_i2c_write(struct rt5677_priv *priv, uint reg, uint data)
75{
76 u8 buf[2];
77
78 buf[0] = (data >> 8) & 0xff;
79 buf[1] = data & 0xff;
80
81 return dm_i2c_write(priv->dev, reg, buf, sizeof(u16));
82}
83
84
85
86
87
88
89
90
91
92
93
94static int rt5677_bic_or(struct rt5677_priv *priv, uint reg, uint bic,
95 uint set)
96{
97 uint old, new_value;
98 int ret;
99
100 old = rt5677_i2c_read(priv, reg);
101 if (old < 0)
102 return old;
103
104 new_value = (old & ~bic) | (set & bic);
105
106 if (old != new_value) {
107 ret = rt5677_i2c_write(priv, reg, new_value);
108 if (ret)
109 return ret;
110 }
111
112 return 0;
113}
114
115
116
117
118
119
120
121static int rt5677_reg_init(struct rt5677_priv *priv)
122{
123 int ret;
124 int i;
125
126 for (i = 0; i < ARRAY_SIZE(init_list); i++) {
127 ret = rt5677_i2c_write(priv, init_list[i].reg, init_list[i].val);
128 if (ret)
129 return ret;
130 }
131
132 return 0;
133}
134
135#ifdef DEBUG
136static void debug_dump_5677_regs(struct rt5677_priv *priv, int swap)
137{
138 uint i, reg_word;
139
140
141 for (i = 0; i < RT5677_REG_CNT; i++) {
142 if (i % 8 == 0)
143 log_debug("\nMX%02x: ", i);
144
145 rt5677_i2c_read(priv, (u8)i, ®_word);
146 if (swap)
147 log_debug("%04x ", swap_bytes16(reg_word));
148 else
149 log_debug("%04x ", reg_word);
150 }
151 log_debug("\n");
152
153
154 for (i = 0; i < RT5677_PR_REG_CNT; i++) {
155 if (i % 8 == 0)
156 log_debug("\nPR%02x: ", i);
157
158 rt5677_i2c_write(priv, RT5677_PRIV_INDEX, i);
159 rt5677_i2c_read(priv, RT5677_PRIV_DATA, ®_word);
160 if (swap)
161 log_debug("%04x ", swap_bytes16(reg_word));
162 else
163 log_debug("%04x ", reg_word);
164 }
165 log_debug("\n");
166}
167#endif
168
169static int rt5677_hw_params(struct rt5677_priv *priv, uint bits_per_sample)
170{
171 int ret;
172
173 switch (bits_per_sample) {
174 case 16:
175 ret = rt5677_bic_or(priv, RT5677_I2S1_SDP, RT5677_I2S_DL_MASK,
176 0);
177 if (ret) {
178 log_debug("Error updating I2S1 Interface Ctrl reg\n");
179 return 1;
180 }
181 break;
182 default:
183 log_err("Illegal bits per sample %d\n", bits_per_sample);
184 return -EINVAL;
185 }
186
187 return 0;
188}
189
190
191
192
193
194
195
196static int rt5677_set_fmt(struct rt5677_priv *priv)
197{
198 int ret = 0;
199
200
201
202
203
204
205 ret = rt5677_bic_or(priv, RT5677_I2S1_SDP, RT5677_I2S_MS_MASK,
206 RT5677_I2S_MS_S);
207
208
209 ret |= rt5677_bic_or(priv, RT5677_I2S1_SDP, RT5677_I2S_BP_MASK,
210 RT5677_I2S_BP_NOR);
211
212
213 ret |= rt5677_bic_or(priv, RT5677_I2S1_SDP, RT5677_I2S_DF_MASK,
214 RT5677_I2S_DF_I2S);
215
216
217 ret |= rt5677_bic_or(priv, RT5677_I2S2_SDP, RT5677_I2S_MS_MASK,
218 RT5677_I2S_MS_M);
219
220 if (ret) {
221 log_err("Error updating I2S1 Interface Ctrl reg\n");
222 return ret;
223 }
224
225 return 0;
226}
227
228
229
230
231
232
233
234static int rt5677_reset(struct rt5677_priv *priv)
235{
236 int ret;
237
238
239 ret = rt5677_i2c_write(priv, RT5677_RESET, RT5677_SW_RESET);
240 if (ret) {
241 log_err("Error resetting codec\n");
242 return ret;
243 }
244
245 return 0;
246}
247
248
249
250
251
252
253
254int rt5677_device_init(struct rt5677_priv *priv)
255{
256 int ret;
257
258
259 ret = rt5677_i2c_read(priv, RT5677_RESET);
260 if (ret < 0)
261 return ret;
262 log_debug("reg 00h, Software Reset & Status = 0x%04x\n", ret);
263
264
265 ret = rt5677_reset(priv);
266 if (ret)
267 return ret;
268
269 ret = rt5677_i2c_read(priv, RT5677_VENDOR_ID1);
270 if (ret < 0) {
271 log_err("Error reading vendor ID\n");
272 return 1;
273 }
274 log_debug("Hardware ID: %0xX\n", ret);
275
276 ret = rt5677_i2c_read(priv, RT5677_VENDOR_ID2);
277 if (ret < 0) {
278 log_err("Error reading vendor rev\n");
279 return 1;
280 }
281 log_debug("Hardware revision: %04x\n", ret);
282
283 return 0;
284}
285
286static int rt5677_set_params(struct udevice *dev, int interface, int rate,
287 int mclk_freq, int bits_per_sample,
288 uint channels)
289{
290 struct rt5677_priv *priv = dev_get_priv(dev);
291 int ret;
292
293
294 ret = rt5677_reg_init(priv);
295 if (ret)
296 return ret;
297
298 ret = rt5677_hw_params(priv, bits_per_sample);
299 if (ret)
300 return ret;
301
302 ret = rt5677_set_fmt(priv);
303 if (ret)
304 return ret;
305
306 return 0;
307}
308
309static int rt5677_probe(struct udevice *dev)
310{
311 struct rt5677_priv *priv = dev_get_priv(dev);
312
313 priv->dev = dev;
314
315 return rt5677_device_init(priv);
316}
317
318static const struct audio_codec_ops rt5677_ops = {
319 .set_params = rt5677_set_params,
320};
321
322static const struct udevice_id rt5677_ids[] = {
323 { .compatible = "realtek,rt5677" },
324 { }
325};
326
327U_BOOT_DRIVER(rt5677_drv) = {
328 .name = "rt5677",
329 .id = UCLASS_AUDIO_CODEC,
330 .of_match = rt5677_ids,
331 .ops = &rt5677_ops,
332 .probe = rt5677_probe,
333 .priv_auto_alloc_size = sizeof(struct rt5677_priv),
334};
335