1/* SPDX-License-Identifier: GPL-2.0+ */ 2/* 3 * Configuration settings for the Sentec Cobra Board. 4 * 5 * (C) Copyright 2003 Josef Baumgartner <josef.baumgartner@telex.de> 6 */ 7 8/* 9 * configuration for ASTRO "Urmel" board. 10 * Originating from Cobra5272 configuration, messed up by 11 * Wolfgang Wegner <w.wegner@astro-kom.de> 12 * Please do not bother the original author with bug reports 13 * concerning this file. 14 */ 15 16#ifndef _CONFIG_ASTRO_MCF5373L_H 17#define _CONFIG_ASTRO_MCF5373L_H 18 19#include <linux/stringify.h> 20 21/* 22 * set the card type to actually compile for; either of 23 * the possibilities listed below has to be used! 24 */ 25#define CONFIG_ASTRO_V532 1 26 27#if CONFIG_ASTRO_V532 28#define ASTRO_ID 0xF8 29#elif CONFIG_ASTRO_V512 30#define ASTRO_ID 0xFA 31#elif CONFIG_ASTRO_TWIN7S2 32#define ASTRO_ID 0xF9 33#elif CONFIG_ASTRO_V912 34#define ASTRO_ID 0xFC 35#elif CONFIG_ASTRO_COFDMDUOS2 36#define ASTRO_ID 0xFB 37#else 38#error No card type defined! 39#endif 40 41/* Command line configuration */ 42/* 43 * CONFIG_RAM defines if u-boot is loaded via BDM (or started from 44 * a different bootloader that has already performed RAM setup) or 45 * started directly from flash, which is the regular case for production 46 * boards. 47 */ 48#ifdef CONFIG_RAM 49#define CONFIG_MONITOR_IS_IN_RAM 50#define ENABLE_JFFS 0 51#else 52#define ENABLE_JFFS 1 53#endif 54 55#define CONFIG_MCFRTC 56#undef RTC_DEBUG 57 58/* Timer */ 59#define CONFIG_MCFTMR 60#undef CONFIG_MCFPIT 61 62/* I2C */ 63#define CONFIG_SYS_I2C 64#define CONFIG_SYS_I2C_FSL 65#define CONFIG_SYS_FSL_I2C_SPEED 80000 66#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F 67#define CONFIG_SYS_FSL_I2C_OFFSET 0x58000 68#define CONFIG_SYS_IMMR CONFIG_SYS_MBAR 69 70/* 71 * Defines processor clock - important for correct timings concerning serial 72 * interface etc. 73 */ 74 75#define CONFIG_SYS_CLK 80000000 76#define CONFIG_SYS_CPU_CLK (CONFIG_SYS_CLK * 3) 77#define CONFIG_SYS_SDRAM_SIZE 32 /* SDRAM size in MB */ 78 79#define CONFIG_SYS_CORE_SRAM_SIZE 0x8000 80#define CONFIG_SYS_CORE_SRAM 0x80000000 81 82#define CONFIG_SYS_UNIFY_CACHE 83 84/* 85 * Define baudrate for UART1 (console output, tftp, ...) 86 * default value of CONFIG_BAUDRATE for Sentec board: 19200 baud 87 * CONFIG_SYS_BAUDRATE_TABLE defines values that can be selected 88 * in u-boot command interface 89 */ 90 91#define CONFIG_MCFUART 92#define CONFIG_SYS_UART_PORT (2) 93#define CONFIG_SYS_UART2_ALT3_GPIO 94 95/* 96 * Watchdog configuration; Watchdog is disabled for running from RAM 97 * and set to highest possible value else. Beware there is no check 98 * in the watchdog code to validate the timeout value set here! 99 */ 100 101#ifndef CONFIG_MONITOR_IS_IN_RAM 102#define CONFIG_WATCHDOG 103#define CONFIG_WATCHDOG_TIMEOUT 3355 /* timeout in milliseconds */ 104#endif 105 106/* 107 * Configuration for environment 108 * Environment is located in the last sector of the flash 109 */ 110 111#ifndef CONFIG_MONITOR_IS_IN_RAM 112#else 113/* 114 * environment in RAM - This is used to use a single PC-based application 115 * to load an image, load U-Boot, load an environment and then start U-Boot 116 * to execute the commands from the environment. Feedback is done via setting 117 * and reading memory locations. 118 */ 119#endif 120 121/* here we put our FPGA configuration... */ 122 123/* Define user parameters that have to be customized most likely */ 124 125/* AUTOBOOT settings - booting images automatically by u-boot after power on */ 126 127/* 128 * The following settings will be contained in the environment block ; if you 129 * want to use a neutral environment all those settings can be manually set in 130 * u-boot: 'set' command 131 */ 132 133#define CONFIG_EXTRA_ENV_SETTINGS \ 134 "loaderversion=11\0" \ 135 "card_id="__stringify(ASTRO_ID)"\0" \ 136 "alterafile=0\0" \ 137 "xilinxfile=0\0" \ 138 "xilinxload=imxtract 0x540000 $xilinxfile 0x41000000&&"\ 139 "fpga load 0 0x41000000 $filesize\0" \ 140 "alteraload=imxtract 0x6c0000 $alterafile 0x41000000&&"\ 141 "fpga load 1 0x41000000 $filesize\0" \ 142 "env_default=1\0" \ 143 "env_check=if test $env_default -eq 1;"\ 144 " then setenv env_default 0;saveenv;fi\0" 145 146/* 147 * "update" is a non-standard command that has to be supplied 148 * by external update.c; This is not included in mainline because 149 * it needs non-blocking CFI routines. 150 */ 151#ifdef CONFIG_MONITOR_IS_IN_RAM 152#define CONFIG_BOOTCOMMAND "" /* no autoboot in this case */ 153#else 154#if CONFIG_ASTRO_V532 155#define CONFIG_BOOTCOMMAND "protect off 0x80000 0x1ffffff;run env_check;"\ 156 "run xilinxload&&run alteraload&&bootm 0x80000;"\ 157 "update;reset" 158#else 159#define CONFIG_BOOTCOMMAND "protect off 0x80000 0x1ffffff;run env_check;"\ 160 "run xilinxload&&bootm 0x80000;update;reset" 161#endif 162#endif 163 164/* default RAM address for user programs */ 165#define CONFIG_SYS_LOAD_ADDR 0x20000 166 167#define CONFIG_FPGA_COUNT 1 168#define CONFIG_SYS_FPGA_PROG_FEEDBACK 169#define CONFIG_SYS_FPGA_WAIT 1000 170 171/* End of user parameters to be customized */ 172 173/* Defines memory range for test */ 174 175#define CONFIG_SYS_MEMTEST_START 0x40020000 176#define CONFIG_SYS_MEMTEST_END 0x41ffffff 177 178/* 179 * Low Level Configuration Settings 180 * (address mappings, register initial values, etc.) 181 * You should know what you are doing if you make changes here. 182 */ 183 184/* Base register address */ 185 186#define CONFIG_SYS_MBAR 0xFC000000 /* Register Base Addrs */ 187 188/* System Conf. Reg. & System Protection Reg. */ 189 190#define CONFIG_SYS_SCR 0x0003; 191#define CONFIG_SYS_SPR 0xffff; 192 193/* 194 * Definitions for initial stack pointer and data area (in internal SRAM) 195 */ 196#define CONFIG_SYS_INIT_RAM_ADDR 0x80000000 197#define CONFIG_SYS_INIT_RAM_SIZE 0x8000 198#define CONFIG_SYS_INIT_RAM_CTRL 0x221 199#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \ 200 GENERATED_GBL_DATA_SIZE) 201#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET 202 203/* 204 * Start addresses for the final memory configuration 205 * (Set up by the startup code) 206 * for MCF5373, the allowable range is 0x40000000 to 0x7FF00000 207 */ 208#define CONFIG_SYS_SDRAM_BASE 0x40000000 209 210/* 211 * Chipselect bank definitions 212 * 213 * CS0 - Flash 32MB (first 16MB) 214 * CS1 - Flash 32MB (second half) 215 * CS2 - FPGA 216 * CS3 - FPGA 217 * CS4 - unused 218 * CS5 - unused 219 */ 220#define CONFIG_SYS_CS0_BASE 0 221#define CONFIG_SYS_CS0_MASK 0x00ff0001 222#define CONFIG_SYS_CS0_CTRL 0x00001fc0 223 224#define CONFIG_SYS_CS1_BASE 0x01000000 225#define CONFIG_SYS_CS1_MASK 0x00ff0001 226#define CONFIG_SYS_CS1_CTRL 0x00001fc0 227 228#define CONFIG_SYS_CS2_BASE 0x20000000 229#define CONFIG_SYS_CS2_MASK 0x00ff0001 230#define CONFIG_SYS_CS2_CTRL 0x0000fec0 231 232#define CONFIG_SYS_CS3_BASE 0x21000000 233#define CONFIG_SYS_CS3_MASK 0x00ff0001 234#define CONFIG_SYS_CS3_CTRL 0x0000fec0 235 236#define CONFIG_SYS_FLASH_BASE 0x00000000 237 238#ifdef CONFIG_MONITOR_IS_IN_RAM 239#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE 240#else 241/* This is mainly used during relocation in start.S */ 242#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400) 243#endif 244/* Reserve 256 kB for Monitor */ 245#define CONFIG_SYS_MONITOR_LEN (256 << 10) 246 247#define CONFIG_SYS_BOOTPARAMS_LEN (64 * 1024) 248/* Reserve 128 kB for malloc() */ 249#define CONFIG_SYS_MALLOC_LEN (128 << 10) 250 251/* 252 * For booting Linux, the board info and command line data 253 * have to be in the first 8 MB of memory, since this is 254 * the maximum mapped by the Linux kernel during initialization ?? 255 */ 256#define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + \ 257 (CONFIG_SYS_SDRAM_SIZE << 20)) 258 259/* FLASH organization */ 260#define CONFIG_SYS_MAX_FLASH_BANKS 1 261#define CONFIG_SYS_MAX_FLASH_SECT 259 262#define CONFIG_SYS_FLASH_ERASE_TOUT 1000 263 264#define CONFIG_SYS_FLASH_SIZE 0x2000000 265#define CONFIG_SYS_FLASH_CFI_NONBLOCK 1 266 267#define LDS_BOARD_TEXT \ 268 . = DEFINED(env_offset) ? env_offset : .; \ 269 env/embedded.o(.text*) 270 271#if ENABLE_JFFS 272/* JFFS Partition offset set */ 273#define CONFIG_SYS_JFFS2_FIRST_BANK 0 274#define CONFIG_SYS_JFFS2_NUM_BANKS 1 275/* 512k reserved for u-boot */ 276#define CONFIG_SYS_JFFS2_FIRST_SECTOR 0x40 277#endif 278 279/* Cache Configuration */ 280#define CONFIG_SYS_CACHELINE_SIZE 16 281 282#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ 283 CONFIG_SYS_INIT_RAM_SIZE - 8) 284#define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ 285 CONFIG_SYS_INIT_RAM_SIZE - 4) 286#define CONFIG_SYS_ICACHE_INV (CF_CACR_CINVA) 287#define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE | \ 288 CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \ 289 CF_ACR_EN | CF_ACR_SM_ALL) 290#define CONFIG_SYS_CACHE_ICACR (CF_CACR_EC | CF_CACR_CINVA | \ 291 CF_CACR_DCM_P) 292 293#endif /* _CONFIG_ASTRO_MCF5373L_H */ 294