1/* SPDX-License-Identifier: GPL-2.0+ */ 2/* 3 * Embest/Timll DevKit3250 board configuration file 4 * 5 * Copyright (C) 2011-2015 Vladimir Zapolskiy <vz@mleia.com> 6 */ 7 8#ifndef __CONFIG_DEVKIT3250_H__ 9#define __CONFIG_DEVKIT3250_H__ 10 11/* SoC and board defines */ 12#include <linux/sizes.h> 13#include <asm/arch/cpu.h> 14 15#define CONFIG_MACH_TYPE MACH_TYPE_DEVKIT3250 16 17#if !defined(CONFIG_SPL_BUILD) 18#define CONFIG_SKIP_LOWLEVEL_INIT 19#endif 20 21/* 22 * Memory configurations 23 */ 24#define CONFIG_SYS_MALLOC_LEN SZ_1M 25#define CONFIG_SYS_SDRAM_BASE EMC_DYCS0_BASE 26#define CONFIG_SYS_SDRAM_SIZE SZ_64M 27#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE + SZ_32K) 28#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_TEXT_BASE - SZ_1M) 29 30#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_32K) 31 32#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_4K \ 33 - GENERATED_GBL_DATA_SIZE) 34 35/* 36 * Serial Driver 37 */ 38#define CONFIG_SYS_LPC32XX_UART 5 /* UART5 */ 39 40/* 41 * DMA 42 */ 43#if !defined(CONFIG_SPL_BUILD) 44#define CONFIG_DMA_LPC32XX 45#endif 46 47/* 48 * I2C 49 */ 50#define CONFIG_SYS_I2C 51#define CONFIG_SYS_I2C_LPC32XX 52#define CONFIG_SYS_I2C_SPEED 100000 53 54/* 55 * GPIO 56 */ 57#define CONFIG_LPC32XX_GPIO 58 59/* 60 * SSP/SPI 61 */ 62#define CONFIG_LPC32XX_SSP_TIMEOUT 100000 63 64/* 65 * Ethernet 66 */ 67#define CONFIG_RMII 68#define CONFIG_PHY_SMSC 69#define CONFIG_LPC32XX_ETH 70#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN 71 72/* 73 * NOR Flash 74 */ 75#define CONFIG_SYS_MAX_FLASH_BANKS 1 76#define CONFIG_SYS_MAX_FLASH_SECT 71 77#define CONFIG_SYS_FLASH_BASE EMC_CS0_BASE 78#define CONFIG_SYS_FLASH_SIZE SZ_4M 79 80/* 81 * NAND controller 82 */ 83#define CONFIG_SYS_NAND_BASE SLC_NAND_BASE 84#define CONFIG_SYS_MAX_NAND_DEVICE 1 85#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE } 86 87/* 88 * NAND chip timings 89 */ 90#define CONFIG_LPC32XX_NAND_SLC_WDR_CLKS 14 91#define CONFIG_LPC32XX_NAND_SLC_WWIDTH 66666666 92#define CONFIG_LPC32XX_NAND_SLC_WHOLD 200000000 93#define CONFIG_LPC32XX_NAND_SLC_WSETUP 50000000 94#define CONFIG_LPC32XX_NAND_SLC_RDR_CLKS 14 95#define CONFIG_LPC32XX_NAND_SLC_RWIDTH 66666666 96#define CONFIG_LPC32XX_NAND_SLC_RHOLD 200000000 97#define CONFIG_LPC32XX_NAND_SLC_RSETUP 50000000 98 99#define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000 100#define CONFIG_SYS_NAND_PAGE_SIZE NAND_LARGE_BLOCK_PAGE_SIZE 101 102/* 103 * USB 104 */ 105#define CONFIG_USB_OHCI_LPC32XX 106#define CONFIG_USB_ISP1301_I2C_ADDR 0x2d 107 108/* 109 * U-Boot General Configurations 110 */ 111#define CONFIG_SYS_CBSIZE 1024 112#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 113 114/* 115 * Pass open firmware flat tree 116 */ 117 118/* 119 * Environment 120 */ 121 122#define CONFIG_BOOTCOMMAND \ 123 "dhcp; " \ 124 "tftp ${loadaddr} ${serverip}:${tftpdir}/${bootfile}; " \ 125 "tftp ${dtbaddr} ${serverip}:${tftpdir}/devkit3250.dtb; " \ 126 "setenv nfsargs ip=dhcp root=/dev/nfs nfsroot=${serverip}:${nfsroot},tcp; " \ 127 "setenv bootargs ${bootargs} ${nfsargs} ${userargs}; " \ 128 "bootm ${loadaddr} - ${dtbaddr}" 129 130#define CONFIG_EXTRA_ENV_SETTINGS \ 131 "autoload=no\0" \ 132 "ethaddr=00:01:90:00:C0:81\0" \ 133 "dtbaddr=0x81000000\0" \ 134 "nfsroot=/opt/projects/images/vladimir/oe/devkit3250/rootfs\0" \ 135 "tftpdir=vladimir/oe/devkit3250\0" \ 136 "userargs=oops=panic\0" 137 138/* 139 * U-Boot Commands 140 */ 141 142/* 143 * Boot Linux 144 */ 145#define CONFIG_CMDLINE_TAG 146#define CONFIG_SETUP_MEMORY_TAGS 147 148#define CONFIG_BOOTFILE "uImage" 149#define CONFIG_LOADADDR 0x80008000 150 151/* 152 * SPL specific defines 153 */ 154/* SPL will be executed at offset 0 */ 155 156/* SPL will use SRAM as stack */ 157#define CONFIG_SPL_STACK 0x0000FFF8 158 159/* Use the framework and generic lib */ 160 161/* SPL will use serial */ 162 163/* SPL loads an image from NAND */ 164#define CONFIG_SPL_NAND_RAW_ONLY 165#define CONFIG_SPL_NAND_DRIVERS 166 167#define CONFIG_SPL_NAND_ECC 168#define CONFIG_SPL_NAND_SOFTECC 169 170#define CONFIG_SPL_MAX_SIZE 0x20000 171#define CONFIG_SPL_PAD_TO CONFIG_SPL_MAX_SIZE 172 173/* U-Boot will be 0x60000 bytes, loaded and run at CONFIG_SYS_TEXT_BASE */ 174#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000 175#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x60000 176 177#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE 178#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE 179 180/* See common/spl/spl.c spl_set_header_raw_uboot() */ 181#define CONFIG_SYS_MONITOR_LEN CONFIG_SYS_NAND_U_BOOT_SIZE 182 183/* 184 * Include SoC specific configuration 185 */ 186#include <asm/arch/config.h> 187 188#endif /* __CONFIG_DEVKIT3250_H__*/ 189