1/* SPDX-License-Identifier: GPL-2.0+ */ 2/* 3 * Copyright (C) 2016, Imagination Technologies Ltd. 4 * 5 * Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com> 6 * 7 * Imagination Technologies Ltd. MIPSfpga 8 */ 9 10#ifndef __XILFPGA_CONFIG_H 11#define __XILFPGA_CONFIG_H 12 13/* BootROM + MIG is pretty smart. DDR and Cache initialized */ 14#define CONFIG_SKIP_LOWLEVEL_INIT 15 16/*-------------------------------------------- 17 * CPU configuration 18 */ 19/* CPU Timer rate */ 20#define CONFIG_SYS_MIPS_TIMER_FREQ 50000000 21 22/*---------------------------------------------------------------------- 23 * Memory Layout 24 */ 25 26/* SDRAM Configuration (for final code, data, stack, heap) */ 27#define CONFIG_SYS_SDRAM_BASE 0x80000000 28#define CONFIG_SYS_SDRAM_SIZE 0x08000000 /* 128 Mbytes */ 29#define CONFIG_SYS_INIT_SP_ADDR \ 30 (CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_SDRAM_SIZE - 0x1000) 31 32#define CONFIG_SYS_MALLOC_LEN (256 << 10) 33#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE 34#define CONFIG_SYS_LOAD_ADDR 0x80500000 /* default load address */ 35 36/*---------------------------------------------------------------------- 37 * Commands 38 */ 39 40/*------------------------------------------------------------ 41 * Console Configuration 42 */ 43#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ 44 45/* ------------------------------------------------- 46 * Environment 47 */ 48 49/* --------------------------------------------------------------------- 50 * Board boot configuration 51 */ 52#define CONFIG_TIMESTAMP /* Print image info with timestamp */ 53 54#endif /* __XILFPGA_CONFIG_H */ 55