uboot/include/configs/ls1028aqds.h
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   1/* SPDX-License-Identifier: GPL-2.0+ */
   2/*
   3 * Copyright 2019 NXP
   4 */
   5
   6#ifndef __LS1028A_QDS_H
   7#define __LS1028A_QDS_H
   8
   9#include "ls1028a_common.h"
  10
  11#define CONFIG_SYS_CLK_FREQ             100000000
  12#define CONFIG_DDR_CLK_FREQ             100000000
  13#define COUNTER_FREQUENCY_REAL          (CONFIG_SYS_CLK_FREQ / 4)
  14
  15/* DDR */
  16#define CONFIG_DIMM_SLOTS_PER_CTLR              2
  17
  18#define CONFIG_QIXIS_I2C_ACCESS
  19
  20/*
  21 * QIXIS Definitions
  22 */
  23#define CONFIG_FSL_QIXIS
  24
  25#ifdef CONFIG_FSL_QIXIS
  26#define QIXIS_BASE                      0x7fb00000
  27#define QIXIS_BASE_PHYS                 QIXIS_BASE
  28#define CONFIG_SYS_I2C_FPGA_ADDR        0x66
  29#define QIXIS_LBMAP_SWITCH              1
  30#define QIXIS_LBMAP_MASK                0x0f
  31#define QIXIS_LBMAP_SHIFT               5
  32#define QIXIS_LBMAP_DFLTBANK            0x00
  33#define QIXIS_LBMAP_ALTBANK             0x00
  34#define QIXIS_LBMAP_SD                  0x00
  35#define QIXIS_LBMAP_EMMC                0x00
  36#define QIXIS_LBMAP_QSPI                0x00
  37#define QIXIS_RCW_SRC_SD                0x8
  38#define QIXIS_RCW_SRC_EMMC              0x9
  39#define QIXIS_RCW_SRC_QSPI              0xf
  40#define QIXIS_RST_CTL_RESET             0x31
  41#define QIXIS_RCFG_CTL_RECONFIG_IDLE    0x20
  42#define QIXIS_RCFG_CTL_RECONFIG_START   0x21
  43#define QIXIS_RCFG_CTL_WATCHDOG_ENBLE   0x08
  44#define QIXIS_RST_FORCE_MEM             0x01
  45
  46#define CONFIG_SYS_FPGA_CSPR_EXT        (0x0)
  47#define CONFIG_SYS_FPGA_CSPR            (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS) | \
  48                                        CSPR_PORT_SIZE_8 | \
  49                                        CSPR_MSEL_GPCM | \
  50                                        CSPR_V)
  51#define CONFIG_SYS_FPGA_AMASK           IFC_AMASK(64 * 1024)
  52#define CONFIG_SYS_FPGA_CSOR            (CSOR_NOR_ADM_SHIFT(4) | \
  53                                        CSOR_NOR_NOR_MODE_AVD_NOR | \
  54                                        CSOR_NOR_TRHZ_80)
  55#endif
  56
  57/* RTC */
  58#define CONFIG_SYS_RTC_BUS_NUM         1
  59#define I2C_MUX_CH_RTC                 0xB
  60
  61/* Store environment at top of flash */
  62
  63#ifdef CONFIG_SPL_BUILD
  64#define CONFIG_SYS_MONITOR_BASE CONFIG_SPL_TEXT_BASE
  65#else
  66#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
  67#endif
  68
  69/* SATA */
  70#define CONFIG_SCSI_AHCI_PLAT
  71
  72#define CONFIG_SYS_SATA1                        AHCI_BASE_ADDR1
  73#ifndef CONFIG_CMD_EXT2
  74#define CONFIG_CMD_EXT2
  75#endif
  76#define CONFIG_SYS_SCSI_MAX_SCSI_ID             1
  77#define CONFIG_SYS_SCSI_MAX_LUN                 1
  78#define CONFIG_SYS_SCSI_MAX_DEVICE              (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
  79                                                CONFIG_SYS_SCSI_MAX_LUN)
  80/* DSPI */
  81#ifdef CONFIG_FSL_DSPI
  82#define CONFIG_SPI_FLASH_SST
  83#define CONFIG_SPI_FLASH_EON
  84#endif
  85
  86#ifndef SPL_NO_ENV
  87#undef CONFIG_EXTRA_ENV_SETTINGS
  88#define CONFIG_EXTRA_ENV_SETTINGS \
  89        "board=ls1028aqds\0" \
  90        "hwconfig=fsl_ddr:bank_intlv=auto\0" \
  91        "ramdisk_addr=0x800000\0" \
  92        "ramdisk_size=0x2000000\0" \
  93        "fdt_high=0xffffffffffffffff\0" \
  94        "initrd_high=0xffffffffffffffff\0" \
  95        "fdt_addr=0x00f00000\0" \
  96        "kernel_addr=0x01000000\0" \
  97        "scriptaddr=0x80000000\0" \
  98        "scripthdraddr=0x80080000\0" \
  99        "fdtheader_addr_r=0x80100000\0" \
 100        "kernelheader_addr_r=0x80200000\0" \
 101        "load_addr=0xa0000000\0" \
 102        "kernel_addr_r=0x81000000\0" \
 103        "fdt_addr_r=0x90000000\0" \
 104        "ramdisk_addr_r=0xa0000000\0" \
 105        "kernel_start=0x1000000\0" \
 106        "kernelheader_start=0x800000\0" \
 107        "kernel_load=0xa0000000\0" \
 108        "kernel_size=0x2800000\0" \
 109        "kernelheader_size=0x40000\0" \
 110        "kernel_addr_sd=0x8000\0" \
 111        "kernel_size_sd=0x14000\0" \
 112        "kernelhdr_addr_sd=0x4000\0" \
 113        "kernelhdr_size_sd=0x10\0" \
 114        "console=ttyS0,115200\0" \
 115        "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
 116        BOOTENV \
 117        "boot_scripts=ls1028aqds_boot.scr\0" \
 118        "boot_script_hdr=hdr_ls1028aqds_bs.out\0" \
 119        "scan_dev_for_boot_part=" \
 120                "part list ${devtype} ${devnum} devplist; " \
 121                "env exists devplist || setenv devplist 1; " \
 122                "for distro_bootpart in ${devplist}; do " \
 123                  "if fstype ${devtype} " \
 124                        "${devnum}:${distro_bootpart} " \
 125                        "bootfstype; then " \
 126                        "run scan_dev_for_boot; " \
 127                  "fi; " \
 128                "done\0" \
 129        "scan_dev_for_boot=" \
 130                "echo Scanning ${devtype} " \
 131                                "${devnum}:${distro_bootpart}...; " \
 132                "for prefix in ${boot_prefixes}; do " \
 133                        "run scan_dev_for_scripts; " \
 134                "done;" \
 135                "\0" \
 136        "boot_a_script=" \
 137                "load ${devtype} ${devnum}:${distro_bootpart} " \
 138                        "${scriptaddr} ${prefix}${script}; " \
 139                "env exists secureboot && load ${devtype} " \
 140                        "${devnum}:${distro_bootpart} " \
 141                        "${scripthdraddr} ${prefix}${boot_script_hdr} " \
 142                        "&& esbc_validate ${scripthdraddr};" \
 143                "source ${scriptaddr}\0" \
 144        "sd_bootcmd=echo Trying load from SD ..;" \
 145                "mmcinfo; mmc read $load_addr " \
 146                "$kernel_addr_sd $kernel_size_sd && " \
 147                "env exists secureboot && mmc read $kernelheader_addr_r " \
 148                "$kernelhdr_addr_sd $kernelhdr_size_sd " \
 149                " && esbc_validate ${kernelheader_addr_r};" \
 150                "bootm $load_addr#$board\0" \
 151        "emmc_bootcmd=echo Trying load from EMMC ..;" \
 152                "mmcinfo; mmc dev 1; mmc read $load_addr " \
 153                "$kernel_addr_sd $kernel_size_sd && " \
 154                "env exists secureboot && mmc read $kernelheader_addr_r " \
 155                "$kernelhdr_addr_sd $kernelhdr_size_sd " \
 156                " && esbc_validate ${kernelheader_addr_r};"     \
 157                "bootm $load_addr#$board\0"
 158#endif
 159#endif /* __LS1028A_QDS_H */
 160