LXR uboot/include/configs/ls1043a

   1/* SPDX-License-Identifier: GPL-2.0+ */
   2/*
   3 * Copyright (C) 2015 Freescale Semiconductor
   4 */
   5
   6#ifndef __LS1043A_COMMON_H
   7#define __LS1043A_COMMON_H
   8
   9/* SPL build */
  10#ifdef CONFIG_SPL_BUILD
  11#define SPL_NO_FMAN
  12#define SPL_NO_DSPI
  13#define SPL_NO_PCIE
  14#define SPL_NO_ENV
  15#define SPL_NO_MISC
  16#define SPL_NO_USB
  17#define SPL_NO_SATA
  18#define SPL_NO_QE
  19#define SPL_NO_EEPROM
  20#endif
  21#if (defined(CONFIG_SPL_BUILD) && defined(CONFIG_NAND_BOOT))
  22#define SPL_NO_MMC
  23#endif
  24#if (defined(CONFIG_SPL_BUILD) && defined(CONFIG_SD_BOOT_QSPI))
  25#define SPL_NO_IFC
  26#endif
  27
  28#define CONFIG_REMAKE_ELF
  29#define CONFIG_GICV2
  30
  31#include <asm/arch/stream_id_lsch2.h>
  32#include <asm/arch/config.h>
  33
  34/* Link Definitions */
  35#ifdef CONFIG_TFABOOT
  36#define CONFIG_SYS_INIT_SP_ADDR         CONFIG_SYS_TEXT_BASE
  37#else
  38#define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_FSL_OCRAM_BASE + 0xfff0)
  39#endif
  40
  41#define CONFIG_SKIP_LOWLEVEL_INIT
  42
  43#define CONFIG_VERY_BIG_RAM
  44#define CONFIG_SYS_DDR_SDRAM_BASE       0x80000000
  45#define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY       0
  46#define CONFIG_SYS_SDRAM_BASE           CONFIG_SYS_DDR_SDRAM_BASE
  47#define CONFIG_SYS_DDR_BLOCK2_BASE      0x880000000ULL
  48
  49#define CPU_RELEASE_ADDR               secondary_boot_func
  50
  51/* Generic Timer Definitions */
  52#define COUNTER_FREQUENCY               25000000        /* 25MHz */
  53
  54/* Size of malloc() pool */
  55#define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + 1024 * 1024)
  56
  57/* Serial Port */
  58#define CONFIG_SYS_NS16550_SERIAL
  59#define CONFIG_SYS_NS16550_REG_SIZE     1
  60#define CONFIG_SYS_NS16550_CLK          (get_serial_clock())
  61
  62#define CONFIG_SYS_BAUDRATE_TABLE       { 9600, 19200, 38400, 57600, 115200 }
  63
  64/* SD boot SPL */
  65#ifdef CONFIG_SD_BOOT
  66
  67#define CONFIG_SPL_MAX_SIZE             0x17000
  68#define CONFIG_SPL_STACK                0x1001e000
  69#define CONFIG_SPL_PAD_TO               0x1d000
  70
  71#define CONFIG_SYS_SPL_MALLOC_START     (CONFIG_SPL_BSS_START_ADDR + \
  72                                        CONFIG_SPL_BSS_MAX_SIZE)
  73#define CONFIG_SYS_SPL_MALLOC_SIZE      0x100000
  74#define CONFIG_SPL_BSS_START_ADDR       0x8f000000
  75#define CONFIG_SPL_BSS_MAX_SIZE         0x80000
  76
  77#ifdef CONFIG_NXP_ESBC
  78#define CONFIG_U_BOOT_HDR_SIZE                          (16 << 10)
  79/*
  80 * HDR would be appended at end of image and copied to DDR along
  81 * with U-Boot image. Here u-boot max. size is 512K. So if binary
  82 * size increases then increase this size in case of secure boot as
  83 * it uses raw u-boot image instead of fit image.
  84 */
  85#define CONFIG_SYS_MONITOR_LEN          (0x100000 + CONFIG_U_BOOT_HDR_SIZE)
  86#else
  87#define CONFIG_SYS_MONITOR_LEN          0x100000
  88#endif /* ifdef CONFIG_NXP_ESBC */
  89#endif
  90
  91/* NAND SPL */
  92#ifdef CONFIG_NAND_BOOT
  93#define CONFIG_SPL_PBL_PAD
  94#define CONFIG_SPL_MAX_SIZE             0x1a000
  95#define CONFIG_SPL_STACK                0x1001d000
  96#define CONFIG_SYS_NAND_U_BOOT_DST      CONFIG_SYS_TEXT_BASE
  97#define CONFIG_SYS_NAND_U_BOOT_START    CONFIG_SYS_TEXT_BASE
  98#define CONFIG_SYS_SPL_MALLOC_START     0x80200000
  99#define CONFIG_SPL_BSS_START_ADDR       0x80100000
 100#define CONFIG_SYS_SPL_MALLOC_SIZE      0x100000
 101#define CONFIG_SPL_BSS_MAX_SIZE         0x80000
 102
 103#ifdef CONFIG_NXP_ESBC
 104#define CONFIG_U_BOOT_HDR_SIZE                          (16 << 10)
 105#endif /* ifdef CONFIG_NXP_ESBC */
 106
 107#ifdef CONFIG_U_BOOT_HDR_SIZE
 108/*
 109 * HDR would be appended at end of image and copied to DDR along
 110 * with U-Boot image. Here u-boot max. size is 512K. So if binary
 111 * size increases then increase this size in case of secure boot as
 112 * it uses raw u-boot image instead of fit image.
 113 */
 114#define CONFIG_SYS_MONITOR_LEN          (0x100000 + CONFIG_U_BOOT_HDR_SIZE)
 115#else
 116#define CONFIG_SYS_MONITOR_LEN          0x100000
 117#endif /* ifdef CONFIG_U_BOOT_HDR_SIZE */
 118
 119#endif
 120
 121/* IFC */
 122#ifndef SPL_NO_IFC
 123#if defined(CONFIG_TFABOOT) || \
 124        (!defined(CONFIG_QSPI_BOOT) && !defined(CONFIG_SD_BOOT_QSPI))
 125#define CONFIG_FSL_IFC
 126/*
 127 * CONFIG_SYS_FLASH_BASE has the final address (core view)
 128 * CONFIG_SYS_FLASH_BASE_PHYS has the final address (IFC view)
 129 * CONFIG_SYS_FLASH_BASE_PHYS_EARLY has the temporary IFC address
 130 * CONFIG_SYS_TEXT_BASE is linked to 0x60000000 for booting
 131 */
 132#define CONFIG_SYS_FLASH_BASE                   0x60000000
 133#define CONFIG_SYS_FLASH_BASE_PHYS              CONFIG_SYS_FLASH_BASE
 134#define CONFIG_SYS_FLASH_BASE_PHYS_EARLY        0x00000000
 135
 136#ifdef CONFIG_MTD_NOR_FLASH
 137#define CONFIG_SYS_FLASH_QUIET_TEST
 138#define CONFIG_FLASH_SHOW_PROGRESS      45      /* count down from 45/5: 9..1 */
 139#endif
 140#endif
 141#endif
 142
 143/* I2C */
 144#define CONFIG_SYS_I2C
 145
 146/* PCIe */
 147#ifndef SPL_NO_PCIE
 148#define CONFIG_PCIE1            /* PCIE controller 1 */
 149#define CONFIG_PCIE2            /* PCIE controller 2 */
 150#define CONFIG_PCIE3            /* PCIE controller 3 */
 151
 152#ifdef CONFIG_PCI
 153#define CONFIG_PCI_SCAN_SHOW
 154#endif
 155#endif
 156
 157/* Command line configuration */
 158
 159/*  MMC  */
 160#ifndef SPL_NO_MMC
 161#ifdef CONFIG_MMC
 162#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
 163#endif
 164#endif
 165
 166/*  DSPI  */
 167#ifndef SPL_NO_DSPI
 168#define CONFIG_FSL_DSPI
 169#ifdef CONFIG_FSL_DSPI
 170#define CONFIG_DM_SPI_FLASH
 171#define CONFIG_SPI_FLASH_STMICRO        /* cs0 */
 172#define CONFIG_SPI_FLASH_SST            /* cs1 */
 173#define CONFIG_SPI_FLASH_EON            /* cs2 */
 174#endif
 175#endif
 176
 177/* FMan ucode */
 178#ifndef SPL_NO_FMAN
 179#define CONFIG_SYS_DPAA_FMAN
 180#ifdef CONFIG_SYS_DPAA_FMAN
 181#define CONFIG_SYS_FM_MURAM_SIZE        0x60000
 182
 183#ifdef CONFIG_TFABOOT
 184#define CONFIG_SYS_FMAN_FW_ADDR         0x900000
 185#define CONFIG_SYS_QE_FW_ADDR           0x940000
 186
 187
 188#else
 189#ifdef CONFIG_NAND_BOOT
 190/* Store Fman ucode at offeset 0x900000(72 blocks). */
 191#define CONFIG_SYS_FMAN_FW_ADDR         (72 * CONFIG_SYS_NAND_BLOCK_SIZE)
 192#elif defined(CONFIG_SD_BOOT)
 193/*
 194 * PBL SD boot image should stored at 0x1000(8 blocks), the size of the image is
 195 * about 1MB (2040 blocks), Env is stored after the image, and the env size is
 196 * 0x2000 (16 blocks), 8 + 2040 + 16 = 2064, enlarge it to 18432(0x4800).
 197 */
 198#define CONFIG_SYS_FMAN_FW_ADDR         (512 * 0x4800)
 199#define CONFIG_SYS_QE_FW_ADDR           (512 * 0x4A00)
 200#elif defined(CONFIG_QSPI_BOOT)
 201#define CONFIG_SYS_FMAN_FW_ADDR         0x40900000
 202#else
 203/* FMan fireware Pre-load address */
 204#define CONFIG_SYS_FMAN_FW_ADDR         0x60900000
 205#define CONFIG_SYS_QE_FW_ADDR           0x60940000
 206#endif
 207#endif
 208#define CONFIG_SYS_QE_FMAN_FW_LENGTH    0x10000
 209#define CONFIG_SYS_FDT_PAD              (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
 210#endif
 211#endif
 212
 213/* Miscellaneous configurable options */
 214#define CONFIG_SYS_LOAD_ADDR    (CONFIG_SYS_DDR_SDRAM_BASE + 0x10000000)
 215
 216#define CONFIG_HWCONFIG
 217#define HWCONFIG_BUFFER_SIZE            128
 218
 219#ifndef SPL_NO_MISC
 220#ifndef CONFIG_SPL_BUILD
 221#define BOOT_TARGET_DEVICES(func) \
 222        func(MMC, mmc, 0) \
 223        func(USB, usb, 0) \
 224        func(DHCP, dhcp, na)
 225#include <config_distro_bootcmd.h>
 226#endif
 227
 228/* Initial environment variables */
 229#define CONFIG_EXTRA_ENV_SETTINGS               \
 230        "hwconfig=fsl_ddr:bank_intlv=auto\0"    \
 231        "fdt_high=0xffffffffffffffff\0"         \
 232        "initrd_high=0xffffffffffffffff\0"      \
 233        "fdt_addr=0x64f00000\0"                 \
 234        "kernel_addr=0x61000000\0"              \
 235        "scriptaddr=0x80000000\0"               \
 236        "scripthdraddr=0x80080000\0"            \
 237        "fdtheader_addr_r=0x80100000\0"         \
 238        "kernelheader_addr_r=0x80200000\0"      \
 239        "kernel_addr_r=0x81000000\0"            \
 240        "kernel_start=0x1000000\0"              \
 241        "kernelheader_start=0x800000\0"         \
 242        "fdt_addr_r=0x90000000\0"               \
 243        "load_addr=0xa0000000\0"                \
 244        "kernelheader_addr=0x60800000\0"        \
 245        "kernel_size=0x2800000\0"               \
 246        "kernelheader_size=0x40000\0"           \
 247        "kernel_addr_sd=0x8000\0"               \
 248        "kernel_size_sd=0x14000\0"              \
 249        "kernelhdr_addr_sd=0x4000\0"            \
 250        "kernelhdr_size_sd=0x10\0"              \
 251        "console=ttyS0,115200\0"                \
 252        "boot_os=y\0"                           \
 253        "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0"        \
 254        BOOTENV                                 \
 255        "boot_scripts=ls1043ardb_boot.scr\0"    \
 256        "boot_script_hdr=hdr_ls1043ardb_bs.out\0"       \
 257        "scan_dev_for_boot_part="               \
 258                "part list ${devtype} ${devnum} devplist; "     \
 259                "env exists devplist || setenv devplist 1; "    \
 260                "for distro_bootpart in ${devplist}; do "       \
 261                        "if fstype ${devtype} "                 \
 262                                "${devnum}:${distro_bootpart} " \
 263                                "bootfstype; then "             \
 264                                "run scan_dev_for_boot; "       \
 265                        "fi; "                                  \
 266                "done\0"                        \
 267        "boot_a_script="                                        \
 268                "load ${devtype} ${devnum}:${distro_bootpart} " \
 269                        "${scriptaddr} ${prefix}${script}; "    \
 270                "env exists secureboot && load ${devtype} "     \
 271                        "${devnum}:${distro_bootpart} "         \
 272                        "${scripthdraddr} ${prefix}${boot_script_hdr}; " \
 273                        "env exists secureboot "        \
 274                        "&& esbc_validate ${scripthdraddr};"    \
 275                "source ${scriptaddr}\0"                        \
 276        "qspi_bootcmd=echo Trying load from qspi..;"    \
 277                "sf probe && sf read $load_addr "       \
 278                "$kernel_start $kernel_size; env exists secureboot "    \
 279                "&& sf read $kernelheader_addr_r $kernelheader_start "  \
 280                "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \
 281                "bootm $load_addr#$board\0"     \
 282        "nor_bootcmd=echo Trying load from nor..;"      \
 283                "cp.b $kernel_addr $load_addr " \
 284                "$kernel_size; env exists secureboot "  \
 285                "&& cp.b $kernelheader_addr $kernelheader_addr_r "      \
 286                "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \
 287                "bootm $load_addr#$board\0"         \
 288        "nand_bootcmd=echo Trying load from NAND..;"    \
 289                "nand info; nand read $load_addr "      \
 290                "$kernel_start $kernel_size; env exists secureboot "    \
 291                "&& nand read $kernelheader_addr_r $kernelheader_start "        \
 292                "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \
 293                "bootm $load_addr#$board\0"     \
 294        "sd_bootcmd=echo Trying load from SD ..;"       \
 295                "mmcinfo; mmc read $load_addr "         \
 296                "$kernel_addr_sd $kernel_size_sd && "     \
 297                "env exists secureboot && mmc read $kernelheader_addr_r "               \
 298                "$kernelhdr_addr_sd $kernelhdr_size_sd "                \
 299                " && esbc_validate ${kernelheader_addr_r};"     \
 300                "bootm $load_addr#$board\0"
 301
 302
 303#undef CONFIG_BOOTCOMMAND
 304#ifdef CONFIG_TFABOOT
 305#define QSPI_NOR_BOOTCOMMAND "run distro_bootcmd; run qspi_bootcmd; "   \
 306                           "env exists secureboot && esbc_halt;"
 307#define SD_BOOTCOMMAND "run distro_bootcmd; run sd_bootcmd; "  \
 308                           "env exists secureboot && esbc_halt;"
 309#define IFC_NOR_BOOTCOMMAND "run distro_bootcmd; run nor_bootcmd; "     \
 310                           "env exists secureboot && esbc_halt;"
 311#define IFC_NAND_BOOTCOMMAND "run distro_bootcmd; run nand_bootcmd; "   \
 312                           "env exists secureboot && esbc_halt;"
 313#else
 314#if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI)
 315#define CONFIG_BOOTCOMMAND "run distro_bootcmd; run qspi_bootcmd; "     \
 316                           "env exists secureboot && esbc_halt;"
 317#elif defined(CONFIG_SD_BOOT)
 318#define CONFIG_BOOTCOMMAND "run distro_bootcmd; run sd_bootcmd; "  \
 319                           "env exists secureboot && esbc_halt;"
 320#else
 321#define CONFIG_BOOTCOMMAND "run distro_bootcmd; run nor_bootcmd; "      \
 322                           "env exists secureboot && esbc_halt;"
 323#endif
 324#endif
 325#endif
 326
 327/* Monitor Command Prompt */
 328#define CONFIG_SYS_CBSIZE               512     /* Console I/O Buffer Size */
 329
 330#define CONFIG_SYS_MAXARGS              64      /* max command args */
 331
 332#define CONFIG_SYS_BOOTM_LEN   (64 << 20)      /* Increase max gunzip size */
 333
 334#include <asm/arch/soc.h>
 335
 336#endif /* __LS1043A_COMMON_H */
 337