1/* SPDX-License-Identifier: GPL-2.0+ */ 2/* 3 * Copyright (C) 2010-2013 Freescale Semiconductor, Inc. 4 * Copyright (C) 2014 Bachmann electronic GmbH 5 */ 6 7#ifndef __CONFIG_H 8#define __CONFIG_H 9 10#include "mx6_common.h" 11 12/* Size of malloc() pool */ 13#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) 14 15/* UART Configs */ 16#define CONFIG_MXC_UART 17#define CONFIG_MXC_UART_BASE UART1_BASE 18 19/* SF Configs */ 20 21/* IO expander */ 22#define CONFIG_PCA953X 23#define CONFIG_SYS_I2C_PCA953X_ADDR 0x20 24#define CONFIG_SYS_I2C_PCA953X_WIDTH { {0x20, 16} } 25 26/* I2C Configs */ 27#define CONFIG_SYS_I2C 28#define CONFIG_SYS_I2C_MXC 29#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 30#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 31#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ 32#define CONFIG_SYS_I2C_SPEED 100000 33 34/* OCOTP Configs */ 35#define CONFIG_IMX_OTP 36#define IMX_OTP_BASE OCOTP_BASE_ADDR 37#define IMX_OTP_ADDR_MAX 0x7F 38#define IMX_OTP_DATA_ERROR_VAL 0xBADABADA 39#define IMX_OTPWRITE_ENABLED 40 41/* MMC Configs */ 42#define CONFIG_SYS_FSL_ESDHC_ADDR 0 43#define CONFIG_SYS_FSL_USDHC_NUM 2 44 45/* USB Configs */ 46#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 47#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 48 49/* 50 * SATA Configs 51 */ 52#ifdef CONFIG_CMD_SATA 53#define CONFIG_SYS_SATA_MAX_DEVICE 1 54#define CONFIG_DWC_AHSATA_PORT_ID 0 55#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR 56#define CONFIG_LBA48 57#endif 58 59/* SPL */ 60#ifdef CONFIG_SPL 61#include "imx6_spl.h" 62#endif 63 64#define CONFIG_FEC_MXC 65#define IMX_FEC_BASE ENET_BASE_ADDR 66#define CONFIG_FEC_XCV_TYPE MII100 67#define CONFIG_ETHPRIME "FEC" 68#define CONFIG_FEC_MXC_PHYADDR 0x5 69#define CONFIG_PHY_SMSC 70 71#ifndef CONFIG_SPL 72#define CONFIG_ENV_EEPROM_IS_ON_I2C 73#define CONFIG_SYS_I2C_EEPROM_BUS 1 74#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 75#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3 76#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5 77#endif 78 79/* Thermal support */ 80#define CONFIG_IMX_THERMAL 81 82/* Physical Memory Map */ 83#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR 84 85#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 86#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 87#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 88 89#define CONFIG_SYS_INIT_SP_OFFSET \ 90 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 91#define CONFIG_SYS_INIT_SP_ADDR \ 92 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 93 94/* Environment organization */ 95/* M25P16 has an erase size of 64 KiB */ 96 97#define CONFIG_BOOTP_SERVERIP 98#define CONFIG_BOOTP_BOOTFILE 99 100#endif /* __CONFIG_H */ 101