1/* SPDX-License-Identifier: GPL-2.0+ */ 2/* 3 * Configuation settings for the Renesas SH7763RDP board 4 * 5 * Copyright (C) 2008 Renesas Solutions Corp. 6 * Copyright (C) 2008 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com> 7 */ 8 9#ifndef __SH7763RDP_H 10#define __SH7763RDP_H 11 12#define CONFIG_CPU_SH7763 1 13#define __LITTLE_ENDIAN 1 14 15#define CONFIG_ENV_OVERWRITE 1 16 17#define CONFIG_DISPLAY_BOARDINFO 18 19/* SCIF */ 20#define CONFIG_CONS_SCIF2 1 21 22#define CONFIG_SYS_PBSIZE 256 /* Buffer size for Console output */ 23#define CONFIG_SYS_BAUDRATE_TABLE { 115200 } /* List of legal baudrate 24 settings for this board */ 25 26/* SDRAM */ 27#define CONFIG_SYS_SDRAM_BASE (0x8C000000) 28#define CONFIG_SYS_SDRAM_SIZE (64 * 1024 * 1024) 29#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE) 30#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (60 * 1024 * 1024)) 31 32/* Flash(NOR) */ 33#define CONFIG_SYS_FLASH_BASE (0xA0000000) 34#define CONFIG_SYS_FLASH_CFI_WIDTH (FLASH_CFI_16BIT) 35#define CONFIG_SYS_MAX_FLASH_BANKS (1) 36#define CONFIG_SYS_MAX_FLASH_SECT (520) 37 38/* U-Boot setting */ 39#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 4 * 1024 * 1024) 40#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE) 41#define CONFIG_SYS_MONITOR_LEN (128 * 1024) 42/* Size of DRAM reserved for malloc() use */ 43#define CONFIG_SYS_MALLOC_LEN (1024 * 1024) 44#define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) 45 46#undef CONFIG_SYS_FLASH_QUIET_TEST 47#define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */ 48/* Timeout for Flash erase operations (in ms) */ 49#define CONFIG_SYS_FLASH_ERASE_TOUT (3 * 1000) 50/* Timeout for Flash write operations (in ms) */ 51#define CONFIG_SYS_FLASH_WRITE_TOUT (3 * 1000) 52/* Timeout for Flash set sector lock bit operations (in ms) */ 53#define CONFIG_SYS_FLASH_LOCK_TOUT (3 * 1000) 54/* Timeout for Flash clear lock bit operations (in ms) */ 55#define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000) 56/* Use hardware flash sectors protection instead of U-Boot software protection */ 57#undef CONFIG_SYS_DIRECT_FLASH_TFTP 58/* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */ 59 60/* Clock */ 61#define CONFIG_SYS_CLK_FREQ 66666666 62#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ 63 64/* Ether */ 65#define CONFIG_SH_ETHER_USE_PORT (1) 66#define CONFIG_SH_ETHER_PHY_ADDR (0x01) 67#define CONFIG_BITBANGMII 68#define CONFIG_BITBANGMII_MULTI 69#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII 70 71#endif /* __SH7763RDP_H */ 72