LXR uboot/include/configs/tb100.h

   1/* SPDX-License-Identifier: GPL-2.0+ */
   2/*
   3 * Copyright (C) 2011-2014 Pierrick Hascoet, Abilis Systems
   4 */
   5
   6#ifndef _CONFIG_TB100_H_
   7#define _CONFIG_TB100_H_
   8
   9#include <linux/sizes.h>
  10
  11/*
  12 * Memory configuration
  13 */
  14#define CONFIG_SYS_MONITOR_BASE         CONFIG_SYS_TEXT_BASE
  15
  16#define CONFIG_SYS_DDR_SDRAM_BASE       0x80000000
  17#define CONFIG_SYS_SDRAM_BASE           CONFIG_SYS_DDR_SDRAM_BASE
  18#define CONFIG_SYS_SDRAM_SIZE           SZ_128M
  19
  20#define CONFIG_SYS_INIT_SP_ADDR         \
  21        (CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE)
  22
  23#define CONFIG_SYS_MALLOC_LEN           SZ_128K
  24#define CONFIG_SYS_BOOTM_LEN            SZ_32M
  25#define CONFIG_SYS_LOAD_ADDR            0x82000000
  26
  27/*
  28 * UART configuration
  29 */
  30#define CONFIG_SYS_NS16550_SERIAL
  31#define CONFIG_SYS_NS16550_CLK          166666666
  32
  33/*
  34 * Even though the board houses Realtek RTL8211E PHY
  35 * corresponding PHY driver (drivers/net/phy/realtek.c) behaves unexpectedly.
  36 * In particular "parse_status" reports link is down.
  37 *
  38 * Until Realtek PHY driver is fixed fall back to generic PHY driver
  39 * which implements all required functionality and behaves much more stable.
  40 *
  41 * #define CONFIG_PHY_REALTEK
  42 *
  43 */
  44
  45/*
  46 * Ethernet configuration
  47 */
  48#define ETH0_BASE_ADDRESS               0xFE100000
  49#define ETH1_BASE_ADDRESS               0xFE110000
  50
  51/*
  52 * Command line configuration
  53 */
  54
  55/*
  56 * Environment configuration
  57 */
  58#define CONFIG_BOOTFILE                 "uImage"
  59#define CONFIG_LOADADDR                 CONFIG_SYS_LOAD_ADDR
  60
  61/*
  62 * Console configuration
  63 */
  64
  65#endif /* _CONFIG_TB100_H_ */
  66