1/* SPDX-License-Identifier: GPL-2.0+ */ 2/* 3 * Copyright (C) 2018 Allied Telesis Labs 4 */ 5 6#ifndef _CONFIG_X530_H 7#define _CONFIG_X530_H 8 9/* 10 * High Level Configuration Options (easy to change) 11 */ 12 13#define CONFIG_DISPLAY_BOARDINFO_LATE 14 15#define CONFIG_SYS_TCLK 250000000 /* 250MHz */ 16 17/* 18 * NS16550 Configuration 19 */ 20#define CONFIG_SYS_NS16550_SERIAL 21#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_TCLK 22#if !defined(CONFIG_DM_SERIAL) 23#define CONFIG_SYS_NS16550_REG_SIZE (-4) 24#define CONFIG_SYS_NS16550_COM1 MV_UART_CONSOLE_BASE 25#endif 26 27/* 28 * Serial Port configuration 29 * The following definitions let you select what serial you want to use 30 * for your console driver. 31 */ 32 33#define CONFIG_CONS_INDEX 1 /*Console on UART0 */ 34 35/* 36 * Commands configuration 37 */ 38#define CONFIG_CMD_PCI 39 40/* NAND */ 41#define CONFIG_SYS_NAND_ONFI_DETECTION 42#define CONFIG_SYS_MAX_NAND_DEVICE 1 43 44#define BBT_CUSTOM_SCAN 45#define BBT_CUSTOM_SCAN_PAGE 0 46#define BBT_CUSTOM_SCAN_POSITION 2048 47 48/* SPI NOR flash default params, used by sf commands */ 49 50#define MTDIDS_DEFAULT "nand0=nand" 51#define MTDPARTS_DEFAULT "mtdparts=nand:240M(user),8M(errlog),8M(nand-bbt)" 52#define MTDPARTS_MTDOOPS "errlog" 53 54/* Partition support */ 55 56/* Additional FS support/configuration */ 57 58/* USB/EHCI configuration */ 59#define CONFIG_EHCI_IS_TDI 60 61/* Environment in SPI NOR flash */ 62 63#define CONFIG_PHY_MARVELL /* there is a marvell phy */ 64#define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */ 65 66/* PCIe support */ 67#ifndef CONFIG_SPL_BUILD 68#define CONFIG_PCI_SCAN_SHOW 69#endif 70 71/* NAND */ 72#define CONFIG_SYS_NAND_ONFI_DETECTION 73#define CONFIG_CMD_UBI 74#define CONFIG_CMD_UBIFS 75#define CONFIG_LZO 76#define CONFIG_CMD_MTDPARTS 77 78#define CONFIG_SYS_MALLOC_LEN (4 << 20) 79 80#include <asm/arch/config.h> 81 82/* 83 * Other required minimal configurations 84 */ 85#define CONFIG_SYS_RESET_ADDRESS 0xffff0000 /* Rst Vector Adr */ 86 87#define CONFIG_SYS_ALT_MEMTEST 88 89/* Keep device tree and initrd in low memory so the kernel can access them */ 90#define CONFIG_EXTRA_ENV_SETTINGS \ 91 "fdt_high=0x10000000\0" \ 92 "initrd_high=0x10000000\0" 93 94#define CONFIG_SYS_LOAD_ADDR 0x1000000 95#define CONFIG_UBI_PART user 96#define CONFIG_UBIFS_VOLUME user 97 98/* SPL */ 99 100/* Defines for SPL */ 101#define CONFIG_SPL_SIZE (140 << 10) 102#define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_SIZE - 0x0030) 103 104#define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE) 105#define CONFIG_SPL_BSS_MAX_SIZE (16 << 10) 106 107#ifdef CONFIG_SPL_BUILD 108#define CONFIG_SYS_MALLOC_SIMPLE 109#endif 110 111#define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10)) 112#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4) 113 114/* SPL related SPI defines */ 115#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS 116 117#endif /* _CONFIG_X530_H */ 118