LXR uboot/include/linux/mtd/omap

   1/* SPDX-License-Identifier: GPL-2.0+ */
   2/*
   3 * (C) Copyright 2004-2008 Texas Instruments, <www.ti.com>
   4 * Rohit Choraria <rohitkc@ti.com>
   5 *
   6 * (C) Copyright 2013 Andreas Bießmann <andreas@biessmann.org>
   7 */
   8#ifndef __ASM_OMAP_GPMC_H
   9#define __ASM_OMAP_GPMC_H
  10
  11#define GPMC_BUF_EMPTY  0
  12#define GPMC_BUF_FULL   1
  13#define GPMC_MAX_SECTORS        8
  14
  15enum omap_ecc {
  16        /* 1-bit  ECC calculation by Software, Error detection by Software */
  17        OMAP_ECC_HAM1_CODE_SW = 1, /* avoid un-initialized int can be 0x0 */
  18        /* 1-bit  ECC calculation by GPMC, Error detection by Software */
  19        /* ECC layout compatible to legacy ROMCODE. */
  20        OMAP_ECC_HAM1_CODE_HW,
  21        /* 4-bit  ECC calculation by GPMC, Error detection by Software */
  22        OMAP_ECC_BCH4_CODE_HW_DETECTION_SW,
  23        /* 4-bit  ECC calculation by GPMC, Error detection by ELM */
  24        OMAP_ECC_BCH4_CODE_HW,
  25        /* 8-bit  ECC calculation by GPMC, Error detection by Software */
  26        OMAP_ECC_BCH8_CODE_HW_DETECTION_SW,
  27        /* 8-bit  ECC calculation by GPMC, Error detection by ELM */
  28        OMAP_ECC_BCH8_CODE_HW,
  29        /* 16-bit  ECC calculation by GPMC, Error detection by ELM */
  30        OMAP_ECC_BCH16_CODE_HW,
  31};
  32
  33struct gpmc_cs {
  34        u32 config1;            /* 0x00 */
  35        u32 config2;            /* 0x04 */
  36        u32 config3;            /* 0x08 */
  37        u32 config4;            /* 0x0C */
  38        u32 config5;            /* 0x10 */
  39        u32 config6;            /* 0x14 */
  40        u32 config7;            /* 0x18 */
  41        u32 nand_cmd;           /* 0x1C */
  42        u32 nand_adr;           /* 0x20 */
  43        u32 nand_dat;           /* 0x24 */
  44        u8 res[8];              /* blow up to 0x30 byte */
  45};
  46
  47struct bch_res_0_3 {
  48        u32 bch_result_x[4];
  49};
  50
  51struct bch_res_4_6 {
  52        u32 bch_result_x[3];
  53};
  54
  55struct gpmc {
  56        u8 res1[0x10];
  57        u32 sysconfig;          /* 0x10 */
  58        u8 res2[0x4];
  59        u32 irqstatus;          /* 0x18 */
  60        u32 irqenable;          /* 0x1C */
  61        u8 res3[0x20];
  62        u32 timeout_control;    /* 0x40 */
  63        u8 res4[0xC];
  64        u32 config;             /* 0x50 */
  65        u32 status;             /* 0x54 */
  66        u8 res5[0x8];           /* 0x58 */
  67        struct gpmc_cs cs[8];   /* 0x60, 0x90, .. */
  68        u32 prefetch_config1;   /* 0x1E0 */
  69        u32 prefetch_config2;   /* 0x1E4 */
  70        u32 res6;               /* 0x1E8 */
  71        u32 prefetch_control;   /* 0x1EC */
  72        u32 prefetch_status;    /* 0x1F0 */
  73        u32 ecc_config;         /* 0x1F4 */
  74        u32 ecc_control;        /* 0x1F8 */
  75        u32 ecc_size_config;    /* 0x1FC */
  76        u32 ecc1_result;        /* 0x200 */
  77        u32 ecc2_result;        /* 0x204 */
  78        u32 ecc3_result;        /* 0x208 */
  79        u32 ecc4_result;        /* 0x20C */
  80        u32 ecc5_result;        /* 0x210 */
  81        u32 ecc6_result;        /* 0x214 */
  82        u32 ecc7_result;        /* 0x218 */
  83        u32 ecc8_result;        /* 0x21C */
  84        u32 ecc9_result;        /* 0x220 */
  85        u8 res7[12];            /* 0x224 */
  86        u32 testmomde_ctrl;     /* 0x230 */
  87        u8 res8[12];            /* 0x234 */
  88        struct bch_res_0_3 bch_result_0_3[GPMC_MAX_SECTORS]; /* 0x240,0x250, */
  89        u8 res9[16 * 4];        /* 0x2C0 - 0x2FF */
  90        struct bch_res_4_6 bch_result_4_6[GPMC_MAX_SECTORS]; /* 0x300,0x310, */
  91};
  92
  93/* Used for board specific gpmc initialization */
  94extern const struct gpmc *gpmc_cfg;
  95extern char gpmc_cs0_flash;
  96
  97#endif /* __ASM_OMAP_GPMC_H */
  98