1menu "ARM architecture"
2 depends on ARM
3
4config SYS_ARCH
5 default "arm"
6
7config ARM64
8 bool
9 select PHYS_64BIT
10 select SYS_CACHE_SHIFT_6
11
12if ARM64
13config POSITION_INDEPENDENT
14 bool "Generate position-independent pre-relocation code"
15 select INIT_SP_RELATIVE
16 help
17 U-Boot expects to be linked to a specific hard-coded address, and to
18 be loaded to and run from that address. This option lifts that
19 restriction, thus allowing the code to be loaded to and executed
20 from almost any address. This logic relies on the relocation
21 information that is embedded in the binary to support U-Boot
22 relocating itself to the top-of-RAM later during execution.
23
24config INIT_SP_RELATIVE
25 bool "Specify the early stack pointer relative to the .bss section"
26 help
27 U-Boot typically uses a hard-coded value for the stack pointer
28 before relocation. Enable this option to instead calculate the
29 initial SP at run-time. This is useful to avoid hard-coding addresses
30 into U-Boot, so that it can be loaded and executed at arbitrary
31 addresses and thus avoid using arbitrary addresses at runtime.
32
33 If this option is enabled, the early stack pointer is set to
34 &_bss_start with a offset value added. The offset is specified by
35 SYS_INIT_SP_BSS_OFFSET.
36
37config SYS_INIT_SP_BSS_OFFSET
38 int "Early stack offset from the .bss base address"
39 depends on INIT_SP_RELATIVE
40 default 524288
41 help
42 This option's value is the offset added to &_bss_start in order to
43 calculate the stack pointer. This offset should be large enough so
44 that the early malloc region, global data (gd), and early stack usage
45 do not overlap any appended DTB.
46
47config LINUX_KERNEL_IMAGE_HEADER
48 bool
49 help
50 Place a Linux kernel image header at the start of the U-Boot binary.
51 The format of the header is described in the Linux kernel source at
52 Documentation/arm64/booting.txt. This feature is useful since the
53 image header reports the amount of memory (BSS and similar) that
54 U-Boot needs to use, but which isn't part of the binary.
55
56if LINUX_KERNEL_IMAGE_HEADER
57config LNX_KRNL_IMG_TEXT_OFFSET_BASE
58 hex
59 help
60 The value subtracted from CONFIG_SYS_TEXT_BASE to calculate the
61 TEXT_OFFSET value written to the Linux kernel image header.
62endif
63endif
64
65config GIC_V3_ITS
66 bool "ARM GICV3 ITS"
67 help
68 ARM GICV3 Interrupt translation service (ITS).
69 Basic support for programming locality specific peripheral
70 interrupts (LPI) configuration tables and enable LPI tables.
71 LPI configuration table can be used by u-boot or Linux.
72 ARM GICV3 has limitation, once the LPI table is enabled, LPI
73 configuration table can not be re-programmed, unless GICV3 reset.
74
75config STATIC_RELA
76 bool
77 default y if ARM64 && !POSITION_INDEPENDENT
78
79config DMA_ADDR_T_64BIT
80 bool
81 default y if ARM64
82
83config HAS_VBAR
84 bool
85
86config HAS_THUMB2
87 bool
88
89
90config ARM_ASM_UNIFIED
91 bool
92 default y
93
94
95config THUMB2_KERNEL
96 bool
97
98config SYS_ICACHE_OFF
99 bool "Do not enable icache"
100 default n
101 help
102 Do not enable instruction cache in U-Boot.
103
104config SPL_SYS_ICACHE_OFF
105 bool "Do not enable icache in SPL"
106 depends on SPL
107 default SYS_ICACHE_OFF
108 help
109 Do not enable instruction cache in SPL.
110
111config SYS_DCACHE_OFF
112 bool "Do not enable dcache"
113 default n
114 help
115 Do not enable data cache in U-Boot.
116
117config SPL_SYS_DCACHE_OFF
118 bool "Do not enable dcache in SPL"
119 depends on SPL
120 default SYS_DCACHE_OFF
121 help
122 Do not enable data cache in SPL.
123
124config SYS_ARM_CACHE_CP15
125 bool "CP15 based cache enabling support"
126 help
127 Select this if your processor suports enabling caches by using
128 CP15 registers.
129
130config SYS_ARM_MMU
131 bool "MMU-based Paged Memory Management Support"
132 select SYS_ARM_CACHE_CP15
133 help
134 Select if you want MMU-based virtualised addressing space
135 support via paged memory management.
136
137config SYS_ARM_MPU
138 bool 'Use the ARM v7 PMSA Compliant MPU'
139 help
140 Some ARM systems without an MMU have instead a Memory Protection
141 Unit (MPU) that defines the type and permissions for regions of
142 memory.
143 If your CPU has an MPU then you should choose 'y' here unless you
144 know that you do not want to use the MPU.
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161config ARM_ERRATA_430973
162 bool
163
164config ARM_ERRATA_454179
165 bool
166
167config ARM_ERRATA_621766
168 bool
169
170config ARM_ERRATA_716044
171 bool
172
173config ARM_ERRATA_725233
174 bool
175
176config ARM_ERRATA_742230
177 bool
178
179config ARM_ERRATA_743622
180 bool
181
182config ARM_ERRATA_751472
183 bool
184
185config ARM_ERRATA_761320
186 bool
187
188config ARM_ERRATA_773022
189 bool
190
191config ARM_ERRATA_774769
192 bool
193
194config ARM_ERRATA_794072
195 bool
196
197config ARM_ERRATA_798870
198 bool
199
200config ARM_ERRATA_801819
201 bool
202
203config ARM_ERRATA_826974
204 bool
205
206config ARM_ERRATA_828024
207 bool
208
209config ARM_ERRATA_829520
210 bool
211
212config ARM_ERRATA_833069
213 bool
214
215config ARM_ERRATA_833471
216 bool
217
218config ARM_ERRATA_845369
219 bool
220
221config ARM_ERRATA_852421
222 bool
223
224config ARM_ERRATA_852423
225 bool
226
227config ARM_ERRATA_855873
228 bool
229
230config ARM_CORTEX_A8_CVE_2017_5715
231 bool
232
233config ARM_CORTEX_A15_CVE_2017_5715
234 bool
235
236config CPU_ARM720T
237 bool
238 select SYS_CACHE_SHIFT_5
239 imply SYS_ARM_MMU
240
241config CPU_ARM920T
242 bool
243 select SYS_CACHE_SHIFT_5
244 imply SYS_ARM_MMU
245
246config CPU_ARM926EJS
247 bool
248 select SYS_CACHE_SHIFT_5
249 imply SYS_ARM_MMU
250
251config CPU_ARM946ES
252 bool
253 select SYS_CACHE_SHIFT_5
254 imply SYS_ARM_MMU
255
256config CPU_ARM1136
257 bool
258 select SYS_CACHE_SHIFT_5
259 imply SYS_ARM_MMU
260
261config CPU_ARM1176
262 bool
263 select HAS_VBAR
264 select SYS_CACHE_SHIFT_5
265 imply SYS_ARM_MMU
266
267config CPU_V7A
268 bool
269 select HAS_THUMB2
270 select HAS_VBAR
271 select SYS_CACHE_SHIFT_6
272 imply SYS_ARM_MMU
273
274config CPU_V7M
275 bool
276 select HAS_THUMB2
277 select SYS_ARM_MPU
278 select SYS_CACHE_SHIFT_5
279 select SYS_THUMB_BUILD
280 select THUMB2_KERNEL
281
282config CPU_V7R
283 bool
284 select HAS_THUMB2
285 select SYS_ARM_CACHE_CP15
286 select SYS_ARM_MPU
287 select SYS_CACHE_SHIFT_6
288
289config CPU_PXA
290 bool
291 select SYS_CACHE_SHIFT_5
292 imply SYS_ARM_MMU
293
294config CPU_SA1100
295 bool
296 select SYS_CACHE_SHIFT_5
297 imply SYS_ARM_MMU
298
299config SYS_CPU
300 default "arm720t" if CPU_ARM720T
301 default "arm920t" if CPU_ARM920T
302 default "arm926ejs" if CPU_ARM926EJS
303 default "arm946es" if CPU_ARM946ES
304 default "arm1136" if CPU_ARM1136
305 default "arm1176" if CPU_ARM1176
306 default "armv7" if CPU_V7A
307 default "armv7" if CPU_V7R
308 default "armv7m" if CPU_V7M
309 default "pxa" if CPU_PXA
310 default "sa1100" if CPU_SA1100
311 default "armv8" if ARM64
312
313config SYS_ARM_ARCH
314 int
315 default 4 if CPU_ARM720T
316 default 4 if CPU_ARM920T
317 default 5 if CPU_ARM926EJS
318 default 5 if CPU_ARM946ES
319 default 6 if CPU_ARM1136
320 default 6 if CPU_ARM1176
321 default 7 if CPU_V7A
322 default 7 if CPU_V7M
323 default 7 if CPU_V7R
324 default 5 if CPU_PXA
325 default 4 if CPU_SA1100
326 default 8 if ARM64
327
328config SYS_CACHE_SHIFT_5
329 bool
330
331config SYS_CACHE_SHIFT_6
332 bool
333
334config SYS_CACHE_SHIFT_7
335 bool
336
337config SYS_CACHELINE_SIZE
338 int
339 default 128 if SYS_CACHE_SHIFT_7
340 default 64 if SYS_CACHE_SHIFT_6
341 default 32 if SYS_CACHE_SHIFT_5
342
343config ARCH_CPU_INIT
344 bool "Enable ARCH_CPU_INIT"
345 help
346 Some architectures require a call to arch_cpu_init().
347 Say Y here to enable it
348
349config SYS_ARCH_TIMER
350 bool "ARM Generic Timer support"
351 depends on CPU_V7A || ARM64
352 default y if ARM64
353 help
354 The ARM Generic Timer (aka arch-timer) provides an architected
355 interface to a timer source on an SoC.
356 It is mandatory for ARMv8 implementation and widely available
357 on ARMv7 systems.
358
359config ARM_SMCCC
360 bool "Support for ARM SMC Calling Convention (SMCCC)"
361 depends on CPU_V7A || ARM64
362 select ARM_PSCI_FW
363 help
364 Say Y here if you want to enable ARM SMC Calling Convention.
365 This should be enabled if U-Boot needs to communicate with system
366 firmware (for example, PSCI) according to SMCCC.
367
368config SEMIHOSTING
369 bool "support boot from semihosting"
370 help
371 In emulated environments, semihosting is a way for
372 the hosted environment to call out to the emulator to
373 retrieve files from the host machine.
374
375config SYS_THUMB_BUILD
376 bool "Build U-Boot using the Thumb instruction set"
377 depends on !ARM64
378 help
379 Use this flag to build U-Boot using the Thumb instruction set for
380 ARM architectures. Thumb instruction set provides better code
381 density. For ARM architectures that support Thumb2 this flag will
382 result in Thumb2 code generated by GCC.
383
384config SPL_SYS_THUMB_BUILD
385 bool "Build SPL using the Thumb instruction set"
386 default y if SYS_THUMB_BUILD
387 depends on !ARM64 && SPL
388 help
389 Use this flag to build SPL using the Thumb instruction set for
390 ARM architectures. Thumb instruction set provides better code
391 density. For ARM architectures that support Thumb2 this flag will
392 result in Thumb2 code generated by GCC.
393
394config TPL_SYS_THUMB_BUILD
395 bool "Build TPL using the Thumb instruction set"
396 default y if SYS_THUMB_BUILD
397 depends on TPL && !ARM64
398 help
399 Use this flag to build TPL using the Thumb instruction set for
400 ARM architectures. Thumb instruction set provides better code
401 density. For ARM architectures that support Thumb2 this flag will
402 result in Thumb2 code generated by GCC.
403
404
405config SYS_L2CACHE_OFF
406 bool "L2cache off"
407 help
408 If SoC does not support L2CACHE or one does not want to enable
409 L2CACHE, choose this option.
410
411config ENABLE_ARM_SOC_BOOT0_HOOK
412 bool "prepare BOOT0 header"
413 help
414 If the SoC's BOOT0 requires a header area filled with (magic)
415 values, then choose this option, and create a file included as
416 <asm/arch/boot0.h> which contains the required assembler code.
417
418config ARM_CORTEX_CPU_IS_UP
419 bool
420 default n
421
422config USE_ARCH_MEMCPY
423 bool "Use an assembly optimized implementation of memcpy"
424 default y
425 depends on !ARM64
426 help
427 Enable the generation of an optimized version of memcpy.
428 Such an implementation may be faster under some conditions
429 but may increase the binary size.
430
431config SPL_USE_ARCH_MEMCPY
432 bool "Use an assembly optimized implementation of memcpy for SPL"
433 default y if USE_ARCH_MEMCPY
434 depends on !ARM64 && SPL
435 help
436 Enable the generation of an optimized version of memcpy.
437 Such an implementation may be faster under some conditions
438 but may increase the binary size.
439
440config TPL_USE_ARCH_MEMCPY
441 bool "Use an assembly optimized implementation of memcpy for TPL"
442 default y if USE_ARCH_MEMCPY
443 depends on !ARM64 && TPL
444 help
445 Enable the generation of an optimized version of memcpy.
446 Such an implementation may be faster under some conditions
447 but may increase the binary size.
448
449config USE_ARCH_MEMSET
450 bool "Use an assembly optimized implementation of memset"
451 default y
452 depends on !ARM64
453 help
454 Enable the generation of an optimized version of memset.
455 Such an implementation may be faster under some conditions
456 but may increase the binary size.
457
458config SPL_USE_ARCH_MEMSET
459 bool "Use an assembly optimized implementation of memset for SPL"
460 default y if USE_ARCH_MEMSET
461 depends on !ARM64 && SPL
462 help
463 Enable the generation of an optimized version of memset.
464 Such an implementation may be faster under some conditions
465 but may increase the binary size.
466
467config TPL_USE_ARCH_MEMSET
468 bool "Use an assembly optimized implementation of memset for TPL"
469 default y if USE_ARCH_MEMSET
470 depends on !ARM64 && TPL
471 help
472 Enable the generation of an optimized version of memset.
473 Such an implementation may be faster under some conditions
474 but may increase the binary size.
475
476config SET_STACK_SIZE
477 bool "Enable an option to set max stack size that can be used"
478 default y if ARCH_VERSAL || ARCH_ZYNQMP
479 help
480 This will enable an option to set max stack size that can be
481 used by U-Boot.
482
483config STACK_SIZE
484 hex "Define max stack size that can be used by U-Boot"
485 depends on SET_STACK_SIZE
486 default 0x4000000 if ARCH_VERSAL || ARCH_ZYNQMP
487 help
488 Define Max stack size that can be used by U-Boot so that the
489 initrd_high will be calculated as base stack pointer minus this
490 stack size.
491
492config ARM64_SUPPORT_AARCH32
493 bool "ARM64 system support AArch32 execution state"
494 depends on ARM64
495 default y if !TARGET_THUNDERX_88XX
496 help
497 This ARM64 system supports AArch32 execution state.
498
499choice
500 prompt "Target select"
501 default TARGET_HIKEY
502
503config ARCH_AT91
504 bool "Atmel AT91"
505 select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB
506
507config TARGET_EDB93XX
508 bool "Support edb93xx"
509 select CPU_ARM920T
510 select PL010_SERIAL
511
512config TARGET_ASPENITE
513 bool "Support aspenite"
514 select CPU_ARM926EJS
515
516config TARGET_GPLUGD
517 bool "Support gplugd"
518 select CPU_ARM926EJS
519
520config ARCH_DAVINCI
521 bool "TI DaVinci"
522 select CPU_ARM926EJS
523 imply CMD_SAVES
524 help
525 Support for TI's DaVinci platform.
526
527config KIRKWOOD
528 bool "Marvell Kirkwood"
529 select ARCH_MISC_INIT
530 select BOARD_EARLY_INIT_F
531 select CPU_ARM926EJS
532
533config ARCH_MVEBU
534 bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)"
535 select DM
536 select DM_ETH
537 select DM_SERIAL
538 select DM_SPI
539 select DM_SPI_FLASH
540 select OF_CONTROL
541 select OF_SEPARATE
542 select SPI
543 imply CMD_DM
544
545config TARGET_APF27
546 bool "Support apf27"
547 select CPU_ARM926EJS
548 select SUPPORT_SPL
549
550config ORION5X
551 bool "Marvell Orion"
552 select CPU_ARM926EJS
553
554config TARGET_SPEAR300
555 bool "Support spear300"
556 select BOARD_EARLY_INIT_F
557 select CPU_ARM926EJS
558 select PL011_SERIAL
559 imply CMD_SAVES
560
561config TARGET_SPEAR310
562 bool "Support spear310"
563 select BOARD_EARLY_INIT_F
564 select CPU_ARM926EJS
565 select PL011_SERIAL
566 imply CMD_SAVES
567
568config TARGET_SPEAR320
569 bool "Support spear320"
570 select BOARD_EARLY_INIT_F
571 select CPU_ARM926EJS
572 select PL011_SERIAL
573 imply CMD_SAVES
574
575config TARGET_SPEAR600
576 bool "Support spear600"
577 select BOARD_EARLY_INIT_F
578 select CPU_ARM926EJS
579 select PL011_SERIAL
580 imply CMD_SAVES
581
582config TARGET_STV0991
583 bool "Support stv0991"
584 select CPU_V7A
585 select DM
586 select DM_SERIAL
587 select DM_SPI
588 select DM_SPI_FLASH
589 select PL01X_SERIAL
590 select SPI
591 select SPI_FLASH
592 imply CMD_DM
593
594config TARGET_X600
595 bool "Support x600"
596 select BOARD_LATE_INIT
597 select CPU_ARM926EJS
598 select PL011_SERIAL
599 select SUPPORT_SPL
600
601config TARGET_FLEA3
602 bool "Support flea3"
603 select CPU_ARM1136
604
605config TARGET_MX35PDK
606 bool "Support mx35pdk"
607 select BOARD_LATE_INIT
608 select CPU_ARM1136
609
610config ARCH_BCM283X
611 bool "Broadcom BCM283X family"
612 select DM
613 select DM_GPIO
614 select DM_SERIAL
615 select OF_CONTROL
616 select PL01X_SERIAL
617 select SERIAL_SEARCH_ALL
618 imply CMD_DM
619 imply FAT_WRITE
620
621config ARCH_BCM63158
622 bool "Broadcom BCM63158 family"
623 select DM
624 select OF_CONTROL
625 imply CMD_DM
626
627config ARCH_BCM68360
628 bool "Broadcom BCM68360 family"
629 select DM
630 select OF_CONTROL
631 imply CMD_DM
632
633config ARCH_BCM6858
634 bool "Broadcom BCM6858 family"
635 select DM
636 select OF_CONTROL
637 imply CMD_DM
638
639config TARGET_VEXPRESS_CA15_TC2
640 bool "Support vexpress_ca15_tc2"
641 select CPU_V7A
642 select CPU_V7_HAS_NONSEC
643 select CPU_V7_HAS_VIRT
644 select PL011_SERIAL
645
646config ARCH_BCMSTB
647 bool "Broadcom BCM7XXX family"
648 select CPU_V7A
649 select DM
650 select OF_CONTROL
651 select OF_PRIOR_STAGE
652 imply CMD_DM
653 help
654 This enables support for Broadcom ARM-based set-top box
655 chipsets, including the 7445 family of chips.
656
657config TARGET_VEXPRESS_CA5X2
658 bool "Support vexpress_ca5x2"
659 select CPU_V7A
660 select PL011_SERIAL
661
662config TARGET_VEXPRESS_CA9X4
663 bool "Support vexpress_ca9x4"
664 select CPU_V7A
665 select PL011_SERIAL
666
667config TARGET_BCM23550_W1D
668 bool "Support bcm23550_w1d"
669 select CPU_V7A
670 imply CRC32_VERIFY
671 imply FAT_WRITE
672
673config TARGET_BCM28155_AP
674 bool "Support bcm28155_ap"
675 select CPU_V7A
676 imply CRC32_VERIFY
677 imply FAT_WRITE
678
679config TARGET_BCMCYGNUS
680 bool "Support bcmcygnus"
681 select CPU_V7A
682 imply BCM_SF2_ETH
683 imply BCM_SF2_ETH_GMAC
684 imply CMD_HASH
685 imply CRC32_VERIFY
686 imply FAT_WRITE
687 imply HASH_VERIFY
688 imply NETDEVICES
689
690config TARGET_BCMNSP
691 bool "Support bcmnsp"
692 select CPU_V7A
693
694config TARGET_BCMNS2
695 bool "Support Broadcom Northstar2"
696 select ARM64
697 help
698 Support for Broadcom Northstar 2 SoCs. NS2 is a quad-core 64-bit
699 ARMv8 Cortex-A57 processors targeting a broad range of networking
700 applications.
701
702config ARCH_EXYNOS
703 bool "Samsung EXYNOS"
704 select DM
705 select DM_GPIO
706 select DM_I2C
707 select DM_KEYBOARD
708 select DM_SERIAL
709 select DM_SPI
710 select DM_SPI_FLASH
711 select SPI
712 imply SYS_THUMB_BUILD
713 imply CMD_DM
714 imply FAT_WRITE
715
716config ARCH_S5PC1XX
717 bool "Samsung S5PC1XX"
718 select CPU_V7A
719 select DM
720 select DM_GPIO
721 select DM_I2C
722 select DM_SERIAL
723 imply CMD_DM
724
725config ARCH_HIGHBANK
726 bool "Calxeda Highbank"
727 select CPU_V7A
728 select PL011_SERIAL
729
730config ARCH_INTEGRATOR
731 bool "ARM Ltd. Integrator family"
732 select DM
733 select DM_SERIAL
734 select PL01X_SERIAL
735 imply CMD_DM
736
737config ARCH_KEYSTONE
738 bool "TI Keystone"
739 select CMD_POWEROFF
740 select CPU_V7A
741 select SUPPORT_SPL
742 select SYS_ARCH_TIMER
743 select SYS_THUMB_BUILD
744 imply CMD_MTDPARTS
745 imply CMD_SAVES
746 imply FIT
747
748config ARCH_K3
749 bool "Texas Instruments' K3 Architecture"
750 select SPL
751 select SUPPORT_SPL
752 select FIT
753
754config ARCH_OMAP2PLUS
755 bool "TI OMAP2+"
756 select CPU_V7A
757 select SPL_BOARD_INIT if SPL
758 select SPL_STACK_R if SPL
759 select SUPPORT_SPL
760 imply FIT
761
762config ARCH_MESON
763 bool "Amlogic Meson"
764 imply DISTRO_DEFAULTS
765 help
766 Support for the Meson SoC family developed by Amlogic Inc.,
767 targeted at media players and tablet computers. We currently
768 support the S905 (GXBaby) 64-bit SoC.
769
770config ARCH_MEDIATEK
771 bool "MediaTek SoCs"
772 select DM
773 select OF_CONTROL
774 select SPL_DM if SPL
775 select SPL_LIBCOMMON_SUPPORT if SPL
776 select SPL_LIBGENERIC_SUPPORT if SPL
777 select SPL_OF_CONTROL if SPL
778 select SUPPORT_SPL
779 help
780 Support for the MediaTek SoCs family developed by MediaTek Inc.
781 Please refer to doc/README.mediatek for more information.
782
783config ARCH_LPC32XX
784 bool "NXP LPC32xx platform"
785 select CPU_ARM926EJS
786 select DM
787 select DM_GPIO
788 select DM_SERIAL
789 select SPL_DM if SPL
790 select SUPPORT_SPL
791 imply CMD_DM
792
793config ARCH_IMX8
794 bool "NXP i.MX8 platform"
795 select ARM64
796 select DM
797 select OF_CONTROL
798 select ENABLE_ARM_SOC_BOOT0_HOOK
799
800config ARCH_IMX8M
801 bool "NXP i.MX8M platform"
802 select ARM64
803 select DM
804 select SUPPORT_SPL
805 imply CMD_DM
806
807config ARCH_IMXRT
808 bool "NXP i.MXRT platform"
809 select CPU_V7M
810 select DM
811 select DM_SERIAL
812 select SUPPORT_SPL
813 imply CMD_DM
814
815config ARCH_MX23
816 bool "NXP i.MX23 family"
817 select CPU_ARM926EJS
818 select PL011_SERIAL
819 select SUPPORT_SPL
820
821config ARCH_MX25
822 bool "NXP MX25"
823 select CPU_ARM926EJS
824 imply MXC_GPIO
825
826config ARCH_MX28
827 bool "NXP i.MX28 family"
828 select CPU_ARM926EJS
829 select PL011_SERIAL
830 select SUPPORT_SPL
831
832config ARCH_MX31
833 bool "NXP i.MX31 family"
834 select CPU_ARM1136
835
836config ARCH_MX7ULP
837 bool "NXP MX7ULP"
838 select CPU_V7A
839 select ROM_UNIFIED_SECTIONS
840 imply MXC_GPIO
841 imply SYS_THUMB_BUILD
842
843config ARCH_MX7
844 bool "Freescale MX7"
845 select ARCH_MISC_INIT
846 select BOARD_EARLY_INIT_F
847 select CPU_V7A
848 select SYS_FSL_HAS_SEC if IMX_HAB
849 select SYS_FSL_SEC_COMPAT_4
850 select SYS_FSL_SEC_LE
851 imply MXC_GPIO
852 imply SYS_THUMB_BUILD
853
854config ARCH_MX6
855 bool "Freescale MX6"
856 select CPU_V7A
857 select SYS_FSL_HAS_SEC if IMX_HAB
858 select SYS_FSL_SEC_COMPAT_4
859 select SYS_FSL_SEC_LE
860 imply MXC_GPIO
861 imply SYS_THUMB_BUILD
862
863if ARCH_MX6
864config SPL_LDSCRIPT
865 default "arch/arm/mach-omap2/u-boot-spl.lds"
866endif
867
868config ARCH_MX5
869 bool "Freescale MX5"
870 select BOARD_EARLY_INIT_F
871 select CPU_V7A
872 imply MXC_GPIO
873
874config ARCH_OWL
875 bool "Actions Semi OWL SoCs"
876 select ARM64
877 select DM
878 select DM_SERIAL
879 select OF_CONTROL
880 imply CMD_DM
881
882config ARCH_QEMU
883 bool "QEMU Virtual Platform"
884 select ARCH_SUPPORT_TFABOOT
885 select DM
886 select DM_SERIAL
887 select OF_CONTROL
888 select PL01X_SERIAL
889 imply CMD_DM
890 imply DM_RTC
891 imply RTC_PL031
892
893config ARCH_RMOBILE
894 bool "Renesas ARM SoCs"
895 select BOARD_EARLY_INIT_F if !RZA1
896 select DM
897 select DM_SERIAL
898 imply CMD_DM
899 imply FAT_WRITE
900 imply SYS_THUMB_BUILD
901 imply ARCH_MISC_INIT if DISPLAY_CPUINFO
902
903config TARGET_S32V234EVB
904 bool "Support s32v234evb"
905 select ARM64
906 select SYS_FSL_ERRATUM_ESDHC111
907
908config ARCH_SNAPDRAGON
909 bool "Qualcomm Snapdragon SoCs"
910 select ARM64
911 select DM
912 select DM_GPIO
913 select DM_SERIAL
914 select MSM_SMEM
915 select OF_CONTROL
916 select OF_SEPARATE
917 select SMEM
918 select SPMI
919 imply CMD_DM
920
921config ARCH_SOCFPGA
922 bool "Altera SOCFPGA family"
923 select ARCH_EARLY_INIT_R
924 select ARCH_MISC_INIT if !TARGET_SOCFPGA_ARRIA10
925 select ARM64 if TARGET_SOCFPGA_STRATIX10 || TARGET_SOCFPGA_AGILEX
926 select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
927 select DM
928 select DM_SERIAL
929 select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
930 select OF_CONTROL
931 select SPL_DM_RESET if DM_RESET
932 select SPL_DM_SERIAL
933 select SPL_LIBCOMMON_SUPPORT
934 select SPL_LIBGENERIC_SUPPORT
935 select SPL_NAND_SUPPORT if SPL_NAND_DENALI
936 select SPL_OF_CONTROL
937 select SPL_SEPARATE_BSS if TARGET_SOCFPGA_STRATIX10 || TARGET_SOCFPGA_AGILEX
938 select SPL_SERIAL_SUPPORT
939 select SPL_SYSRESET
940 select SPL_WATCHDOG_SUPPORT
941 select SUPPORT_SPL
942 select SYS_NS16550
943 select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
944 select SYSRESET
945 select SYSRESET_SOCFPGA if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
946 select SYSRESET_SOCFPGA_S10 if TARGET_SOCFPGA_STRATIX10
947 imply CMD_DM
948 imply CMD_MTDPARTS
949 imply CRC32_VERIFY
950 imply DM_SPI
951 imply DM_SPI_FLASH
952 imply FAT_WRITE
953 imply SPL
954 imply SPL_DM
955 imply SPL_LIBDISK_SUPPORT
956 imply SPL_MMC_SUPPORT
957 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
958 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
959 imply SPL_SPI_FLASH_SUPPORT
960 imply SPL_SPI_SUPPORT
961 imply L2X0_CACHE
962
963config ARCH_SUNXI
964 bool "Support sunxi (Allwinner) SoCs"
965 select BINMAN
966 select CMD_GPIO
967 select CMD_MMC if MMC
968 select CMD_USB if DISTRO_DEFAULTS
969 select CLK
970 select DM
971 select DM_ETH
972 select DM_GPIO
973 select DM_KEYBOARD
974 select DM_MMC if MMC
975 select DM_SCSI if SCSI
976 select DM_SERIAL
977 select DM_USB if DISTRO_DEFAULTS
978 select OF_BOARD_SETUP
979 select OF_CONTROL
980 select OF_SEPARATE
981 select SPECIFY_CONSOLE_INDEX
982 select SPL_STACK_R if SPL
983 select SPL_SYS_MALLOC_SIMPLE if SPL
984 select SPL_SYS_THUMB_BUILD if !ARM64
985 select SUNXI_GPIO
986 select SYS_NS16550
987 select SYS_THUMB_BUILD if !ARM64
988 select USB if DISTRO_DEFAULTS
989 select USB_KEYBOARD if DISTRO_DEFAULTS
990 select USB_STORAGE if DISTRO_DEFAULTS
991 select SPL_USE_TINY_PRINTF
992 select USE_PREBOOT
993 select SYS_RELOC_GD_ENV_ADDR
994 imply CMD_DM
995 imply CMD_GPT
996 imply CMD_UBI if MTD_RAW_NAND
997 imply DISTRO_DEFAULTS
998 imply FAT_WRITE
999 imply FIT
1000 imply OF_LIBFDT_OVERLAY
1001 imply PRE_CONSOLE_BUFFER
1002 imply SPL_GPIO_SUPPORT
1003 imply SPL_LIBCOMMON_SUPPORT
1004 imply SPL_LIBGENERIC_SUPPORT
1005 imply SPL_MMC_SUPPORT if MMC
1006 imply SPL_POWER_SUPPORT
1007 imply SPL_SERIAL_SUPPORT
1008 imply USB_GADGET
1009
1010config ARCH_U8500
1011 bool "ST-Ericsson U8500 Series"
1012 select CPU_V7A
1013 select DM
1014 select DM_GPIO
1015 select DM_MMC if MMC
1016 select DM_SERIAL
1017 select DM_USB if USB
1018 select OF_CONTROL
1019 select SYSRESET
1020 select TIMER
1021 imply ARM_PL180_MMCI
1022 imply DM_RTC
1023 imply NOMADIK_MTU_TIMER
1024 imply PL01X_SERIAL
1025 imply RTC_PL031
1026 imply SYSRESET_SYSCON
1027
1028config ARCH_VERSAL
1029 bool "Support Xilinx Versal Platform"
1030 select ARM64
1031 select CLK
1032 select DM
1033 select DM_ETH if NET
1034 select DM_MMC if MMC
1035 select DM_SERIAL
1036 select OF_CONTROL
1037 imply BOARD_LATE_INIT
1038
1039config ARCH_VF610
1040 bool "Freescale Vybrid"
1041 select CPU_V7A
1042 select SYS_FSL_ERRATUM_ESDHC111
1043 imply CMD_MTDPARTS
1044 imply MTD_RAW_NAND
1045
1046config ARCH_ZYNQ
1047 bool "Xilinx Zynq based platform"
1048 select CLK
1049 select CLK_ZYNQ
1050 select CPU_V7A
1051 select DM
1052 select DM_ETH if NET
1053 select DM_MMC if MMC
1054 select DM_SERIAL
1055 select DM_SPI
1056 select DM_SPI_FLASH
1057 select DM_USB if USB
1058 select OF_CONTROL
1059 select SPI
1060 select SPL_BOARD_INIT if SPL
1061 select SPL_CLK if SPL
1062 select SPL_DM if SPL
1063 select SPL_OF_CONTROL if SPL
1064 select SPL_SEPARATE_BSS if SPL
1065 select SUPPORT_SPL
1066 imply ARCH_EARLY_INIT_R
1067 imply BOARD_LATE_INIT
1068 imply CMD_CLK
1069 imply CMD_DM
1070 imply CMD_SPL
1071 imply FAT_WRITE
1072
1073config ARCH_ZYNQMP_R5
1074 bool "Xilinx ZynqMP R5 based platform"
1075 select CLK
1076 select CPU_V7R
1077 select DM
1078 select DM_ETH if NET
1079 select DM_MMC if MMC
1080 select DM_SERIAL
1081 select OF_CONTROL
1082 imply CMD_DM
1083 imply DM_USB_GADGET
1084
1085config ARCH_ZYNQMP
1086 bool "Xilinx ZynqMP based platform"
1087 select ARM64
1088 select CLK
1089 select DM
1090 select DM_ETH if NET
1091 select DM_MAILBOX
1092 select DM_MMC if MMC
1093 select DM_SERIAL
1094 select DM_SPI if SPI
1095 select DM_SPI_FLASH if DM_SPI
1096 select DM_USB if USB
1097 select FIRMWARE
1098 select OF_CONTROL
1099 select SPL_BOARD_INIT if SPL
1100 select SPL_CLK if SPL
1101 select SPL_DM_MAILBOX if SPL
1102 select SPL_FIRMWARE if SPL
1103 select SPL_SEPARATE_BSS if SPL
1104 select SUPPORT_SPL
1105 select ZYNQMP_IPI
1106 imply BOARD_LATE_INIT
1107 imply CMD_DM
1108 imply FAT_WRITE
1109 imply MP
1110 imply DM_USB_GADGET
1111
1112config TEGRA
1113 bool "NVIDIA Tegra"
1114 imply DISTRO_DEFAULTS
1115 imply FAT_WRITE
1116
1117config TARGET_VEXPRESS64_AEMV8A
1118 bool "Support vexpress_aemv8a"
1119 select ARM64
1120 select PL01X_SERIAL
1121
1122config TARGET_VEXPRESS64_BASE_FVP
1123 bool "Support Versatile Express ARMv8a FVP BASE model"
1124 select ARM64
1125 select PL01X_SERIAL
1126 select SEMIHOSTING
1127
1128config TARGET_VEXPRESS64_JUNO
1129 bool "Support Versatile Express Juno Development Platform"
1130 select ARM64
1131 select PL01X_SERIAL
1132
1133config TARGET_LS2080A_EMU
1134 bool "Support ls2080a_emu"
1135 select ARCH_LS2080A
1136 select ARM64
1137 select ARMV8_MULTIENTRY
1138 select FSL_DDR_SYNC_REFRESH
1139 help
1140 Support for Freescale LS2080A_EMU platform.
1141 The LS2080A Development System (EMULATOR) is a pre-silicon
1142 development platform that supports the QorIQ LS2080A
1143 Layerscape Architecture processor.
1144
1145config TARGET_LS2080A_SIMU
1146 bool "Support ls2080a_simu"
1147 select ARCH_LS2080A
1148 select ARM64
1149 select ARMV8_MULTIENTRY
1150 select BOARD_LATE_INIT
1151 help
1152 Support for Freescale LS2080A_SIMU platform.
1153 The LS2080A Development System (QDS) is a pre silicon
1154 development platform that supports the QorIQ LS2080A
1155 Layerscape Architecture processor.
1156
1157config TARGET_LS1088AQDS
1158 bool "Support ls1088aqds"
1159 select ARCH_LS1088A
1160 select ARM64
1161 select ARMV8_MULTIENTRY
1162 select ARCH_SUPPORT_TFABOOT
1163 select BOARD_LATE_INIT
1164 select SUPPORT_SPL
1165 select FSL_DDR_INTERACTIVE if !SD_BOOT
1166 help
1167 Support for NXP LS1088AQDS platform.
1168 The LS1088A Development System (QDS) is a high-performance
1169 development platform that supports the QorIQ LS1088A
1170 Layerscape Architecture processor.
1171
1172config TARGET_LS2080AQDS
1173 bool "Support ls2080aqds"
1174 select ARCH_LS2080A
1175 select ARM64
1176 select ARMV8_MULTIENTRY
1177 select ARCH_SUPPORT_TFABOOT
1178 select BOARD_LATE_INIT
1179 select SUPPORT_SPL
1180 imply SCSI
1181 imply SCSI_AHCI
1182 select FSL_DDR_BIST
1183 select FSL_DDR_INTERACTIVE if !SPL
1184 help
1185 Support for Freescale LS2080AQDS platform.
1186 The LS2080A Development System (QDS) is a high-performance
1187 development platform that supports the QorIQ LS2080A
1188 Layerscape Architecture processor.
1189
1190config TARGET_LS2080ARDB
1191 bool "Support ls2080ardb"
1192 select ARCH_LS2080A
1193 select ARM64
1194 select ARMV8_MULTIENTRY
1195 select ARCH_SUPPORT_TFABOOT
1196 select BOARD_LATE_INIT
1197 select SUPPORT_SPL
1198 select FSL_DDR_BIST
1199 select FSL_DDR_INTERACTIVE if !SPL
1200 imply SCSI
1201 imply SCSI_AHCI
1202 help
1203 Support for Freescale LS2080ARDB platform.
1204 The LS2080A Reference design board (RDB) is a high-performance
1205 development platform that supports the QorIQ LS2080A
1206 Layerscape Architecture processor.
1207
1208config TARGET_LS2081ARDB
1209 bool "Support ls2081ardb"
1210 select ARCH_LS2080A
1211 select ARM64
1212 select ARMV8_MULTIENTRY
1213 select BOARD_LATE_INIT
1214 select SUPPORT_SPL
1215 help
1216 Support for Freescale LS2081ARDB platform.
1217 The LS2081A Reference design board (RDB) is a high-performance
1218 development platform that supports the QorIQ LS2081A/LS2041A
1219 Layerscape Architecture processor.
1220
1221config TARGET_LX2160ARDB
1222 bool "Support lx2160ardb"
1223 select ARCH_LX2160A
1224 select ARM64
1225 select ARMV8_MULTIENTRY
1226 select ARCH_SUPPORT_TFABOOT
1227 select BOARD_LATE_INIT
1228 help
1229 Support for NXP LX2160ARDB platform.
1230 The lx2160ardb (LX2160A Reference design board (RDB)
1231 is a high-performance development platform that supports the
1232 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1233
1234config TARGET_LX2160AQDS
1235 bool "Support lx2160aqds"
1236 select ARCH_LX2160A
1237 select ARM64
1238 select ARMV8_MULTIENTRY
1239 select ARCH_SUPPORT_TFABOOT
1240 select BOARD_LATE_INIT
1241 help
1242 Support for NXP LX2160AQDS platform.
1243 The lx2160aqds (LX2160A QorIQ Development System (QDS)
1244 is a high-performance development platform that supports the
1245 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1246
1247config TARGET_HIKEY
1248 bool "Support HiKey 96boards Consumer Edition Platform"
1249 select ARM64
1250 select DM
1251 select DM_GPIO
1252 select DM_SERIAL
1253 select OF_CONTROL
1254 select PL01X_SERIAL
1255 select SPECIFY_CONSOLE_INDEX
1256 imply CMD_DM
1257 help
1258 Support for HiKey 96boards platform. It features a HI6220
1259 SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM.
1260
1261config TARGET_HIKEY960
1262 bool "Support HiKey960 96boards Consumer Edition Platform"
1263 select ARM64
1264 select DM
1265 select DM_SERIAL
1266 select OF_CONTROL
1267 select PL01X_SERIAL
1268 imply CMD_DM
1269 help
1270 Support for HiKey960 96boards platform. It features a HI3660
1271 SoC, with 4xA73 CPU, 4xA53 CPU, MALI-G71 GPU, and 3GB RAM.
1272
1273config TARGET_POPLAR
1274 bool "Support Poplar 96boards Enterprise Edition Platform"
1275 select ARM64
1276 select DM
1277 select DM_SERIAL
1278 select DM_USB
1279 select OF_CONTROL
1280 select PL01X_SERIAL
1281 imply CMD_DM
1282 help
1283 Support for Poplar 96boards EE platform. It features a HI3798cv200
1284 SoC, with 4xA53 CPU, 1GB RAM and the high performance Mali T720 GPU
1285 making it capable of running any commercial set-top solution based on
1286 Linux or Android.
1287
1288config TARGET_LS1012AQDS
1289 bool "Support ls1012aqds"
1290 select ARCH_LS1012A
1291 select ARM64
1292 select ARCH_SUPPORT_TFABOOT
1293 select BOARD_LATE_INIT
1294 help
1295 Support for Freescale LS1012AQDS platform.
1296 The LS1012A Development System (QDS) is a high-performance
1297 development platform that supports the QorIQ LS1012A
1298 Layerscape Architecture processor.
1299
1300config TARGET_LS1012ARDB
1301 bool "Support ls1012ardb"
1302 select ARCH_LS1012A
1303 select ARM64
1304 select ARCH_SUPPORT_TFABOOT
1305 select BOARD_LATE_INIT
1306 imply SCSI
1307 imply SCSI_AHCI
1308 help
1309 Support for Freescale LS1012ARDB platform.
1310 The LS1012A Reference design board (RDB) is a high-performance
1311 development platform that supports the QorIQ LS1012A
1312 Layerscape Architecture processor.
1313
1314config TARGET_LS1012A2G5RDB
1315 bool "Support ls1012a2g5rdb"
1316 select ARCH_LS1012A
1317 select ARM64
1318 select ARCH_SUPPORT_TFABOOT
1319 select BOARD_LATE_INIT
1320 imply SCSI
1321 help
1322 Support for Freescale LS1012A2G5RDB platform.
1323 The LS1012A 2G5 Reference design board (RDB) is a high-performance
1324 development platform that supports the QorIQ LS1012A
1325 Layerscape Architecture processor.
1326
1327config TARGET_LS1012AFRWY
1328 bool "Support ls1012afrwy"
1329 select ARCH_LS1012A
1330 select ARM64
1331 select ARCH_SUPPORT_TFABOOT
1332 select BOARD_LATE_INIT
1333 imply SCSI
1334 imply SCSI_AHCI
1335 help
1336 Support for Freescale LS1012AFRWY platform.
1337 The LS1012A FRWY board (FRWY) is a high-performance
1338 development platform that supports the QorIQ LS1012A
1339 Layerscape Architecture processor.
1340
1341config TARGET_LS1012AFRDM
1342 bool "Support ls1012afrdm"
1343 select ARCH_LS1012A
1344 select ARM64
1345 select ARCH_SUPPORT_TFABOOT
1346 help
1347 Support for Freescale LS1012AFRDM platform.
1348 The LS1012A Freedom board (FRDM) is a high-performance
1349 development platform that supports the QorIQ LS1012A
1350 Layerscape Architecture processor.
1351
1352config TARGET_LS1028AQDS
1353 bool "Support ls1028aqds"
1354 select ARCH_LS1028A
1355 select ARM64
1356 select ARMV8_MULTIENTRY
1357 select ARCH_SUPPORT_TFABOOT
1358 select BOARD_LATE_INIT
1359 help
1360 Support for Freescale LS1028AQDS platform
1361 The LS1028A Development System (QDS) is a high-performance
1362 development platform that supports the QorIQ LS1028A
1363 Layerscape Architecture processor.
1364
1365config TARGET_LS1028ARDB
1366 bool "Support ls1028ardb"
1367 select ARCH_LS1028A
1368 select ARM64
1369 select ARMV8_MULTIENTRY
1370 select ARCH_SUPPORT_TFABOOT
1371 select BOARD_LATE_INIT
1372 help
1373 Support for Freescale LS1028ARDB platform
1374 The LS1028A Development System (RDB) is a high-performance
1375 development platform that supports the QorIQ LS1028A
1376 Layerscape Architecture processor.
1377
1378config TARGET_LS1088ARDB
1379 bool "Support ls1088ardb"
1380 select ARCH_LS1088A
1381 select ARM64
1382 select ARMV8_MULTIENTRY
1383 select ARCH_SUPPORT_TFABOOT
1384 select BOARD_LATE_INIT
1385 select SUPPORT_SPL
1386 select FSL_DDR_INTERACTIVE if !SD_BOOT
1387 help
1388 Support for NXP LS1088ARDB platform.
1389 The LS1088A Reference design board (RDB) is a high-performance
1390 development platform that supports the QorIQ LS1088A
1391 Layerscape Architecture processor.
1392
1393config TARGET_LS1021AQDS
1394 bool "Support ls1021aqds"
1395 select ARCH_LS1021A
1396 select ARCH_SUPPORT_PSCI
1397 select BOARD_EARLY_INIT_F
1398 select BOARD_LATE_INIT
1399 select CPU_V7A
1400 select CPU_V7_HAS_NONSEC
1401 select CPU_V7_HAS_VIRT
1402 select LS1_DEEP_SLEEP
1403 select SUPPORT_SPL
1404 select SYS_FSL_DDR
1405 select FSL_DDR_INTERACTIVE
1406 imply SCSI
1407
1408config TARGET_LS1021ATWR
1409 bool "Support ls1021atwr"
1410 select ARCH_LS1021A
1411 select ARCH_SUPPORT_PSCI
1412 select BOARD_EARLY_INIT_F
1413 select BOARD_LATE_INIT
1414 select CPU_V7A
1415 select CPU_V7_HAS_NONSEC
1416 select CPU_V7_HAS_VIRT
1417 select LS1_DEEP_SLEEP
1418 select SUPPORT_SPL
1419 imply SCSI
1420
1421config TARGET_LS1021ATSN
1422 bool "Support ls1021atsn"
1423 select ARCH_LS1021A
1424 select ARCH_SUPPORT_PSCI
1425 select BOARD_EARLY_INIT_F
1426 select BOARD_LATE_INIT
1427 select CPU_V7A
1428 select CPU_V7_HAS_NONSEC
1429 select CPU_V7_HAS_VIRT
1430 select LS1_DEEP_SLEEP
1431 select SUPPORT_SPL
1432 imply SCSI
1433
1434config TARGET_LS1021AIOT
1435 bool "Support ls1021aiot"
1436 select ARCH_LS1021A
1437 select ARCH_SUPPORT_PSCI
1438 select BOARD_LATE_INIT
1439 select CPU_V7A
1440 select CPU_V7_HAS_NONSEC
1441 select CPU_V7_HAS_VIRT
1442 select SUPPORT_SPL
1443 imply SCSI
1444 help
1445 Support for Freescale LS1021AIOT platform.
1446 The LS1021A Freescale board (IOT) is a high-performance
1447 development platform that supports the QorIQ LS1021A
1448 Layerscape Architecture processor.
1449
1450config TARGET_LS1043AQDS
1451 bool "Support ls1043aqds"
1452 select ARCH_LS1043A
1453 select ARM64
1454 select ARMV8_MULTIENTRY
1455 select ARCH_SUPPORT_TFABOOT
1456 select BOARD_EARLY_INIT_F
1457 select BOARD_LATE_INIT
1458 select SUPPORT_SPL
1459 select FSL_DDR_INTERACTIVE if !SPL
1460 imply SCSI
1461 imply SCSI_AHCI
1462 help
1463 Support for Freescale LS1043AQDS platform.
1464
1465config TARGET_LS1043ARDB
1466 bool "Support ls1043ardb"
1467 select ARCH_LS1043A
1468 select ARM64
1469 select ARMV8_MULTIENTRY
1470 select ARCH_SUPPORT_TFABOOT
1471 select BOARD_EARLY_INIT_F
1472 select BOARD_LATE_INIT
1473 select SUPPORT_SPL
1474 help
1475 Support for Freescale LS1043ARDB platform.
1476
1477config TARGET_LS1046AQDS
1478 bool "Support ls1046aqds"
1479 select ARCH_LS1046A
1480 select ARM64
1481 select ARMV8_MULTIENTRY
1482 select ARCH_SUPPORT_TFABOOT
1483 select BOARD_EARLY_INIT_F
1484 select BOARD_LATE_INIT
1485 select DM_SPI_FLASH if DM_SPI
1486 select SUPPORT_SPL
1487 select FSL_DDR_BIST if !SPL
1488 select FSL_DDR_INTERACTIVE if !SPL
1489 select FSL_DDR_INTERACTIVE if !SPL
1490 imply SCSI
1491 help
1492 Support for Freescale LS1046AQDS platform.
1493 The LS1046A Development System (QDS) is a high-performance
1494 development platform that supports the QorIQ LS1046A
1495 Layerscape Architecture processor.
1496
1497config TARGET_LS1046ARDB
1498 bool "Support ls1046ardb"
1499 select ARCH_LS1046A
1500 select ARM64
1501 select ARMV8_MULTIENTRY
1502 select ARCH_SUPPORT_TFABOOT
1503 select BOARD_EARLY_INIT_F
1504 select BOARD_LATE_INIT
1505 select DM_SPI_FLASH if DM_SPI
1506 select POWER_MC34VR500
1507 select SUPPORT_SPL
1508 select FSL_DDR_BIST
1509 select FSL_DDR_INTERACTIVE if !SPL
1510 imply SCSI
1511 help
1512 Support for Freescale LS1046ARDB platform.
1513 The LS1046A Reference Design Board (RDB) is a high-performance
1514 development platform that supports the QorIQ LS1046A
1515 Layerscape Architecture processor.
1516
1517config TARGET_LS1046AFRWY
1518 bool "Support ls1046afrwy"
1519 select ARCH_LS1046A
1520 select ARM64
1521 select ARMV8_MULTIENTRY
1522 select ARCH_SUPPORT_TFABOOT
1523 select BOARD_EARLY_INIT_F
1524 select BOARD_LATE_INIT
1525 select DM_SPI_FLASH if DM_SPI
1526 imply SCSI
1527 help
1528 Support for Freescale LS1046AFRWY platform.
1529 The LS1046A Freeway Board (FRWY) is a high-performance
1530 development platform that supports the QorIQ LS1046A
1531 Layerscape Architecture processor.
1532
1533config TARGET_COLIBRI_PXA270
1534 bool "Support colibri_pxa270"
1535 select CPU_PXA
1536
1537config ARCH_UNIPHIER
1538 bool "Socionext UniPhier SoCs"
1539 select BOARD_LATE_INIT
1540 select DM
1541 select DM_GPIO
1542 select DM_I2C
1543 select DM_MMC
1544 select DM_MTD
1545 select DM_RESET
1546 select DM_SERIAL
1547 select DM_USB
1548 select OF_BOARD_SETUP
1549 select OF_CONTROL
1550 select OF_LIBFDT
1551 select PINCTRL
1552 select SPL_BOARD_INIT if SPL
1553 select SPL_DM if SPL
1554 select SPL_LIBCOMMON_SUPPORT if SPL
1555 select SPL_LIBGENERIC_SUPPORT if SPL
1556 select SPL_OF_CONTROL if SPL
1557 select SPL_PINCTRL if SPL
1558 select SUPPORT_SPL
1559 imply CMD_DM
1560 imply DISTRO_DEFAULTS
1561 imply FAT_WRITE
1562 help
1563 Support for UniPhier SoC family developed by Socionext Inc.
1564 (formerly, System LSI Business Division of Panasonic Corporation)
1565
1566config STM32
1567 bool "Support STMicroelectronics STM32 MCU with cortex M"
1568 select CPU_V7M
1569 select DM
1570 select DM_SERIAL
1571 imply CMD_DM
1572
1573config ARCH_STI
1574 bool "Support STMicrolectronics SoCs"
1575 select BLK
1576 select CPU_V7A
1577 select DM
1578 select DM_MMC
1579 select DM_RESET
1580 select DM_SERIAL
1581 imply CMD_DM
1582 help
1583 Support for STMicroelectronics STiH407/10 SoC family.
1584 This SoC is used on Linaro 96Board STiH410-B2260
1585
1586config ARCH_STM32MP
1587 bool "Support STMicroelectronics STM32MP Socs with cortex A"
1588 select ARCH_MISC_INIT
1589 select BOARD_LATE_INIT
1590 select CLK
1591 select DM
1592 select DM_GPIO
1593 select DM_RESET
1594 select DM_SERIAL
1595 select MISC
1596 select OF_CONTROL
1597 select OF_LIBFDT
1598 select OF_SYSTEM_SETUP
1599 select PINCTRL
1600 select REGMAP
1601 select SUPPORT_SPL
1602 select SYSCON
1603 select SYSRESET
1604 select SYS_THUMB_BUILD
1605 imply SPL_SYSRESET
1606 imply CMD_DM
1607 imply CMD_POWEROFF
1608 imply OF_LIBFDT_OVERLAY
1609 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1610 imply USE_PREBOOT
1611 help
1612 Support for STM32MP SoC family developed by STMicroelectronics,
1613 MPUs based on ARM cortex A core
1614 U-BOOT is running in DDR, loaded by the First Stage BootLoader (FSBL).
1615 FSBL can be TF-A: Trusted Firmware for Cortex A, for trusted boot
1616 chain.
1617 SPL is the unsecure FSBL for the basic boot chain.
1618
1619config ARCH_ROCKCHIP
1620 bool "Support Rockchip SoCs"
1621 select BLK
1622 select BINMAN if !ARM64
1623 select DM
1624 select DM_GPIO
1625 select DM_I2C
1626 select DM_MMC
1627 select DM_PWM
1628 select DM_REGULATOR
1629 select DM_SERIAL
1630 select DM_SPI
1631 select DM_SPI_FLASH
1632 select DM_USB if USB
1633 select ENABLE_ARM_SOC_BOOT0_HOOK
1634 select OF_CONTROL
1635 select SPI
1636 select SPL_DM if SPL
1637 select SYS_MALLOC_F
1638 select SYS_THUMB_BUILD if !ARM64
1639 imply ADC
1640 imply CMD_DM
1641 imply DEBUG_UART_BOARD_INIT
1642 imply DISTRO_DEFAULTS
1643 imply FAT_WRITE
1644 imply SARADC_ROCKCHIP
1645 imply SPL_SYSRESET
1646 imply SPL_SYS_MALLOC_SIMPLE
1647 imply SYS_NS16550
1648 imply TPL_SYSRESET
1649 imply USB_FUNCTION_FASTBOOT
1650
1651config TARGET_THUNDERX_88XX
1652 bool "Support ThunderX 88xx"
1653 select ARM64
1654 select OF_CONTROL
1655 select PL01X_SERIAL
1656 select SYS_CACHE_SHIFT_7
1657
1658config ARCH_ASPEED
1659 bool "Support Aspeed SoCs"
1660 select DM
1661 select OF_CONTROL
1662 imply CMD_DM
1663
1664config TARGET_DURIAN
1665 bool "Support Phytium Durian Platform"
1666 select ARM64
1667 help
1668 Support for durian platform.
1669 It has 2GB Sdram, uart and pcie.
1670
1671config TARGET_PRESIDIO_ASIC
1672 bool "Support Cortina Presidio ASIC Platform"
1673 select ARM64
1674
1675endchoice
1676
1677config ARCH_SUPPORT_TFABOOT
1678 bool
1679
1680config TFABOOT
1681 bool "Support for booting from TF-A"
1682 depends on ARCH_SUPPORT_TFABOOT
1683 default n
1684 help
1685 Enabling this will make a U-Boot binary that is capable of being
1686 booted via TF-A (Trusted Firmware for Cortex-A).
1687
1688config TI_SECURE_DEVICE
1689 bool "HS Device Type Support"
1690 depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_K3
1691 help
1692 If a high secure (HS) device type is being used, this config
1693 must be set. This option impacts various aspects of the
1694 build system (to create signed boot images that can be
1695 authenticated) and the code. See the doc/README.ti-secure
1696 file for further details.
1697
1698if AM43XX || AM33XX || OMAP54XX || ARCH_KEYSTONE
1699config ISW_ENTRY_ADDR
1700 hex "Address in memory or XIP address of bootloader entry point"
1701 default 0x402F4000 if AM43XX
1702 default 0x402F0400 if AM33XX
1703 default 0x40301350 if OMAP54XX
1704 help
1705 After any reset, the boot ROM searches the boot media for a valid
1706 boot image. For non-XIP devices, the ROM then copies the image into
1707 internal memory. For all boot modes, after the ROM processes the
1708 boot image it eventually computes the entry point address depending
1709 on the device type (secure/non-secure), boot media (xip/non-xip) and
1710 image headers.
1711endif
1712
1713source "arch/arm/mach-aspeed/Kconfig"
1714
1715source "arch/arm/mach-at91/Kconfig"
1716
1717source "arch/arm/mach-bcm283x/Kconfig"
1718
1719source "arch/arm/mach-bcmstb/Kconfig"
1720
1721source "arch/arm/mach-davinci/Kconfig"
1722
1723source "arch/arm/mach-exynos/Kconfig"
1724
1725source "arch/arm/mach-highbank/Kconfig"
1726
1727source "arch/arm/mach-integrator/Kconfig"
1728
1729source "arch/arm/mach-k3/Kconfig"
1730
1731source "arch/arm/mach-keystone/Kconfig"
1732
1733source "arch/arm/mach-kirkwood/Kconfig"
1734
1735source "arch/arm/cpu/arm926ejs/lpc32xx/Kconfig"
1736
1737source "arch/arm/mach-mvebu/Kconfig"
1738
1739source "arch/arm/cpu/armv7/ls102xa/Kconfig"
1740
1741source "arch/arm/mach-imx/mx2/Kconfig"
1742
1743source "arch/arm/mach-imx/mx3/Kconfig"
1744
1745source "arch/arm/mach-imx/mx5/Kconfig"
1746
1747source "arch/arm/mach-imx/mx6/Kconfig"
1748
1749source "arch/arm/mach-imx/mx7/Kconfig"
1750
1751source "arch/arm/mach-imx/mx7ulp/Kconfig"
1752
1753source "arch/arm/mach-imx/imx8/Kconfig"
1754
1755source "arch/arm/mach-imx/imx8m/Kconfig"
1756
1757source "arch/arm/mach-imx/imxrt/Kconfig"
1758
1759source "arch/arm/mach-imx/mxs/Kconfig"
1760
1761source "arch/arm/mach-omap2/Kconfig"
1762
1763source "arch/arm/cpu/armv8/fsl-layerscape/Kconfig"
1764
1765source "arch/arm/mach-orion5x/Kconfig"
1766
1767source "arch/arm/mach-owl/Kconfig"
1768
1769source "arch/arm/mach-rmobile/Kconfig"
1770
1771source "arch/arm/mach-meson/Kconfig"
1772
1773source "arch/arm/mach-mediatek/Kconfig"
1774
1775source "arch/arm/mach-qemu/Kconfig"
1776
1777source "arch/arm/mach-rockchip/Kconfig"
1778
1779source "arch/arm/mach-s5pc1xx/Kconfig"
1780
1781source "arch/arm/mach-snapdragon/Kconfig"
1782
1783source "arch/arm/mach-socfpga/Kconfig"
1784
1785source "arch/arm/mach-sti/Kconfig"
1786
1787source "arch/arm/mach-stm32/Kconfig"
1788
1789source "arch/arm/mach-stm32mp/Kconfig"
1790
1791source "arch/arm/mach-sunxi/Kconfig"
1792
1793source "arch/arm/mach-tegra/Kconfig"
1794
1795source "arch/arm/mach-u8500/Kconfig"
1796
1797source "arch/arm/mach-uniphier/Kconfig"
1798
1799source "arch/arm/cpu/armv7/vf610/Kconfig"
1800
1801source "arch/arm/mach-zynq/Kconfig"
1802
1803source "arch/arm/mach-zynqmp/Kconfig"
1804
1805source "arch/arm/mach-versal/Kconfig"
1806
1807source "arch/arm/mach-zynqmp-r5/Kconfig"
1808
1809source "arch/arm/cpu/armv7/Kconfig"
1810
1811source "arch/arm/cpu/armv8/Kconfig"
1812
1813source "arch/arm/mach-imx/Kconfig"
1814
1815source "board/bosch/shc/Kconfig"
1816source "board/bosch/guardian/Kconfig"
1817source "board/CarMediaLab/flea3/Kconfig"
1818source "board/Marvell/aspenite/Kconfig"
1819source "board/Marvell/gplugd/Kconfig"
1820source "board/armadeus/apf27/Kconfig"
1821source "board/armltd/vexpress/Kconfig"
1822source "board/armltd/vexpress64/Kconfig"
1823source "board/cortina/presidio-asic/Kconfig"
1824source "board/broadcom/bcm23550_w1d/Kconfig"
1825source "board/broadcom/bcm28155_ap/Kconfig"
1826source "board/broadcom/bcm963158/Kconfig"
1827source "board/broadcom/bcm968360bg/Kconfig"
1828source "board/broadcom/bcm968580xref/Kconfig"
1829source "board/broadcom/bcmcygnus/Kconfig"
1830source "board/broadcom/bcmnsp/Kconfig"
1831source "board/broadcom/bcmns2/Kconfig"
1832source "board/cavium/thunderx/Kconfig"
1833source "board/cirrus/edb93xx/Kconfig"
1834source "board/eets/pdu001/Kconfig"
1835source "board/emulation/qemu-arm/Kconfig"
1836source "board/freescale/ls2080a/Kconfig"
1837source "board/freescale/ls2080aqds/Kconfig"
1838source "board/freescale/ls2080ardb/Kconfig"
1839source "board/freescale/ls1088a/Kconfig"
1840source "board/freescale/ls1028a/Kconfig"
1841source "board/freescale/ls1021aqds/Kconfig"
1842source "board/freescale/ls1043aqds/Kconfig"
1843source "board/freescale/ls1021atwr/Kconfig"
1844source "board/freescale/ls1021atsn/Kconfig"
1845source "board/freescale/ls1021aiot/Kconfig"
1846source "board/freescale/ls1046aqds/Kconfig"
1847source "board/freescale/ls1043ardb/Kconfig"
1848source "board/freescale/ls1046ardb/Kconfig"
1849source "board/freescale/ls1046afrwy/Kconfig"
1850source "board/freescale/ls1012aqds/Kconfig"
1851source "board/freescale/ls1012ardb/Kconfig"
1852source "board/freescale/ls1012afrdm/Kconfig"
1853source "board/freescale/lx2160a/Kconfig"
1854source "board/freescale/mx35pdk/Kconfig"
1855source "board/freescale/s32v234evb/Kconfig"
1856source "board/grinn/chiliboard/Kconfig"
1857source "board/gumstix/pepper/Kconfig"
1858source "board/hisilicon/hikey/Kconfig"
1859source "board/hisilicon/hikey960/Kconfig"
1860source "board/hisilicon/poplar/Kconfig"
1861source "board/isee/igep003x/Kconfig"
1862source "board/phytec/pcm051/Kconfig"
1863source "board/silica/pengwyn/Kconfig"
1864source "board/spear/spear300/Kconfig"
1865source "board/spear/spear310/Kconfig"
1866source "board/spear/spear320/Kconfig"
1867source "board/spear/spear600/Kconfig"
1868source "board/spear/x600/Kconfig"
1869source "board/st/stv0991/Kconfig"
1870source "board/tcl/sl50/Kconfig"
1871source "board/ucRobotics/bubblegum_96/Kconfig"
1872source "board/birdland/bav335x/Kconfig"
1873source "board/toradex/colibri_pxa270/Kconfig"
1874source "board/variscite/dart_6ul/Kconfig"
1875source "board/vscom/baltos/Kconfig"
1876source "board/xilinx/Kconfig"
1877source "board/xilinx/zynq/Kconfig"
1878source "board/xilinx/zynqmp/Kconfig"
1879source "board/phytium/durian/Kconfig"
1880
1881source "arch/arm/Kconfig.debug"
1882
1883endmenu
1884
1885config SPL_LDSCRIPT
1886 default "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" if (ARCH_MX23 || ARCH_MX28) && !SPL_FRAMEWORK
1887 default "arch/arm/cpu/arm1136/u-boot-spl.lds" if CPU_ARM1136
1888 default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARM64
1889
1890
1891
