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5
6#ifndef __MXC_HDMI_H__
7#define __MXC_HDMI_H__
8
9#ifdef CONFIG_IMX_HDMI
10void imx_enable_hdmi_phy(void);
11void imx_setup_hdmi(void);
12#endif
13
14
15
16
17struct hdmi_regs {
18
19 u8 design_id;
20 u8 revision_id;
21 u8 product_id0;
22 u8 product_id1;
23 u8 config0_id;
24 u8 config1_id;
25 u8 config2_id;
26 u8 config3_id;
27 u8 reserved1[0xf8];
28
29 u8 ih_fc_stat0;
30 u8 ih_fc_stat1;
31 u8 ih_fc_stat2;
32 u8 ih_as_stat0;
33 u8 ih_phy_stat0;
34 u8 ih_i2cm_stat0;
35 u8 ih_cec_stat0;
36 u8 ih_vp_stat0;
37 u8 ih_i2cmphy_stat0;
38 u8 ih_ahbdmaaud_stat0;
39 u8 reserved2[0x76];
40 u8 ih_mute_fc_stat0;
41 u8 ih_mute_fc_stat1;
42 u8 ih_mute_fc_stat2;
43 u8 ih_mute_as_stat0;
44 u8 ih_mute_phy_stat0;
45 u8 ih_mute_i2cm_stat0;
46 u8 ih_mute_cec_stat0;
47 u8 ih_mute_vp_stat0;
48 u8 ih_mute_i2cmphy_stat0;
49 u8 ih_mute_ahbdmaaud_stat0;
50 u8 reserved3[0x75];
51 u8 ih_mute;
52
53 u8 tx_invid0;
54 u8 tx_instuffing;
55 u8 tx_gydata0;
56 u8 tx_gydata1;
57 u8 tx_rcrdata0;
58 u8 tx_rcrdata1;
59 u8 tx_bcbdata0;
60 u8 tx_bcbdata1;
61 u8 reserved4[0x5f8];
62
63 u8 vp_status;
64 u8 vp_pr_cd;
65 u8 vp_stuff;
66 u8 vp_remap;
67 u8 vp_conf;
68 u8 vp_stat;
69 u8 vp_int;
70 u8 vp_mask;
71 u8 vp_pol;
72 u8 reserved5[0x7f7];
73
74 u8 fc_invidconf;
75 u8 fc_inhactv0;
76 u8 fc_inhactv1;
77 u8 fc_inhblank0;
78 u8 fc_inhblank1;
79 u8 fc_invactv0;
80 u8 fc_invactv1;
81 u8 fc_invblank;
82 u8 fc_hsyncindelay0;
83 u8 fc_hsyncindelay1;
84 u8 fc_hsyncinwidth0;
85 u8 fc_hsyncinwidth1;
86 u8 fc_vsyncindelay;
87 u8 fc_vsyncinwidth;
88 u8 fc_infreq0;
89 u8 fc_infreq1;
90 u8 fc_infreq2;
91 u8 fc_ctrldur;
92 u8 fc_exctrldur;
93 u8 fc_exctrlspac;
94 u8 fc_ch0pream;
95 u8 fc_ch1pream;
96 u8 fc_ch2pream;
97 u8 fc_aviconf3;
98 u8 fc_gcp;
99 u8 fc_aviconf0;
100 u8 fc_aviconf1;
101 u8 fc_aviconf2;
102 u8 fc_avivid;
103 u8 fc_avietb0;
104 u8 fc_avietb1;
105 u8 fc_avisbb0;
106 u8 fc_avisbb1;
107 u8 fc_avielb0;
108 u8 fc_avielb1;
109 u8 fc_avisrb0;
110 u8 fc_avisrb1;
111 u8 fc_audiconf0;
112 u8 fc_audiconf1;
113 u8 fc_audiconf2;
114 u8 fc_audiconf3;
115 u8 fc_vsdieeeid0;
116 u8 fc_vsdsize;
117 u8 reserved6[5];
118 u8 fc_vsdieeeid1;
119 u8 fc_vsdieeeid2;
120 u8 fc_vsdpayload0;
121 u8 fc_vsdpayload1;
122 u8 fc_vsdpayload2;
123 u8 fc_vsdpayload3;
124 u8 fc_vsdpayload4;
125 u8 fc_vsdpayload5;
126 u8 fc_vsdpayload6;
127 u8 fc_vsdpayload7;
128 u8 fc_vsdpayload8;
129 u8 fc_vsdpayload9;
130 u8 fc_vsdpayload10;
131 u8 fc_vsdpayload11;
132 u8 fc_vsdpayload12;
133 u8 fc_vsdpayload13;
134 u8 fc_vsdpayload14;
135 u8 fc_vsdpayload15;
136 u8 fc_vsdpayload16;
137 u8 fc_vsdpayload17;
138 u8 fc_vsdpayload18;
139 u8 fc_vsdpayload19;
140 u8 fc_vsdpayload20;
141 u8 fc_vsdpayload21;
142 u8 fc_vsdpayload22;
143 u8 fc_vsdpayload23;
144 u8 fc_spdvendorname0;
145 u8 fc_spdvendorname1;
146 u8 fc_spdvendorname2;
147 u8 fc_spdvendorname3;
148 u8 fc_spdvendorname4;
149 u8 fc_spdvendorname5;
150 u8 fc_spdvendorname6;
151 u8 fc_spdvendorname7;
152 u8 fc_sdpproductname0;
153 u8 fc_sdpproductname1;
154 u8 fc_sdpproductname2;
155 u8 fc_sdpproductname3;
156 u8 fc_sdpproductname4;
157 u8 fc_sdpproductname5;
158 u8 fc_sdpproductname6;
159 u8 fc_sdpproductname7;
160 u8 fc_sdpproductname8;
161 u8 fc_sdpproductname9;
162 u8 fc_sdpproductname10;
163 u8 fc_sdpproductname11;
164 u8 fc_sdpproductname12;
165 u8 fc_sdpproductname13;
166 u8 fc_sdpproductname14;
167 u8 fc_spdproductname15;
168 u8 fc_spddeviceinf;
169 u8 fc_audsconf;
170 u8 fc_audsstat;
171 u8 reserved7[0xb];
172 u8 fc_datach0fill;
173 u8 fc_datach1fill;
174 u8 fc_datach2fill;
175 u8 fc_ctrlqhigh;
176 u8 fc_ctrlqlow;
177 u8 fc_acp0;
178 u8 fc_acp28;
179 u8 fc_acp27;
180 u8 fc_acp26;
181 u8 fc_acp25;
182 u8 fc_acp24;
183 u8 fc_acp23;
184 u8 fc_acp22;
185 u8 fc_acp21;
186 u8 fc_acp20;
187 u8 fc_acp19;
188 u8 fc_acp18;
189 u8 fc_acp17;
190 u8 fc_acp16;
191 u8 fc_acp15;
192 u8 fc_acp14;
193 u8 fc_acp13;
194 u8 fc_acp12;
195 u8 fc_acp11;
196 u8 fc_acp10;
197 u8 fc_acp9;
198 u8 fc_acp8;
199 u8 fc_acp7;
200 u8 fc_acp6;
201 u8 fc_acp5;
202 u8 fc_acp4;
203 u8 fc_acp3;
204 u8 fc_acp2;
205 u8 fc_acp1;
206 u8 fc_iscr1_0;
207 u8 fc_iscr1_16;
208 u8 fc_iscr1_15;
209 u8 fc_iscr1_14;
210 u8 fc_iscr1_13;
211 u8 fc_iscr1_12;
212 u8 fc_iscr1_11;
213 u8 fc_iscr1_10;
214 u8 fc_iscr1_9;
215 u8 fc_iscr1_8;
216 u8 fc_iscr1_7;
217 u8 fc_iscr1_6;
218 u8 fc_iscr1_5;
219 u8 fc_iscr1_4;
220 u8 fc_iscr1_3;
221 u8 fc_iscr1_2;
222 u8 fc_iscr1_1;
223 u8 fc_iscr2_15;
224 u8 fc_iscr2_14;
225 u8 fc_iscr2_13;
226 u8 fc_iscr2_12;
227 u8 fc_iscr2_11;
228 u8 fc_iscr2_10;
229 u8 fc_iscr2_9;
230 u8 fc_iscr2_8;
231 u8 fc_iscr2_7;
232 u8 fc_iscr2_6;
233 u8 fc_iscr2_5;
234 u8 fc_iscr2_4;
235 u8 fc_iscr2_3;
236 u8 fc_iscr2_2;
237 u8 fc_iscr2_1;
238 u8 fc_iscr2_0;
239 u8 fc_datauto0;
240 u8 fc_datauto1;
241 u8 fc_datauto2;
242 u8 fc_datman;
243 u8 fc_datauto3;
244 u8 fc_rdrb0;
245 u8 fc_rdrb1;
246 u8 fc_rdrb2;
247 u8 fc_rdrb3;
248 u8 fc_rdrb4;
249 u8 fc_rdrb5;
250 u8 fc_rdrb6;
251 u8 fc_rdrb7;
252 u8 reserved8[0x10];
253 u8 fc_stat0;
254 u8 fc_int0;
255 u8 fc_mask0;
256 u8 fc_pol0;
257 u8 fc_stat1;
258 u8 fc_int1;
259 u8 fc_mask1;
260 u8 fc_pol1;
261 u8 fc_stat2;
262 u8 fc_int2;
263 u8 fc_mask2;
264 u8 fc_pol2;
265 u8 reserved9[0x4];
266 u8 fc_prconf;
267 u8 reserved10[0x1f];
268 u8 fc_gmd_stat;
269 u8 fc_gmd_en;
270 u8 fc_gmd_up;
271 u8 fc_gmd_conf;
272 u8 fc_gmd_hb;
273 u8 fc_gmd_pb0;
274 u8 fc_gmd_pb1;
275 u8 fc_gmd_pb2;
276 u8 fc_gmd_pb3;
277 u8 fc_gmd_pb4;
278 u8 fc_gmd_pb5;
279 u8 fc_gmd_pb6;
280 u8 fc_gmd_pb7;
281 u8 fc_gmd_pb8;
282 u8 fc_gmd_pb9;
283 u8 fc_gmd_pb10;
284 u8 fc_gmd_pb11;
285 u8 fc_gmd_pb12;
286 u8 fc_gmd_pb13;
287 u8 fc_gmd_pb14;
288 u8 fc_gmd_pb15;
289 u8 fc_gmd_pb16;
290 u8 fc_gmd_pb17;
291 u8 fc_gmd_pb18;
292 u8 fc_gmd_pb19;
293 u8 fc_gmd_pb20;
294 u8 fc_gmd_pb21;
295 u8 fc_gmd_pb22;
296 u8 fc_gmd_pb23;
297 u8 fc_gmd_pb24;
298 u8 fc_gmd_pb25;
299 u8 fc_gmd_pb26;
300 u8 fc_gmd_pb27;
301 u8 reserved11[0xdf];
302 u8 fc_dbgforce;
303 u8 fc_dbgaud0ch0;
304 u8 fc_dbgaud1ch0;
305 u8 fc_dbgaud2ch0;
306 u8 fc_dbgaud0ch1;
307 u8 fc_dbgaud1ch1;
308 u8 fc_dbgaud2ch1;
309 u8 fc_dbgaud0ch2;
310 u8 fc_dbgaud1ch2;
311 u8 fc_dbgaud2ch2;
312 u8 fc_dbgaud0ch3;
313 u8 fc_dbgaud1ch3;
314 u8 fc_dbgaud2ch3;
315 u8 fc_dbgaud0ch4;
316 u8 fc_dbgaud1ch4;
317 u8 fc_dbgaud2ch4;
318 u8 fc_dbgaud0ch5;
319 u8 fc_dbgaud1ch5;
320 u8 fc_dbgaud2ch5;
321 u8 fc_dbgaud0ch6;
322 u8 fc_dbgaud1ch6;
323 u8 fc_dbgaud2ch6;
324 u8 fc_dbgaud0ch7;
325 u8 fc_dbgaud1ch7;
326 u8 fc_dbgaud2ch7;
327 u8 fc_dbgtmds0;
328 u8 fc_dbgtmds1;
329 u8 fc_dbgtmds2;
330 u8 reserved12[0x1de4];
331
332 u8 phy_conf0;
333 u8 phy_tst0;
334 u8 phy_tst1;
335 u8 phy_tst2;
336 u8 phy_stat0;
337 u8 phy_int0;
338 u8 phy_mask0;
339 u8 phy_pol0;
340 u8 reserved13[0x18];
341
342 u8 phy_i2cm_slave_addr;
343 u8 phy_i2cm_address_addr;
344 u8 phy_i2cm_datao_1_addr;
345 u8 phy_i2cm_datao_0_addr;
346 u8 phy_i2cm_datai_1_addr;
347 u8 phy_i2cm_datai_0_addr;
348 u8 phy_i2cm_operation_addr;
349 u8 phy_i2cm_int_addr;
350 u8 phy_i2cm_ctlint_addr;
351 u8 phy_i2cm_div_addr;
352 u8 phy_i2cm_softrstz_addr;
353 u8 phy_i2cm_ss_scl_hcnt_1_addr;
354 u8 phy_i2cm_ss_scl_hcnt_0_addr;
355 u8 phy_i2cm_ss_scl_lcnt_1_addr;
356 u8 phy_i2cm_ss_scl_lcnt_0_addr;
357 u8 phy_i2cm_fs_scl_hcnt_1_addr;
358 u8 phy_i2cm_fs_scl_hcnt_0_addr;
359 u8 phy_i2cm_fs_scl_lcnt_1_addr;
360 u8 phy_i2cm_fs_scl_lcnt_0_addr;
361 u8 reserved14[0xcd];
362
363 u8 aud_conf0;
364 u8 aud_conf1;
365 u8 aud_int;
366 u8 aud_conf2;
367 u8 reserved15[0xfc];
368 u8 aud_n1;
369 u8 aud_n2;
370 u8 aud_n3;
371 u8 aud_cts1;
372 u8 aud_cts2;
373 u8 aud_cts3;
374 u8 aud_inputclkfs;
375 u8 reserved16[0xfb];
376 u8 aud_spdifint;
377 u8 reserved17[0xfd];
378 u8 aud_conf0_hbr;
379 u8 aud_hbr_status;
380 u8 aud_hbr_int;
381 u8 aud_hbr_pol;
382 u8 aud_hbr_mask;
383 u8 reserved18[0xfb];
384
385
386
387
388 u8 gp_conf0;
389 u8 gp_conf1;
390 u8 gp_conf2;
391 u8 gp_stat;
392 u8 gp_int;
393 u8 gp_mask;
394 u8 gp_pol;
395 u8 reserved19[0xf9];
396
397 u8 ahb_dma_conf0;
398 u8 ahb_dma_start;
399 u8 ahb_dma_stop;
400 u8 ahb_dma_thrsld;
401 u8 ahb_dma_straddr0;
402 u8 ahb_dma_straddr1;
403 u8 ahb_dma_straddr2;
404 u8 ahb_dma_straddr3;
405 u8 ahb_dma_stpaddr0;
406 u8 ahb_dma_stpaddr1;
407 u8 ahb_dma_stpaddr2;
408 u8 ahb_dma_stpaddr3;
409 u8 ahb_dma_bstaddr0;
410 u8 ahb_dma_bstaddr1;
411 u8 ahb_dma_bstaddr2;
412 u8 ahb_dma_bstaddr3;
413 u8 ahb_dma_mblength0;
414 u8 ahb_dma_mblength1;
415 u8 ahb_dma_stat;
416 u8 ahb_dma_int;
417 u8 ahb_dma_mask;
418 u8 ahb_dma_pol;
419 u8 ahb_dma_conf1;
420 u8 ahb_dma_buffstat;
421 u8 ahb_dma_buffint;
422 u8 ahb_dma_buffmask;
423 u8 ahb_dma_buffpol;
424 u8 reserved20[0x9e5];
425
426 u8 mc_sfrdiv;
427 u8 mc_clkdis;
428 u8 mc_swrstz;
429 u8 mc_opctrl;
430 u8 mc_flowctrl;
431 u8 mc_phyrstz;
432 u8 mc_lockonclock;
433 u8 mc_heacphy_rst;
434 u8 reserved21[0xf8];
435
436 u8 csc_cfg;
437 u8 csc_scale;
438 u8 csc_coef_a1_msb;
439 u8 csc_coef_a1_lsb;
440 u8 csc_coef_a2_msb;
441 u8 csc_coef_a2_lsb;
442 u8 csc_coef_a3_msb;
443 u8 csc_coef_a3_lsb;
444 u8 csc_coef_a4_msb;
445 u8 csc_coef_a4_lsb;
446 u8 csc_coef_b1_msb;
447 u8 csc_coef_b1_lsb;
448 u8 csc_coef_b2_msb;
449 u8 csc_coef_b2_lsb;
450 u8 csc_coef_b3_msb;
451 u8 csc_coef_b3_lsb;
452 u8 csc_coef_b4_msb;
453 u8 csc_coef_b4_lsb;
454 u8 csc_coef_c1_msb;
455 u8 csc_coef_c1_lsb;
456 u8 csc_coef_c2_msb;
457 u8 csc_coef_c2_lsb;
458 u8 csc_coef_c3_msb;
459 u8 csc_coef_c3_lsb;
460 u8 csc_coef_c4_msb;
461 u8 csc_coef_c4_lsb;
462 u8 reserved22[0xee6];
463
464 u8 a_hdcpcfg0;
465 u8 a_hdcpcfg1;
466 u8 a_hdcpobs0;
467 u8 a_hdcpobs1;
468 u8 a_hdcpobs2;
469 u8 a_hdcpobs3;
470 u8 a_apiintclr;
471 u8 a_apiintstat;
472 u8 a_apiintmsk;
473 u8 a_vidpolcfg;
474 u8 a_oesswcfg;
475 u8 a_timer1setup0;
476 u8 a_timer1setup1;
477 u8 a_timer2setup0;
478 u8 a_timer2setup1;
479 u8 a_100mscfg;
480 u8 a_2scfg0;
481 u8 a_2scfg1;
482 u8 a_5scfg0;
483 u8 a_5scfg1;
484 u8 a_srmverlsb;
485 u8 a_srmvermsb;
486 u8 a_srmctrl;
487 u8 a_sfrsetup;
488 u8 a_i2chsetup;
489 u8 a_intsetup;
490 u8 a_presetup;
491 u8 reserved23[0x5];
492 u8 a_srm_base;
493 u8 reserved24[0x2cdf];
494
495 u8 cec_ctrl;
496 u8 cec_stat;
497 u8 cec_mask;
498 u8 cec_polarity;
499 u8 cec_int;
500 u8 cec_addr_l;
501 u8 cec_addr_h;
502 u8 cec_tx_cnt;
503 u8 cec_rx_cnt;
504 u8 reserved25[0x7];
505 u8 cec_tx_data0;
506 u8 cec_tx_data1;
507 u8 cec_tx_data2;
508 u8 cec_tx_data3;
509 u8 cec_tx_data4;
510 u8 cec_tx_data5;
511 u8 cec_tx_data6;
512 u8 cec_tx_data7;
513 u8 cec_tx_data8;
514 u8 cec_tx_data9;
515 u8 cec_tx_data10;
516 u8 cec_tx_data11;
517 u8 cec_tx_data12;
518 u8 cec_tx_data13;
519 u8 cec_tx_data14;
520 u8 cec_tx_data15;
521 u8 cec_rx_data0;
522 u8 cec_rx_data1;
523 u8 cec_rx_data2;
524 u8 cec_rx_data3;
525 u8 cec_rx_data4;
526 u8 cec_rx_data5;
527 u8 cec_rx_data6;
528 u8 cec_rx_data7;
529 u8 cec_rx_data8;
530 u8 cec_rx_data9;
531 u8 cec_rx_data10;
532 u8 cec_rx_data11;
533 u8 cec_rx_data12;
534 u8 cec_rx_data13;
535 u8 cec_rx_data14;
536 u8 cec_rx_data15;
537 u8 cec_lock;
538 u8 cec_wkupctrl;
539 u8 reserved26[0xce];
540
541 u8 i2cm_slave;
542 u8 i2cmess;
543 u8 i2cm_datao;
544 u8 i2cm_datai;
545 u8 i2cm_operation;
546 u8 i2cm_int;
547 u8 i2cm_ctlint;
548 u8 i2cm_div;
549 u8 i2cm_segaddr;
550 u8 i2cm_softrstz;
551 u8 i2cm_segptr;
552 u8 i2cm_ss_scl_hcnt_1_addr;
553 u8 i2cm_ss_scl_hcnt_0_addr;
554 u8 i2cm_ss_scl_lcnt_1_addr;
555 u8 i2cm_ss_scl_lcnt_0_addr;
556 u8 i2cm_fs_scl_hcnt_1_addr;
557 u8 i2cm_fs_scl_hcnt_0_addr;
558 u8 i2cm_fs_scl_lcnt_1_addr;
559 u8 i2cm_fs_scl_lcnt_0_addr;
560 u8 reserved27[0x1ed];
561
562 u8 rng_base;
563};
564
565
566
567
568enum {
569
570 HDMI_IH_FC_INT2_OVERFLOW_MASK = 0x03,
571 HDMI_IH_FC_INT2_LOW_PRIORITY_OVERFLOW = 0x02,
572 HDMI_IH_FC_INT2_HIGH_PRIORITY_OVERFLOW = 0x01,
573
574
575 HDMI_IH_FC_STAT2_OVERFLOW_MASK = 0x03,
576 HDMI_IH_FC_STAT2_LOW_PRIORITY_OVERFLOW = 0x02,
577 HDMI_IH_FC_STAT2_HIGH_PRIORITY_OVERFLOW = 0x01,
578
579
580 HDMI_IH_PHY_STAT0_RX_SENSE3 = 0x20,
581 HDMI_IH_PHY_STAT0_RX_SENSE2 = 0x10,
582 HDMI_IH_PHY_STAT0_RX_SENSE1 = 0x8,
583 HDMI_IH_PHY_STAT0_RX_SENSE0 = 0x4,
584 HDMI_IH_PHY_STAT0_TX_PHY_LOCK = 0x2,
585 HDMI_IH_PHY_STAT0_HPD = 0x1,
586
587
588 HDMI_IH_MUTE_I2CMPHY_STAT0_I2CMPHYDONE = 0x2,
589 HDMI_IH_MUTE_I2CMPHY_STAT0_I2CMPHYERROR = 0x1,
590
591
592 HDMI_IH_AHBDMAAUD_STAT0_ERROR = 0x20,
593 HDMI_IH_AHBDMAAUD_STAT0_LOST = 0x10,
594 HDMI_IH_AHBDMAAUD_STAT0_RETRY = 0x08,
595 HDMI_IH_AHBDMAAUD_STAT0_DONE = 0x04,
596 HDMI_IH_AHBDMAAUD_STAT0_BUFFFULL = 0x02,
597 HDMI_IH_AHBDMAAUD_STAT0_BUFFEMPTY = 0x01,
598
599
600 HDMI_IH_MUTE_FC_STAT2_OVERFLOW_MASK = 0x03,
601 HDMI_IH_MUTE_FC_STAT2_LOW_PRIORITY_OVERFLOW = 0x02,
602 HDMI_IH_MUTE_FC_STAT2_HIGH_PRIORITY_OVERFLOW = 0x01,
603
604
605 HDMI_IH_MUTE_AHBDMAAUD_STAT0_ERROR = 0x20,
606 HDMI_IH_MUTE_AHBDMAAUD_STAT0_LOST = 0x10,
607 HDMI_IH_MUTE_AHBDMAAUD_STAT0_RETRY = 0x08,
608 HDMI_IH_MUTE_AHBDMAAUD_STAT0_DONE = 0x04,
609 HDMI_IH_MUTE_AHBDMAAUD_STAT0_BUFFFULL = 0x02,
610 HDMI_IH_MUTE_AHBDMAAUD_STAT0_BUFFEMPTY = 0x01,
611
612
613 HDMI_IH_MUTE_MUTE_WAKEUP_INTERRUPT = 0x2,
614 HDMI_IH_MUTE_MUTE_ALL_INTERRUPT = 0x1,
615
616
617 HDMI_TX_INVID0_INTERNAL_DE_GENERATOR_MASK = 0x80,
618 HDMI_TX_INVID0_INTERNAL_DE_GENERATOR_ENABLE = 0x80,
619 HDMI_TX_INVID0_INTERNAL_DE_GENERATOR_DISABLE = 0x00,
620 HDMI_TX_INVID0_VIDEO_MAPPING_MASK = 0x1F,
621 HDMI_TX_INVID0_VIDEO_MAPPING_OFFSET = 0,
622
623
624 HDMI_TX_INSTUFFING_BDBDATA_STUFFING_MASK = 0x4,
625 HDMI_TX_INSTUFFING_BDBDATA_STUFFING_ENABLE = 0x4,
626 HDMI_TX_INSTUFFING_BDBDATA_STUFFING_DISABLE = 0x0,
627 HDMI_TX_INSTUFFING_RCRDATA_STUFFING_MASK = 0x2,
628 HDMI_TX_INSTUFFING_RCRDATA_STUFFING_ENABLE = 0x2,
629 HDMI_TX_INSTUFFING_RCRDATA_STUFFING_DISABLE = 0x0,
630 HDMI_TX_INSTUFFING_GYDATA_STUFFING_MASK = 0x1,
631 HDMI_TX_INSTUFFING_GYDATA_STUFFING_ENABLE = 0x1,
632 HDMI_TX_INSTUFFING_GYDATA_STUFFING_DISABLE = 0x0,
633
634
635 HDMI_VP_PR_CD_COLOR_DEPTH_MASK = 0xF0,
636 HDMI_VP_PR_CD_COLOR_DEPTH_OFFSET = 4,
637 HDMI_VP_PR_CD_DESIRED_PR_FACTOR_MASK = 0x0F,
638 HDMI_VP_PR_CD_DESIRED_PR_FACTOR_OFFSET = 0,
639
640
641 HDMI_VP_STUFF_IDEFAULT_PHASE_MASK = 0x20,
642 HDMI_VP_STUFF_IDEFAULT_PHASE_OFFSET = 5,
643 HDMI_VP_STUFF_IFIX_PP_TO_LAST_MASK = 0x10,
644 HDMI_VP_STUFF_IFIX_PP_TO_LAST_OFFSET = 4,
645 HDMI_VP_STUFF_ICX_GOTO_P0_ST_MASK = 0x8,
646 HDMI_VP_STUFF_ICX_GOTO_P0_ST_OFFSET = 3,
647 HDMI_VP_STUFF_YCC422_STUFFING_MASK = 0x4,
648 HDMI_VP_STUFF_YCC422_STUFFING_STUFFING_MODE = 0x4,
649 HDMI_VP_STUFF_YCC422_STUFFING_DIRECT_MODE = 0x0,
650 HDMI_VP_STUFF_PP_STUFFING_MASK = 0x2,
651 HDMI_VP_STUFF_PP_STUFFING_STUFFING_MODE = 0x2,
652 HDMI_VP_STUFF_PP_STUFFING_DIRECT_MODE = 0x0,
653 HDMI_VP_STUFF_PR_STUFFING_MASK = 0x1,
654 HDMI_VP_STUFF_PR_STUFFING_STUFFING_MODE = 0x1,
655 HDMI_VP_STUFF_PR_STUFFING_DIRECT_MODE = 0x0,
656
657
658 HDMI_VP_CONF_BYPASS_EN_MASK = 0x40,
659 HDMI_VP_CONF_BYPASS_EN_ENABLE = 0x40,
660 HDMI_VP_CONF_BYPASS_EN_DISABLE = 0x00,
661 HDMI_VP_CONF_PP_EN_ENMASK = 0x20,
662 HDMI_VP_CONF_PP_EN_ENABLE = 0x20,
663 HDMI_VP_CONF_PP_EN_DISABLE = 0x00,
664 HDMI_VP_CONF_PR_EN_MASK = 0x10,
665 HDMI_VP_CONF_PR_EN_ENABLE = 0x10,
666 HDMI_VP_CONF_PR_EN_DISABLE = 0x00,
667 HDMI_VP_CONF_YCC422_EN_MASK = 0x8,
668 HDMI_VP_CONF_YCC422_EN_ENABLE = 0x8,
669 HDMI_VP_CONF_YCC422_EN_DISABLE = 0x0,
670 HDMI_VP_CONF_BYPASS_SELECT_MASK = 0x4,
671 HDMI_VP_CONF_BYPASS_SELECT_VID_PACKETIZER = 0x4,
672 HDMI_VP_CONF_BYPASS_SELECT_PIX_REPEATER = 0x0,
673 HDMI_VP_CONF_OUTPUT_SELECTOR_MASK = 0x3,
674 HDMI_VP_CONF_OUTPUT_SELECTOR_BYPASS = 0x3,
675 HDMI_VP_CONF_OUTPUT_SELECTOR_YCC422 = 0x1,
676 HDMI_VP_CONF_OUTPUT_SELECTOR_PP = 0x0,
677
678
679 HDMI_VP_REMAP_MASK = 0x3,
680 HDMI_VP_REMAP_YCC422_24bit = 0x2,
681 HDMI_VP_REMAP_YCC422_20bit = 0x1,
682 HDMI_VP_REMAP_YCC422_16bit = 0x0,
683
684
685 HDMI_FC_INVIDCONF_HDCP_KEEPOUT_MASK = 0x80,
686 HDMI_FC_INVIDCONF_HDCP_KEEPOUT_ACTIVE = 0x80,
687 HDMI_FC_INVIDCONF_HDCP_KEEPOUT_INACTIVE = 0x00,
688 HDMI_FC_INVIDCONF_VSYNC_IN_POLARITY_MASK = 0x40,
689 HDMI_FC_INVIDCONF_VSYNC_IN_POLARITY_ACTIVE_HIGH = 0x40,
690 HDMI_FC_INVIDCONF_VSYNC_IN_POLARITY_ACTIVE_LOW = 0x00,
691 HDMI_FC_INVIDCONF_HSYNC_IN_POLARITY_MASK = 0x20,
692 HDMI_FC_INVIDCONF_HSYNC_IN_POLARITY_ACTIVE_HIGH = 0x20,
693 HDMI_FC_INVIDCONF_HSYNC_IN_POLARITY_ACTIVE_LOW = 0x00,
694 HDMI_FC_INVIDCONF_DE_IN_POLARITY_MASK = 0x10,
695 HDMI_FC_INVIDCONF_DE_IN_POLARITY_ACTIVE_HIGH = 0x10,
696 HDMI_FC_INVIDCONF_DE_IN_POLARITY_ACTIVE_LOW = 0x00,
697 HDMI_FC_INVIDCONF_DVI_MODEZ_MASK = 0x8,
698 HDMI_FC_INVIDCONF_DVI_MODEZ_HDMI_MODE = 0x8,
699 HDMI_FC_INVIDCONF_DVI_MODEZ_DVI_MODE = 0x0,
700 HDMI_FC_INVIDCONF_R_V_BLANK_IN_OSC_MASK = 0x2,
701 HDMI_FC_INVIDCONF_R_V_BLANK_IN_OSC_ACTIVE_HIGH = 0x2,
702 HDMI_FC_INVIDCONF_R_V_BLANK_IN_OSC_ACTIVE_LOW = 0x0,
703 HDMI_FC_INVIDCONF_IN_I_P_MASK = 0x1,
704 HDMI_FC_INVIDCONF_IN_I_P_INTERLACED = 0x1,
705 HDMI_FC_INVIDCONF_IN_I_P_PROGRESSIVE = 0x0,
706
707
708 HDMI_FC_AUDICONF0_CC_OFFSET = 4,
709 HDMI_FC_AUDICONF0_CC_MASK = 0x70,
710 HDMI_FC_AUDICONF0_CT_OFFSET = 0,
711 HDMI_FC_AUDICONF0_CT_MASK = 0xF,
712
713
714 HDMI_FC_AUDICONF1_SS_OFFSET = 3,
715 HDMI_FC_AUDICONF1_SS_MASK = 0x18,
716 HDMI_FC_AUDICONF1_SF_OFFSET = 0,
717 HDMI_FC_AUDICONF1_SF_MASK = 0x7,
718
719
720 HDMI_FC_AUDICONF3_LFEPBL_OFFSET = 5,
721 HDMI_FC_AUDICONF3_LFEPBL_MASK = 0x60,
722 HDMI_FC_AUDICONF3_DM_INH_OFFSET = 4,
723 HDMI_FC_AUDICONF3_DM_INH_MASK = 0x10,
724 HDMI_FC_AUDICONF3_LSV_OFFSET = 0,
725 HDMI_FC_AUDICONF3_LSV_MASK = 0xF,
726
727
728 HDMI_FC_AUDSCHNLS0_CGMSA_OFFSET = 4,
729 HDMI_FC_AUDSCHNLS0_CGMSA_MASK = 0x30,
730 HDMI_FC_AUDSCHNLS0_COPYRIGHT_OFFSET = 0,
731 HDMI_FC_AUDSCHNLS0_COPYRIGHT_MASK = 0x01,
732
733
734 HDMI_FC_AUDSCHNLS3_OIEC_CH0_OFFSET = 0,
735 HDMI_FC_AUDSCHNLS3_OIEC_CH0_MASK = 0x0f,
736 HDMI_FC_AUDSCHNLS3_OIEC_CH1_OFFSET = 4,
737 HDMI_FC_AUDSCHNLS3_OIEC_CH1_MASK = 0xf0,
738 HDMI_FC_AUDSCHNLS4_OIEC_CH2_OFFSET = 0,
739 HDMI_FC_AUDSCHNLS4_OIEC_CH2_MASK = 0x0f,
740 HDMI_FC_AUDSCHNLS4_OIEC_CH3_OFFSET = 4,
741 HDMI_FC_AUDSCHNLS4_OIEC_CH3_MASK = 0xf0,
742
743 HDMI_FC_AUDSCHNLS5_OIEC_CH0_OFFSET = 0,
744 HDMI_FC_AUDSCHNLS5_OIEC_CH0_MASK = 0x0f,
745 HDMI_FC_AUDSCHNLS5_OIEC_CH1_OFFSET = 4,
746 HDMI_FC_AUDSCHNLS5_OIEC_CH1_MASK = 0xf0,
747 HDMI_FC_AUDSCHNLS6_OIEC_CH2_OFFSET = 0,
748 HDMI_FC_AUDSCHNLS6_OIEC_CH2_MASK = 0x0f,
749 HDMI_FC_AUDSCHNLS6_OIEC_CH3_OFFSET = 4,
750 HDMI_FC_AUDSCHNLS6_OIEC_CH3_MASK = 0xf0,
751
752
753 HDMI_FC_AUDSCHNLS7_ACCURACY_OFFSET = 4,
754 HDMI_FC_AUDSCHNLS7_ACCURACY_MASK = 0x30,
755
756
757 HDMI_FC_AUDSCHNLS8_ORIGSAMPFREQ_MASK = 0xf0,
758 HDMI_FC_AUDSCHNLS8_ORIGSAMPFREQ_OFFSET = 4,
759 HDMI_FC_AUDSCHNLS8_WORDLEGNTH_MASK = 0x0f,
760 HDMI_FC_AUDSCHNLS8_WORDLEGNTH_OFFSET = 0,
761
762
763 HDMI_FC_AUDSCONF_AUD_PACKET_SAMPFIT_MASK = 0xF0,
764 HDMI_FC_AUDSCONF_AUD_PACKET_SAMPFIT_OFFSET = 4,
765 HDMI_FC_AUDSCONF_AUD_PACKET_LAYOUT_MASK = 0x1,
766 HDMI_FC_AUDSCONF_AUD_PACKET_LAYOUT_OFFSET = 0,
767 HDMI_FC_AUDSCONF_AUD_PACKET_LAYOUT_LAYOUT1 = 0x1,
768 HDMI_FC_AUDSCONF_AUD_PACKET_LAYOUT_LAYOUT0 = 0x0,
769
770
771 HDMI_FC_STAT2_OVERFLOW_MASK = 0x03,
772 HDMI_FC_STAT2_LOW_PRIORITY_OVERFLOW = 0x02,
773 HDMI_FC_STAT2_HIGH_PRIORITY_OVERFLOW = 0x01,
774
775
776 HDMI_FC_INT2_OVERFLOW_MASK = 0x03,
777 HDMI_FC_INT2_LOW_PRIORITY_OVERFLOW = 0x02,
778 HDMI_FC_INT2_HIGH_PRIORITY_OVERFLOW = 0x01,
779
780
781 HDMI_FC_MASK2_OVERFLOW_MASK = 0x03,
782 HDMI_FC_MASK2_LOW_PRIORITY_OVERFLOW = 0x02,
783 HDMI_FC_MASK2_HIGH_PRIORITY_OVERFLOW = 0x01,
784
785
786 HDMI_FC_PRCONF_INCOMING_PR_FACTOR_MASK = 0xF0,
787 HDMI_FC_PRCONF_INCOMING_PR_FACTOR_OFFSET = 4,
788 HDMI_FC_PRCONF_OUTPUT_PR_FACTOR_MASK = 0x0F,
789 HDMI_FC_PRCONF_OUTPUT_PR_FACTOR_OFFSET = 0,
790
791
792 HDMI_FC_AVICONF0_PIX_FMT_MASK = 0x03,
793 HDMI_FC_AVICONF0_PIX_FMT_RGB = 0x00,
794 HDMI_FC_AVICONF0_PIX_FMT_YCBCR422 = 0x01,
795 HDMI_FC_AVICONF0_PIX_FMT_YCBCR444 = 0x02,
796 HDMI_FC_AVICONF0_ACTIVE_FMT_MASK = 0x40,
797 HDMI_FC_AVICONF0_ACTIVE_FMT_INFO_PRESENT = 0x40,
798 HDMI_FC_AVICONF0_ACTIVE_FMT_NO_INFO = 0x00,
799 HDMI_FC_AVICONF0_BAR_DATA_MASK = 0x0C,
800 HDMI_FC_AVICONF0_BAR_DATA_NO_DATA = 0x00,
801 HDMI_FC_AVICONF0_BAR_DATA_VERT_BAR = 0x04,
802 HDMI_FC_AVICONF0_BAR_DATA_HORIZ_BAR = 0x08,
803 HDMI_FC_AVICONF0_BAR_DATA_VERT_HORIZ_BAR = 0x0C,
804 HDMI_FC_AVICONF0_SCAN_INFO_MASK = 0x30,
805 HDMI_FC_AVICONF0_SCAN_INFO_OVERSCAN = 0x10,
806 HDMI_FC_AVICONF0_SCAN_INFO_UNDERSCAN = 0x20,
807 HDMI_FC_AVICONF0_SCAN_INFO_NODATA = 0x00,
808
809 HDMI_FC_AVICONF1_ACTIVE_ASPECT_RATIO_MASK = 0x0F,
810 HDMI_FC_AVICONF1_ACTIVE_ASPECT_RATIO_USE_CODED = 0x08,
811 HDMI_FC_AVICONF1_ACTIVE_ASPECT_RATIO_4_3 = 0x09,
812 HDMI_FC_AVICONF1_ACTIVE_ASPECT_RATIO_16_9 = 0x0A,
813 HDMI_FC_AVICONF1_ACTIVE_ASPECT_RATIO_14_9 = 0x0B,
814 HDMI_FC_AVICONF1_CODED_ASPECT_RATIO_MASK = 0x30,
815 HDMI_FC_AVICONF1_CODED_ASPECT_RATIO_NO_DATA = 0x00,
816 HDMI_FC_AVICONF1_CODED_ASPECT_RATIO_4_3 = 0x10,
817 HDMI_FC_AVICONF1_CODED_ASPECT_RATIO_16_9 = 0x20,
818 HDMI_FC_AVICONF1_COLORIMETRY_MASK = 0xC0,
819 HDMI_FC_AVICONF1_COLORIMETRY_NO_DATA = 0x00,
820 HDMI_FC_AVICONF1_COLORIMETRY_SMPTE = 0x40,
821 HDMI_FC_AVICONF1_COLORIMETRY_ITUR = 0x80,
822 HDMI_FC_AVICONF1_COLORIMETRY_EXTENDED_INFO = 0xC0,
823
824 HDMI_FC_AVICONF2_SCALING_MASK = 0x03,
825 HDMI_FC_AVICONF2_SCALING_NONE = 0x00,
826 HDMI_FC_AVICONF2_SCALING_HORIZ = 0x01,
827 HDMI_FC_AVICONF2_SCALING_VERT = 0x02,
828 HDMI_FC_AVICONF2_SCALING_HORIZ_VERT = 0x03,
829 HDMI_FC_AVICONF2_RGB_QUANT_MASK = 0x0C,
830 HDMI_FC_AVICONF2_RGB_QUANT_DEFAULT = 0x00,
831 HDMI_FC_AVICONF2_RGB_QUANT_LIMITED_RANGE = 0x04,
832 HDMI_FC_AVICONF2_RGB_QUANT_FULL_RANGE = 0x08,
833 HDMI_FC_AVICONF2_EXT_COLORIMETRY_MASK = 0x70,
834 HDMI_FC_AVICONF2_EXT_COLORIMETRY_XVYCC601 = 0x00,
835 HDMI_FC_AVICONF2_EXT_COLORIMETRY_XVYCC709 = 0x10,
836 HDMI_FC_AVICONF2_EXT_COLORIMETRY_SYCC601 = 0x20,
837 HDMI_FC_AVICONF2_EXT_COLORIMETRY_ADOBE_YCC601 = 0x30,
838 HDMI_FC_AVICONF2_EXT_COLORIMETRY_ADOBE_RGB = 0x40,
839 HDMI_FC_AVICONF2_IT_CONTENT_MASK = 0x80,
840 HDMI_FC_AVICONF2_IT_CONTENT_NO_DATA = 0x00,
841 HDMI_FC_AVICONF2_IT_CONTENT_VALID = 0x80,
842
843 HDMI_FC_AVICONF3_IT_CONTENT_TYPE_MASK = 0x03,
844 HDMI_FC_AVICONF3_IT_CONTENT_TYPE_GRAPHICS = 0x00,
845 HDMI_FC_AVICONF3_IT_CONTENT_TYPE_PHOTO = 0x01,
846 HDMI_FC_AVICONF3_IT_CONTENT_TYPE_CINEMA = 0x02,
847 HDMI_FC_AVICONF3_IT_CONTENT_TYPE_GAME = 0x03,
848 HDMI_FC_AVICONF3_QUANT_RANGE_MASK = 0x0C,
849 HDMI_FC_AVICONF3_QUANT_RANGE_LIMITED = 0x00,
850 HDMI_FC_AVICONF3_QUANT_RANGE_FULL = 0x04,
851
852
853 HDMI_FC_DBGFORCE_FORCEAUDIO = 0x10,
854 HDMI_FC_DBGFORCE_FORCEVIDEO = 0x1,
855
856
857 HDMI_PHY_CONF0_PDZ_MASK = 0x80,
858 HDMI_PHY_CONF0_PDZ_OFFSET = 7,
859 HDMI_PHY_CONF0_ENTMDS_MASK = 0x40,
860 HDMI_PHY_CONF0_ENTMDS_OFFSET = 6,
861 HDMI_PHY_CONF0_SPARECTRL = 0x20,
862 HDMI_PHY_CONF0_GEN2_PDDQ_MASK = 0x10,
863 HDMI_PHY_CONF0_GEN2_PDDQ_OFFSET = 4,
864 HDMI_PHY_CONF0_GEN2_TXPWRON_MASK = 0x8,
865 HDMI_PHY_CONF0_GEN2_TXPWRON_OFFSET = 3,
866 HDMI_PHY_CONF0_GEN2_ENHPDRXSENSE_MASK = 0x4,
867 HDMI_PHY_CONF0_GEN2_ENHPDRXSENSE_OFFSET = 2,
868 HDMI_PHY_CONF0_SELDATAENPOL_MASK = 0x2,
869 HDMI_PHY_CONF0_SELDATAENPOL_OFFSET = 1,
870 HDMI_PHY_CONF0_SELDIPIF_MASK = 0x1,
871 HDMI_PHY_CONF0_SELDIPIF_OFFSET = 0,
872
873
874 HDMI_PHY_TST0_TSTCLR_MASK = 0x20,
875 HDMI_PHY_TST0_TSTCLR_OFFSET = 5,
876 HDMI_PHY_TST0_TSTEN_MASK = 0x10,
877 HDMI_PHY_TST0_TSTEN_OFFSET = 4,
878 HDMI_PHY_TST0_TSTCLK_MASK = 0x1,
879 HDMI_PHY_TST0_TSTCLK_OFFSET = 0,
880
881
882 HDMI_PHY_RX_SENSE3 = 0x80,
883 HDMI_PHY_RX_SENSE2 = 0x40,
884 HDMI_PHY_RX_SENSE1 = 0x20,
885 HDMI_PHY_RX_SENSE0 = 0x10,
886 HDMI_PHY_HPD = 0x02,
887 HDMI_PHY_TX_PHY_LOCK = 0x01,
888
889
890 HDMI_DVI_STAT = 0xF2,
891
892
893 HDMI_PHY_I2CM_SLAVE_ADDR_PHY_GEN2 = 0x69,
894 HDMI_PHY_I2CM_SLAVE_ADDR_HEAC_PHY = 0x49,
895
896
897 HDMI_PHY_I2CM_OPERATION_ADDR_WRITE = 0x10,
898 HDMI_PHY_I2CM_OPERATION_ADDR_READ = 0x1,
899
900
901 HDMI_PHY_I2CM_INT_ADDR_DONE_POL = 0x08,
902 HDMI_PHY_I2CM_INT_ADDR_DONE_MASK = 0x04,
903
904
905 HDMI_PHY_I2CM_CTLINT_ADDR_NAC_POL = 0x80,
906 HDMI_PHY_I2CM_CTLINT_ADDR_NAC_MASK = 0x40,
907 HDMI_PHY_I2CM_CTLINT_ADDR_ARBITRATION_POL = 0x08,
908 HDMI_PHY_I2CM_CTLINT_ADDR_ARBITRATION_MASK = 0x04,
909
910
911 HDMI_AUD_CTS3_N_SHIFT_OFFSET = 5,
912 HDMI_AUD_CTS3_N_SHIFT_MASK = 0xe0,
913 HDMI_AUD_CTS3_N_SHIFT_1 = 0,
914 HDMI_AUD_CTS3_N_SHIFT_16 = 0x20,
915 HDMI_AUD_CTS3_N_SHIFT_32 = 0x40,
916 HDMI_AUD_CTS3_N_SHIFT_64 = 0x60,
917 HDMI_AUD_CTS3_N_SHIFT_128 = 0x80,
918 HDMI_AUD_CTS3_N_SHIFT_256 = 0xa0,
919
920
921 HDMI_AUD_CTS3_CTS_MANUAL = 0x10,
922 HDMI_AUD_CTS3_AUDCTS19_16_MASK = 0x0f,
923
924
925 HDMI_AHB_DMA_CONF0_SW_FIFO_RST_OFFSET = 7,
926 HDMI_AHB_DMA_CONF0_SW_FIFO_RST_MASK = 0x80,
927 HDMI_AHB_DMA_CONF0_HBR = 0x10,
928 HDMI_AHB_DMA_CONF0_EN_HLOCK_OFFSET = 3,
929 HDMI_AHB_DMA_CONF0_EN_HLOCK_MASK = 0x08,
930 HDMI_AHB_DMA_CONF0_INCR_TYPE_OFFSET = 1,
931 HDMI_AHB_DMA_CONF0_INCR_TYPE_MASK = 0x06,
932 HDMI_AHB_DMA_CONF0_INCR4 = 0x0,
933 HDMI_AHB_DMA_CONF0_INCR8 = 0x2,
934 HDMI_AHB_DMA_CONF0_INCR16 = 0x4,
935 HDMI_AHB_DMA_CONF0_BURST_MODE = 0x1,
936
937
938 HDMI_AHB_DMA_START_START_OFFSET = 0,
939 HDMI_AHB_DMA_START_START_MASK = 0x01,
940
941
942 HDMI_AHB_DMA_STOP_STOP_OFFSET = 0,
943 HDMI_AHB_DMA_STOP_STOP_MASK = 0x01,
944
945
946 HDMI_AHB_DMA_DONE = 0x80,
947 HDMI_AHB_DMA_RETRY_SPLIT = 0x40,
948 HDMI_AHB_DMA_LOSTOWNERSHIP = 0x20,
949 HDMI_AHB_DMA_ERROR = 0x10,
950 HDMI_AHB_DMA_FIFO_THREMPTY = 0x04,
951 HDMI_AHB_DMA_FIFO_FULL = 0x02,
952 HDMI_AHB_DMA_FIFO_EMPTY = 0x01,
953
954
955 HDMI_AHB_DMA_BUFFSTAT_FULL = 0x02,
956 HDMI_AHB_DMA_BUFFSTAT_EMPTY = 0x01,
957
958
959 HDMI_MC_CLKDIS_HDCPCLK_DISABLE = 0x40,
960 HDMI_MC_CLKDIS_CECCLK_DISABLE = 0x20,
961 HDMI_MC_CLKDIS_CSCCLK_DISABLE = 0x10,
962 HDMI_MC_CLKDIS_AUDCLK_DISABLE = 0x8,
963 HDMI_MC_CLKDIS_PREPCLK_DISABLE = 0x4,
964 HDMI_MC_CLKDIS_TMDSCLK_DISABLE = 0x2,
965 HDMI_MC_CLKDIS_PIXELCLK_DISABLE = 0x1,
966
967
968 HDMI_MC_SWRSTZ_TMDSSWRST_REQ = 0x02,
969
970
971 HDMI_MC_FLOWCTRL_FEED_THROUGH_OFF_MASK = 0x1,
972 HDMI_MC_FLOWCTRL_FEED_THROUGH_OFF_CSC_IN_PATH = 0x1,
973 HDMI_MC_FLOWCTRL_FEED_THROUGH_OFF_CSC_BYPASS = 0x0,
974
975
976 HDMI_MC_PHYRSTZ_ASSERT = 0x0,
977 HDMI_MC_PHYRSTZ_DEASSERT = 0x1,
978
979
980 HDMI_MC_HEACPHY_RST_ASSERT = 0x1,
981 HDMI_MC_HEACPHY_RST_DEASSERT = 0x0,
982
983
984 HDMI_CSC_CFG_INTMODE_MASK = 0x30,
985 HDMI_CSC_CFG_INTMODE_OFFSET = 4,
986 HDMI_CSC_CFG_INTMODE_DISABLE = 0x00,
987 HDMI_CSC_CFG_INTMODE_CHROMA_INT_FORMULA1 = 0x10,
988 HDMI_CSC_CFG_INTMODE_CHROMA_INT_FORMULA2 = 0x20,
989 HDMI_CSC_CFG_DECMODE_MASK = 0x3,
990 HDMI_CSC_CFG_DECMODE_OFFSET = 0,
991 HDMI_CSC_CFG_DECMODE_DISABLE = 0x0,
992 HDMI_CSC_CFG_DECMODE_CHROMA_INT_FORMULA1 = 0x1,
993 HDMI_CSC_CFG_DECMODE_CHROMA_INT_FORMULA2 = 0x2,
994 HDMI_CSC_CFG_DECMODE_CHROMA_INT_FORMULA3 = 0x3,
995
996
997 HDMI_CSC_SCALE_CSC_COLORDE_PTH_MASK = 0xF0,
998 HDMI_CSC_SCALE_CSC_COLORDE_PTH_24BPP = 0x00,
999 HDMI_CSC_SCALE_CSC_COLORDE_PTH_30BPP = 0x50,
1000 HDMI_CSC_SCALE_CSC_COLORDE_PTH_36BPP = 0x60,
1001 HDMI_CSC_SCALE_CSC_COLORDE_PTH_48BPP = 0x70,
1002 HDMI_CSC_SCALE_CSCSCALE_MASK = 0x03,
1003
1004
1005 HDMI_A_HDCPCFG0_ELVENA_MASK = 0x80,
1006 HDMI_A_HDCPCFG0_ELVENA_ENABLE = 0x80,
1007 HDMI_A_HDCPCFG0_ELVENA_DISABLE = 0x00,
1008 HDMI_A_HDCPCFG0_I2CFASTMODE_MASK = 0x40,
1009 HDMI_A_HDCPCFG0_I2CFASTMODE_ENABLE = 0x40,
1010 HDMI_A_HDCPCFG0_I2CFASTMODE_DISABLE = 0x00,
1011 HDMI_A_HDCPCFG0_BYPENCRYPTION_MASK = 0x20,
1012 HDMI_A_HDCPCFG0_BYPENCRYPTION_ENABLE = 0x20,
1013 HDMI_A_HDCPCFG0_BYPENCRYPTION_DISABLE = 0x00,
1014 HDMI_A_HDCPCFG0_SYNCRICHECK_MASK = 0x10,
1015 HDMI_A_HDCPCFG0_SYNCRICHECK_ENABLE = 0x10,
1016 HDMI_A_HDCPCFG0_SYNCRICHECK_DISABLE = 0x00,
1017 HDMI_A_HDCPCFG0_AVMUTE_MASK = 0x8,
1018 HDMI_A_HDCPCFG0_AVMUTE_ENABLE = 0x8,
1019 HDMI_A_HDCPCFG0_AVMUTE_DISABLE = 0x0,
1020 HDMI_A_HDCPCFG0_RXDETECT_MASK = 0x4,
1021 HDMI_A_HDCPCFG0_RXDETECT_ENABLE = 0x4,
1022 HDMI_A_HDCPCFG0_RXDETECT_DISABLE = 0x0,
1023 HDMI_A_HDCPCFG0_EN11FEATURE_MASK = 0x2,
1024 HDMI_A_HDCPCFG0_EN11FEATURE_ENABLE = 0x2,
1025 HDMI_A_HDCPCFG0_EN11FEATURE_DISABLE = 0x0,
1026 HDMI_A_HDCPCFG0_HDMIDVI_MASK = 0x1,
1027 HDMI_A_HDCPCFG0_HDMIDVI_HDMI = 0x1,
1028 HDMI_A_HDCPCFG0_HDMIDVI_DVI = 0x0,
1029
1030
1031 HDMI_A_HDCPCFG1_DISSHA1CHECK_MASK = 0x8,
1032 HDMI_A_HDCPCFG1_DISSHA1CHECK_DISABLE = 0x8,
1033 HDMI_A_HDCPCFG1_DISSHA1CHECK_ENABLE = 0x0,
1034 HDMI_A_HDCPCFG1_PH2UPSHFTENC_MASK = 0x4,
1035 HDMI_A_HDCPCFG1_PH2UPSHFTENC_ENABLE = 0x4,
1036 HDMI_A_HDCPCFG1_PH2UPSHFTENC_DISABLE = 0x0,
1037 HDMI_A_HDCPCFG1_ENCRYPTIONDISABLE_MASK = 0x2,
1038 HDMI_A_HDCPCFG1_ENCRYPTIONDISABLE_DISABLE = 0x2,
1039 HDMI_A_HDCPCFG1_ENCRYPTIONDISABLE_ENABLE = 0x0,
1040 HDMI_A_HDCPCFG1_SWRESET_MASK = 0x1,
1041 HDMI_A_HDCPCFG1_SWRESET_ASSERT = 0x0,
1042
1043
1044 HDMI_A_VIDPOLCFG_UNENCRYPTCONF_MASK = 0x60,
1045 HDMI_A_VIDPOLCFG_UNENCRYPTCONF_OFFSET = 5,
1046 HDMI_A_VIDPOLCFG_DATAENPOL_MASK = 0x10,
1047 HDMI_A_VIDPOLCFG_DATAENPOL_ACTIVE_HIGH = 0x10,
1048 HDMI_A_VIDPOLCFG_DATAENPOL_ACTIVE_LOW = 0x0,
1049 HDMI_A_VIDPOLCFG_VSYNCPOL_MASK = 0x8,
1050 HDMI_A_VIDPOLCFG_VSYNCPOL_ACTIVE_HIGH = 0x8,
1051 HDMI_A_VIDPOLCFG_VSYNCPOL_ACTIVE_LOW = 0x0,
1052 HDMI_A_VIDPOLCFG_HSYNCPOL_MASK = 0x2,
1053 HDMI_A_VIDPOLCFG_HSYNCPOL_ACTIVE_HIGH = 0x2,
1054 HDMI_A_VIDPOLCFG_HSYNCPOL_ACTIVE_LOW = 0x0,
1055};
1056
1057#endif
1058