LXR uboot/arch/arm/mach-exynos/spl

   1// SPDX-License-Identifier: GPL-2.0+
   2/*
   3 * Copyright (C) 2012 Samsung Electronics
   4 */
   5
   6#include <common.h>
   7#include <config.h>
   8
   9#include <asm/arch/clock.h>
  10#include <asm/arch/clk.h>
  11#include <asm/arch/dmc.h>
  12#include <asm/arch/periph.h>
  13#include <asm/arch/pinmux.h>
  14#include <asm/arch/power.h>
  15#include <asm/arch/spl.h>
  16#include <asm/arch/spi.h>
  17
  18#include "common_setup.h"
  19#include "clock_init.h"
  20
  21DECLARE_GLOBAL_DATA_PTR;
  22
  23/* Index into irom ptr table */
  24enum index {
  25        MMC_INDEX,
  26        EMMC44_INDEX,
  27        EMMC44_END_INDEX,
  28        SPI_INDEX,
  29        USB_INDEX,
  30};
  31
  32/* IROM Function Pointers Table */
  33u32 irom_ptr_table[] = {
  34        [MMC_INDEX] = 0x02020030,       /* iROM Function Pointer-SDMMC boot */
  35        [EMMC44_INDEX] = 0x02020044,    /* iROM Function Pointer-EMMC4.4 boot*/
  36        [EMMC44_END_INDEX] = 0x02020048,/* iROM Function Pointer
  37                                                -EMMC4.4 end boot operation */
  38        [SPI_INDEX] = 0x02020058,       /* iROM Function Pointer-SPI boot */
  39        [USB_INDEX] = 0x02020070,       /* iROM Function Pointer-USB boot*/
  40        };
  41
  42void *get_irom_func(int index)
  43{
  44        return (void *)*(u32 *)irom_ptr_table[index];
  45}
  46
  47#ifdef CONFIG_USB_BOOTING
  48/*
  49 * Set/clear program flow prediction and return the previous state.
  50 */
  51static int config_branch_prediction(int set_cr_z)
  52{
  53        unsigned int cr;
  54
  55        /* System Control Register: 11th bit Z Branch prediction enable */
  56        cr = get_cr();
  57        set_cr(set_cr_z ? cr | CR_Z : cr & ~CR_Z);
  58
  59        return cr & CR_Z;
  60}
  61#endif
  62
  63#ifdef CONFIG_SPI_BOOTING
  64static void spi_rx_tx(struct exynos_spi *regs, int todo,
  65                        void *dinp, void const *doutp, int i)
  66{
  67        uint *rxp = (uint *)(dinp + (i * (32 * 1024)));
  68        int rx_lvl, tx_lvl;
  69        uint out_bytes, in_bytes;
  70
  71        out_bytes = todo;
  72        in_bytes = todo;
  73        setbits_le32(&regs->ch_cfg, SPI_CH_RST);
  74        clrbits_le32(&regs->ch_cfg, SPI_CH_RST);
  75        writel(((todo * 8) / 32) | SPI_PACKET_CNT_EN, &regs->pkt_cnt);
  76
  77        while (in_bytes) {
  78                uint32_t spi_sts;
  79                int temp;
  80
  81                spi_sts = readl(&regs->spi_sts);
  82                rx_lvl = ((spi_sts >> 15) & 0x7f);
  83                tx_lvl = ((spi_sts >> 6) & 0x7f);
  84                while (tx_lvl < 32 && out_bytes) {
  85                        temp = 0xffffffff;
  86                        writel(temp, &regs->tx_data);
  87                        out_bytes -= 4;
  88                        tx_lvl += 4;
  89                }
  90                while (rx_lvl >= 4 && in_bytes) {
  91                        temp = readl(&regs->rx_data);
  92                        if (rxp)
  93                                *rxp++ = temp;
  94                        in_bytes -= 4;
  95                        rx_lvl -= 4;
  96                }
  97        }
  98}
  99
 100/*
 101 * Copy uboot from spi flash to RAM
 102 *
 103 * @parma uboot_size    size of u-boot to copy
 104 * @param uboot_addr    address in u-boot to copy
 105 */
 106static void exynos_spi_copy(unsigned int uboot_size, unsigned int uboot_addr)
 107{
 108        int upto, todo;
 109        int i, timeout = 100;
 110        struct exynos_spi *regs = (struct exynos_spi *)CONFIG_SYS_SPI_BASE;
 111
 112        set_spi_clk(PERIPH_ID_SPI1, 50000000); /* set spi clock to 50Mhz */
 113        /* set the spi1 GPIO */
 114        exynos_pinmux_config(PERIPH_ID_SPI1, PINMUX_FLAG_NONE);
 115
 116        /* set pktcnt and enable it */
 117        writel(4 | SPI_PACKET_CNT_EN, &regs->pkt_cnt);
 118        /* set FB_CLK_SEL */
 119        writel(SPI_FB_DELAY_180, &regs->fb_clk);
 120        /* set CH_WIDTH and BUS_WIDTH as word */
 121        setbits_le32(&regs->mode_cfg, SPI_MODE_CH_WIDTH_WORD |
 122                                        SPI_MODE_BUS_WIDTH_WORD);
 123        clrbits_le32(&regs->ch_cfg, SPI_CH_CPOL_L); /* CPOL: active high */
 124
 125        /* clear rx and tx channel if set priveously */
 126        clrbits_le32(&regs->ch_cfg, SPI_RX_CH_ON | SPI_TX_CH_ON);
 127
 128        setbits_le32(&regs->swap_cfg, SPI_RX_SWAP_EN |
 129                        SPI_RX_BYTE_SWAP |
 130                        SPI_RX_HWORD_SWAP);
 131
 132        /* do a soft reset */
 133        setbits_le32(&regs->ch_cfg, SPI_CH_RST);
 134        clrbits_le32(&regs->ch_cfg, SPI_CH_RST);
 135
 136        /* now set rx and tx channel ON */
 137        setbits_le32(&regs->ch_cfg, SPI_RX_CH_ON | SPI_TX_CH_ON | SPI_CH_HS_EN);
 138        clrbits_le32(&regs->cs_reg, SPI_SLAVE_SIG_INACT); /* CS low */
 139
 140        /* Send read instruction (0x3h) followed by a 24 bit addr */
 141        writel((SF_READ_DATA_CMD << 24) | SPI_FLASH_UBOOT_POS, &regs->tx_data);
 142
 143        /* waiting for TX done */
 144        while (!(readl(&regs->spi_sts) & SPI_ST_TX_DONE)) {
 145                if (!timeout) {
 146                        debug("SPI TIMEOUT\n");
 147                        break;
 148                }
 149                timeout--;
 150        }
 151
 152        for (upto = 0, i = 0; upto < uboot_size; upto += todo, i++) {
 153                todo = min(uboot_size - upto, (unsigned int)(1 << 15));
 154                spi_rx_tx(regs, todo, (void *)(uboot_addr),
 155                          (void *)(SPI_FLASH_UBOOT_POS), i);
 156        }
 157
 158        setbits_le32(&regs->cs_reg, SPI_SLAVE_SIG_INACT);/* make the CS high */
 159
 160        /*
 161         * Let put controller mode to BYTE as
 162         * SPI driver does not support WORD mode yet
 163         */
 164        clrbits_le32(&regs->mode_cfg, SPI_MODE_CH_WIDTH_WORD |
 165                                        SPI_MODE_BUS_WIDTH_WORD);
 166        writel(0, &regs->swap_cfg);
 167
 168        /*
 169         * Flush spi tx, rx fifos and reset the SPI controller
 170         * and clear rx/tx channel
 171         */
 172        clrsetbits_le32(&regs->ch_cfg, SPI_CH_HS_EN, SPI_CH_RST);
 173        clrbits_le32(&regs->ch_cfg, SPI_CH_RST);
 174        clrbits_le32(&regs->ch_cfg, SPI_TX_CH_ON | SPI_RX_CH_ON);
 175}
 176#endif
 177
 178/*
 179* Copy U-Boot from mmc to RAM:
 180* COPY_BL2_FNPTR_ADDR: Address in iRAM, which Contains
 181* Pointer to API (Data transfer from mmc to ram)
 182*/
 183void copy_uboot_to_ram(void)
 184{
 185        unsigned int bootmode = BOOT_MODE_OM;
 186
 187        u32 (*copy_bl2)(u32 offset, u32 nblock, u32 dst) = NULL;
 188        u32 offset = 0, size = 0;
 189#ifdef CONFIG_SPI_BOOTING
 190        struct spl_machine_param *param = spl_get_machine_params();
 191#endif
 192#ifdef CONFIG_SUPPORT_EMMC_BOOT
 193        u32 (*copy_bl2_from_emmc)(u32 nblock, u32 dst);
 194        void (*end_bootop_from_emmc)(void);
 195#endif
 196#ifdef CONFIG_USB_BOOTING
 197        int is_cr_z_set;
 198        unsigned int sec_boot_check;
 199
 200        /*
 201         * Note that older hardware (before Exynos5800) does not expect any
 202         * arguments, but it does not hurt to pass them, so a common function
 203         * prototype is used.
 204         */
 205        u32 (*usb_copy)(u32 num_of_block, u32 *dst);
 206
 207        /* Read iRAM location to check for secondary USB boot mode */
 208        sec_boot_check = readl(EXYNOS_IRAM_SECONDARY_BASE);
 209        if (sec_boot_check == EXYNOS_USB_SECONDARY_BOOT)
 210                bootmode = BOOT_MODE_USB;
 211#endif
 212
 213        if (bootmode == BOOT_MODE_OM)
 214                bootmode = get_boot_mode();
 215
 216        switch (bootmode) {
 217#ifdef CONFIG_SPI_BOOTING
 218        case BOOT_MODE_SERIAL:
 219                /* Customised function to copy u-boot from SF */
 220                exynos_spi_copy(param->uboot_size, CONFIG_SYS_TEXT_BASE);
 221                break;
 222#endif
 223        case BOOT_MODE_SD:
 224                offset = BL2_START_OFFSET;
 225                size = BL2_SIZE_BLOC_COUNT;
 226                copy_bl2 = get_irom_func(MMC_INDEX);
 227                break;
 228#ifdef CONFIG_SUPPORT_EMMC_BOOT
 229        case BOOT_MODE_EMMC:
 230                /* Set the FSYS1 clock divisor value for EMMC boot */
 231                emmc_boot_clk_div_set();
 232
 233                copy_bl2_from_emmc = get_irom_func(EMMC44_INDEX);
 234                end_bootop_from_emmc = get_irom_func(EMMC44_END_INDEX);
 235
 236                copy_bl2_from_emmc(BL2_SIZE_BLOC_COUNT, CONFIG_SYS_TEXT_BASE);
 237                end_bootop_from_emmc();
 238                break;
 239#endif
 240#ifdef CONFIG_USB_BOOTING
 241        case BOOT_MODE_USB:
 242                /*
 243                 * iROM needs program flow prediction to be disabled
 244                 * before copy from USB device to RAM
 245                 */
 246                is_cr_z_set = config_branch_prediction(0);
 247                usb_copy = get_irom_func(USB_INDEX);
 248                usb_copy(0, (u32 *)CONFIG_SYS_TEXT_BASE);
 249                config_branch_prediction(is_cr_z_set);
 250                break;
 251#endif
 252        default:
 253                break;
 254        }
 255
 256        if (copy_bl2)
 257                copy_bl2(offset, size, CONFIG_SYS_TEXT_BASE);
 258}
 259
 260void memzero(void *s, size_t n)
 261{
 262        char *ptr = s;
 263        size_t i;
 264
 265        for (i = 0; i < n; i++)
 266                *ptr++ = '\0';
 267}
 268
 269/**
 270 * Set up the U-Boot global_data pointer
 271 *
 272 * This sets the address of the global data, and sets up basic values.
 273 *
 274 * @param gdp   Value to give to gd
 275 */
 276static void setup_global_data(gd_t *gdp)
 277{
 278        gd = gdp;
 279        memzero((void *)gd, sizeof(gd_t));
 280        gd->flags |= GD_FLG_RELOC;
 281        gd->baudrate = CONFIG_BAUDRATE;
 282        gd->have_console = 1;
 283}
 284
 285void board_init_f(unsigned long bootflag)
 286{
 287        __aligned(8) gd_t local_gd;
 288        __attribute__((noreturn)) void (*uboot)(void);
 289
 290        setup_global_data(&local_gd);
 291
 292        if (do_lowlevel_init())
 293                power_exit_wakeup();
 294
 295        copy_uboot_to_ram();
 296
 297        /* Jump to U-Boot image */
 298        uboot = (void *)CONFIG_SYS_TEXT_BASE;
 299        (*uboot)();
 300        /* Never returns Here */
 301}
 302
 303/* Place Holders */
 304void board_init_r(gd_t *id, ulong dest_addr)
 305{
 306        /* Function attribute is no-return */
 307        /* This Function never executes */
 308        while (1)
 309                ;
 310}
 311