LXR uboot/arch/powerpc/cpu/mpc85xx/p2020

   1// SPDX-License-Identifier: GPL-2.0+
   2/*
   3 * Copyright 2010 Freescale Semiconductor, Inc.
   4 */
   5
   6#include <config.h>
   7#include <common.h>
   8#include <asm/io.h>
   9#include <asm/immap_85xx.h>
  10#include <asm/fsl_serdes.h>
  11
  12#define SRDS1_MAX_LANES         4
  13
  14static u32 serdes1_prtcl_map;
  15
  16static u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = {
  17        [0x0] = {PCIE1, NONE, NONE, NONE},
  18        [0x2] = {PCIE1, PCIE2, PCIE3, PCIE3},
  19        [0x4] = {PCIE1, PCIE1, PCIE3, PCIE3},
  20        [0x6] = {PCIE1, PCIE1, PCIE1, PCIE1},
  21        [0x7] = {SRIO2, SRIO1, NONE, NONE},
  22        [0x8] = {SRIO2, SRIO2, SRIO2, SRIO2},
  23        [0x9] = {SRIO2, SRIO2, SRIO2, SRIO2},
  24        [0xa] = {SRIO2, SRIO2, SRIO2, SRIO2},
  25        [0xb] = {SRIO2, SRIO1, SGMII_TSEC2, SGMII_TSEC3},
  26        [0xc] = {SRIO2, SRIO1, SGMII_TSEC2, SGMII_TSEC3},
  27        [0xd] = {PCIE1, SRIO1, SGMII_TSEC2, SGMII_TSEC3},
  28        [0xe] = {PCIE1, PCIE2, SGMII_TSEC2, SGMII_TSEC3},
  29        [0xf] = {PCIE1, PCIE1, SGMII_TSEC2, SGMII_TSEC3},
  30};
  31
  32int is_serdes_configured(enum srds_prtcl prtcl)
  33{
  34        if (!(serdes1_prtcl_map & (1 << NONE)))
  35                fsl_serdes_init();
  36
  37        return (1 << prtcl) & serdes1_prtcl_map;
  38}
  39
  40void fsl_serdes_init(void)
  41{
  42        ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
  43        u32 pordevsr = in_be32(&gur->pordevsr);
  44        u32 srds_cfg = (pordevsr & MPC85xx_PORDEVSR_IO_SEL) >>
  45                                MPC85xx_PORDEVSR_IO_SEL_SHIFT;
  46        int lane;
  47
  48        if (serdes1_prtcl_map & (1 << NONE))
  49                return;
  50
  51        debug("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg);
  52
  53        if (srds_cfg >= ARRAY_SIZE(serdes1_cfg_tbl)) {
  54                printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg);
  55                return;
  56        }
  57
  58        for (lane = 0; lane < SRDS1_MAX_LANES; lane++) {
  59                enum srds_prtcl lane_prtcl = serdes1_cfg_tbl[srds_cfg][lane];
  60                serdes1_prtcl_map |= (1 << lane_prtcl);
  61        }
  62
  63        /* Set the first bit to indicate serdes has been initialized */
  64        serdes1_prtcl_map |= (1 << NONE);
  65}
  66