LXR uboot/board/freescale/t208xqds/spl.c

   1// SPDX-License-Identifier: GPL-2.0+
   2/* Copyright 2013 Freescale Semiconductor, Inc.
   3 */
   4
   5#include <common.h>
   6#include <clock_legacy.h>
   7#include <console.h>
   8#include <env_internal.h>
   9#include <init.h>
  10#include <malloc.h>
  11#include <ns16550.h>
  12#include <nand.h>
  13#include <i2c.h>
  14#include <mmc.h>
  15#include <fsl_esdhc.h>
  16#include <spi_flash.h>
  17#include "../common/qixis.h"
  18#include "t208xqds_qixis.h"
  19#include "../common/spl.h"
  20
  21DECLARE_GLOBAL_DATA_PTR;
  22
  23phys_size_t get_effective_memsize(void)
  24{
  25        return CONFIG_SYS_L3_SIZE;
  26}
  27
  28unsigned long get_board_sys_clk(void)
  29{
  30        u8 sysclk_conf = QIXIS_READ(brdcfg[1]);
  31
  32        switch (sysclk_conf & 0x0F) {
  33        case QIXIS_SYSCLK_83:
  34                return 83333333;
  35        case QIXIS_SYSCLK_100:
  36                return 100000000;
  37        case QIXIS_SYSCLK_125:
  38                return 125000000;
  39        case QIXIS_SYSCLK_133:
  40                return 133333333;
  41        case QIXIS_SYSCLK_150:
  42                return 150000000;
  43        case QIXIS_SYSCLK_160:
  44                return 160000000;
  45        case QIXIS_SYSCLK_166:
  46                return 166666666;
  47        }
  48        return 66666666;
  49}
  50
  51unsigned long get_board_ddr_clk(void)
  52{
  53        u8 ddrclk_conf = QIXIS_READ(brdcfg[1]);
  54
  55        switch ((ddrclk_conf & 0x30) >> 4) {
  56        case QIXIS_DDRCLK_100:
  57                return 100000000;
  58        case QIXIS_DDRCLK_125:
  59                return 125000000;
  60        case QIXIS_DDRCLK_133:
  61                return 133333333;
  62        }
  63        return 66666666;
  64}
  65
  66void board_init_f(ulong bootflag)
  67{
  68        u32 plat_ratio, sys_clk, ccb_clk;
  69        ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
  70
  71        /* Memcpy existing GD at CONFIG_SPL_GD_ADDR */
  72        memcpy((void *)CONFIG_SPL_GD_ADDR, (void *)gd, sizeof(gd_t));
  73
  74        /* Update GD pointer */
  75        gd = (gd_t *)(CONFIG_SPL_GD_ADDR);
  76
  77        console_init_f();
  78
  79        /* initialize selected port with appropriate baud rate */
  80        sys_clk = get_board_sys_clk();
  81        plat_ratio = (in_be32(&gur->rcwsr[0]) >> 25) & 0x1f;
  82        ccb_clk = sys_clk * plat_ratio / 2;
  83
  84        NS16550_init((NS16550_t)CONFIG_SYS_NS16550_COM1,
  85                     ccb_clk / 16 / CONFIG_BAUDRATE);
  86
  87#if defined(CONFIG_SPL_MMC_BOOT)
  88        puts("\nSD boot...\n");
  89#elif defined(CONFIG_SPL_SPI_BOOT)
  90        puts("\nSPI boot...\n");
  91#elif defined(CONFIG_SPL_NAND_BOOT)
  92        puts("\nNAND boot...\n");
  93#endif
  94
  95        relocate_code(CONFIG_SPL_RELOC_STACK, (gd_t *)CONFIG_SPL_GD_ADDR, 0x0);
  96}
  97
  98void board_init_r(gd_t *gd, ulong dest_addr)
  99{
 100        bd_t *bd;
 101
 102        bd = (bd_t *)(gd + sizeof(gd_t));
 103        memset(bd, 0, sizeof(bd_t));
 104        gd->bd = bd;
 105        bd->bi_memstart = CONFIG_SYS_INIT_L3_ADDR;
 106        bd->bi_memsize = CONFIG_SYS_L3_SIZE;
 107
 108        arch_cpu_init();
 109        get_clocks();
 110        mem_malloc_init(CONFIG_SPL_RELOC_MALLOC_ADDR,
 111                        CONFIG_SPL_RELOC_MALLOC_SIZE);
 112        gd->flags |= GD_FLG_FULL_MALLOC_INIT;
 113
 114#ifdef CONFIG_SPL_NAND_BOOT
 115        nand_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
 116                            (uchar *)SPL_ENV_ADDR);
 117#endif
 118#ifdef CONFIG_SPL_MMC_BOOT
 119        mmc_initialize(bd);
 120        mmc_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
 121                           (uchar *)SPL_ENV_ADDR);
 122#endif
 123#ifdef CONFIG_SPL_SPI_BOOT
 124        fsl_spi_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
 125                               (uchar *)SPL_ENV_ADDR);
 126#endif
 127
 128        gd->env_addr  = (ulong)(SPL_ENV_ADDR);
 129        gd->env_valid = ENV_VALID;
 130
 131        i2c_init_all();
 132
 133        dram_init();
 134
 135#ifdef CONFIG_SPL_MMC_BOOT
 136        mmc_boot();
 137#elif defined(CONFIG_SPL_SPI_BOOT)
 138        fsl_spi_boot();
 139#elif defined(CONFIG_SPL_NAND_BOOT)
 140        nand_boot();
 141#endif
 142}
 143