LXR uboot/board/freescale/t208xrdb/t208xrdb.c

   1// SPDX-License-Identifier: GPL-2.0+
   2/*
   3 * Copyright 2009-2013 Freescale Semiconductor, Inc.
   4 */
   5
   6#include <common.h>
   7#include <command.h>
   8#include <env.h>
   9#include <fdt_support.h>
  10#include <i2c.h>
  11#include <init.h>
  12#include <netdev.h>
  13#include <linux/compiler.h>
  14#include <asm/mmu.h>
  15#include <asm/processor.h>
  16#include <asm/immap_85xx.h>
  17#include <asm/fsl_law.h>
  18#include <asm/fsl_serdes.h>
  19#include <asm/fsl_liodn.h>
  20#include <fm_eth.h>
  21#include "t208xrdb.h"
  22#include "cpld.h"
  23#include "../common/vid.h"
  24
  25DECLARE_GLOBAL_DATA_PTR;
  26
  27int checkboard(void)
  28{
  29        struct cpu_type *cpu = gd->arch.cpu;
  30        static const char *freq[3] = {"100.00MHZ", "125.00MHz", "156.25MHZ"};
  31
  32        printf("Board: %sRDB, ", cpu->name);
  33        printf("Board rev: 0x%02x CPLD ver: 0x%02x, boot from ",
  34               CPLD_READ(hw_ver), CPLD_READ(sw_ver));
  35
  36#ifdef CONFIG_SDCARD
  37        puts("SD/MMC\n");
  38#elif CONFIG_SPIFLASH
  39        puts("SPI\n");
  40#else
  41        u8 reg;
  42
  43        reg = CPLD_READ(flash_csr);
  44
  45        if (reg & CPLD_BOOT_SEL) {
  46                puts("NAND\n");
  47        } else {
  48                reg = ((reg & CPLD_LBMAP_MASK) >> CPLD_LBMAP_SHIFT);
  49                printf("NOR vBank%d\n", reg);
  50        }
  51#endif
  52
  53        puts("SERDES Reference Clocks:\n");
  54        printf("SD1_CLK1=%s, SD1_CLK2=%s\n", freq[2], freq[0]);
  55        printf("SD2_CLK1=%s, SD2_CLK2=%s\n", freq[0], freq[0]);
  56
  57        return 0;
  58}
  59
  60int board_early_init_r(void)
  61{
  62        const unsigned int flashbase = CONFIG_SYS_FLASH_BASE;
  63        int flash_esel = find_tlb_idx((void *)flashbase, 1);
  64        /*
  65         * Remap Boot flash + PROMJET region to caching-inhibited
  66         * so that flash can be erased properly.
  67         */
  68
  69        /* Flush d-cache and invalidate i-cache of any FLASH data */
  70        flush_dcache();
  71        invalidate_icache();
  72        if (flash_esel == -1) {
  73                /* very unlikely unless something is messed up */
  74                puts("Error: Could not find TLB for FLASH BASE\n");
  75                flash_esel = 2; /* give our best effort to continue */
  76        } else {
  77                /* invalidate existing TLB entry for flash + promjet */
  78                disable_tlb(flash_esel);
  79        }
  80
  81        set_tlb(1, flashbase, CONFIG_SYS_FLASH_BASE_PHYS,
  82                MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
  83                0, flash_esel, BOOKE_PAGESZ_256M, 1);
  84
  85        /*
  86         * Adjust core voltage according to voltage ID
  87         * This function changes I2C mux to channel 2.
  88         */
  89        if (adjust_vdd(0))
  90                printf("Warning: Adjusting core voltage failed.\n");
  91        return 0;
  92}
  93
  94unsigned long get_board_sys_clk(void)
  95{
  96        return CONFIG_SYS_CLK_FREQ;
  97}
  98
  99unsigned long get_board_ddr_clk(void)
 100{
 101        return CONFIG_DDR_CLK_FREQ;
 102}
 103
 104int misc_init_r(void)
 105{
 106        u8 reg;
 107
 108        /* Reset CS4315 PHY */
 109        reg = CPLD_READ(reset_ctl);
 110        reg |= CPLD_RSTCON_EDC_RST;
 111        CPLD_WRITE(reset_ctl, reg);
 112
 113        return 0;
 114}
 115
 116int ft_board_setup(void *blob, bd_t *bd)
 117{
 118        phys_addr_t base;
 119        phys_size_t size;
 120
 121        ft_cpu_setup(blob, bd);
 122
 123        base = env_get_bootm_low();
 124        size = env_get_bootm_size();
 125
 126        fdt_fixup_memory(blob, (u64)base, (u64)size);
 127
 128#ifdef CONFIG_PCI
 129        pci_of_setup(blob, bd);
 130#endif
 131
 132        fdt_fixup_liodn(blob);
 133        fsl_fdt_fixup_dr_usb(blob, bd);
 134
 135#ifdef CONFIG_SYS_DPAA_FMAN
 136        fdt_fixup_fman_ethernet(blob);
 137        fdt_fixup_board_enet(blob);
 138#endif
 139
 140        return 0;
 141}
 142