1/* SPDX-License-Identifier: GPL-2.0+ */ 2/* 3 * Configuation settings for the Motorola MC5272C3 board. 4 * 5 * (C) Copyright 2003 Josef Baumgartner <josef.baumgartner@telex.de> 6 */ 7 8/* 9 * board/config.h - configuration options, board specific 10 */ 11 12#ifndef _M5272C3_H 13#define _M5272C3_H 14 15/* 16 * High Level Configuration Options 17 * (easy to change) 18 */ 19#define CONFIG_MCFTMR 20 21#define CONFIG_MCFUART 22#define CONFIG_SYS_UART_PORT (0) 23 24#undef CONFIG_WATCHDOG 25#define CONFIG_WATCHDOG_TIMEOUT 10000 /* timeout in milliseconds */ 26 27#undef CONFIG_MONITOR_IS_IN_RAM /* define if monitor is started from a pre-loader */ 28 29/* Configuration for environment 30 * Environment is embedded in u-boot in the second sector of the flash 31 */ 32 33#define LDS_BOARD_TEXT \ 34 . = DEFINED(env_offset) ? env_offset : .; \ 35 env/embedded.o(.text); 36 37/* 38 * BOOTP options 39 */ 40#define CONFIG_BOOTP_BOOTFILESIZE 41 42/* 43 * Command line configuration. 44 */ 45#ifdef CONFIG_MCFFEC 46# define CONFIG_MII_INIT 1 47# define CONFIG_SYS_DISCOVER_PHY 48# define CONFIG_SYS_RX_ETH_BUFFER 8 49# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN 50/* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */ 51# ifndef CONFIG_SYS_DISCOVER_PHY 52# define FECDUPLEX FULL 53# define FECSPEED _100BASET 54# else 55# ifndef CONFIG_SYS_FAULT_ECHO_LINK_DOWN 56# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN 57# endif 58# endif /* CONFIG_SYS_DISCOVER_PHY */ 59#endif 60 61#ifdef CONFIG_MCFFEC 62# define CONFIG_IPADDR 192.162.1.2 63# define CONFIG_NETMASK 255.255.255.0 64# define CONFIG_SERVERIP 192.162.1.1 65# define CONFIG_GATEWAYIP 192.162.1.1 66#endif /* CONFIG_MCFFEC */ 67 68#define CONFIG_HOSTNAME "M5272C3" 69#define CONFIG_EXTRA_ENV_SETTINGS \ 70 "netdev=eth0\0" \ 71 "loadaddr=10000\0" \ 72 "u-boot=u-boot.bin\0" \ 73 "load=tftp ${loadaddr) ${u-boot}\0" \ 74 "upd=run load; run prog\0" \ 75 "prog=prot off ffe00000 ffe3ffff;" \ 76 "era ffe00000 ffe3ffff;" \ 77 "cp.b ${loadaddr} ffe00000 ${filesize};"\ 78 "save\0" \ 79 "" 80 81#define CONFIG_SYS_LOAD_ADDR 0x20000 82#define CONFIG_SYS_MEMTEST_START 0x400 83#define CONFIG_SYS_MEMTEST_END 0x380000 84#define CONFIG_SYS_CLK 66000000 85 86/* 87 * Low Level Configuration Settings 88 * (address mappings, register initial values, etc.) 89 * You should know what you are doing if you make changes here. 90 */ 91#define CONFIG_SYS_MBAR 0x10000000 /* Register Base Addrs */ 92#define CONFIG_SYS_SCR 0x0003 93#define CONFIG_SYS_SPR 0xffff 94 95/*----------------------------------------------------------------------- 96 * Definitions for initial stack pointer and data area (in DPRAM) 97 */ 98#define CONFIG_SYS_INIT_RAM_ADDR 0x20000000 99#define CONFIG_SYS_INIT_RAM_SIZE 0x1000 /* Size of used area in internal SRAM */ 100#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 101#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET 102 103/*----------------------------------------------------------------------- 104 * Start addresses for the final memory configuration 105 * (Set up by the startup code) 106 * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 107 */ 108#define CONFIG_SYS_SDRAM_BASE 0x00000000 109#define CONFIG_SYS_SDRAM_SIZE 4 /* SDRAM size in MB */ 110#define CONFIG_SYS_FLASH_BASE 0xffe00000 111 112#ifdef CONFIG_MONITOR_IS_IN_RAM 113#define CONFIG_SYS_MONITOR_BASE 0x20000 114#else 115#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400) 116#endif 117 118#define CONFIG_SYS_MONITOR_LEN 0x20000 119#define CONFIG_SYS_MALLOC_LEN (256 << 10) 120#define CONFIG_SYS_BOOTPARAMS_LEN 64*1024 121 122/* 123 * For booting Linux, the board info and command line data 124 * have to be in the first 8 MB of memory, since this is 125 * the maximum mapped by the Linux kernel during initialization ?? 126 */ 127#define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20)) 128 129/* 130 * FLASH organization 131 */ 132#ifdef CONFIG_SYS_FLASH_CFI 133# define CONFIG_SYS_FLASH_SIZE 0x800000 /* Max size that the board might have */ 134# define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT 135# define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ 136# define CONFIG_SYS_MAX_FLASH_SECT 137 /* max number of sectors on one chip */ 137#endif 138 139/*----------------------------------------------------------------------- 140 * Cache Configuration 141 */ 142#define CONFIG_SYS_CACHELINE_SIZE 16 143 144#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ 145 CONFIG_SYS_INIT_RAM_SIZE - 8) 146#define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ 147 CONFIG_SYS_INIT_RAM_SIZE - 4) 148#define CONFIG_SYS_ICACHE_INV (CF_CACR_CINV | CF_CACR_INVI) 149#define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE | \ 150 CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \ 151 CF_ACR_EN | CF_ACR_SM_ALL) 152#define CONFIG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_CINV | \ 153 CF_CACR_DISD | CF_CACR_INVI | \ 154 CF_CACR_CEIB | CF_CACR_DCM | \ 155 CF_CACR_EUSP) 156 157/*----------------------------------------------------------------------- 158 * Memory bank definitions 159 */ 160#define CONFIG_SYS_BR0_PRELIM 0xFFE00201 161#define CONFIG_SYS_OR0_PRELIM 0xFFE00014 162#define CONFIG_SYS_BR1_PRELIM 0 163#define CONFIG_SYS_OR1_PRELIM 0 164#define CONFIG_SYS_BR2_PRELIM 0x30000001 165#define CONFIG_SYS_OR2_PRELIM 0xFFF80000 166#define CONFIG_SYS_BR3_PRELIM 0 167#define CONFIG_SYS_OR3_PRELIM 0 168#define CONFIG_SYS_BR4_PRELIM 0 169#define CONFIG_SYS_OR4_PRELIM 0 170#define CONFIG_SYS_BR5_PRELIM 0 171#define CONFIG_SYS_OR5_PRELIM 0 172#define CONFIG_SYS_BR6_PRELIM 0 173#define CONFIG_SYS_OR6_PRELIM 0 174#define CONFIG_SYS_BR7_PRELIM 0x00000701 175#define CONFIG_SYS_OR7_PRELIM 0xFFC0007C 176 177/*----------------------------------------------------------------------- 178 * Port configuration 179 */ 180#define CONFIG_SYS_PACNT 0x00000000 181#define CONFIG_SYS_PADDR 0x0000 182#define CONFIG_SYS_PADAT 0x0000 183#define CONFIG_SYS_PBCNT 0x55554155 /* Ethernet/UART configuration */ 184#define CONFIG_SYS_PBDDR 0x0000 185#define CONFIG_SYS_PBDAT 0x0000 186#define CONFIG_SYS_PDCNT 0x00000000 187#endif /* _M5272C3_H */ 188