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17#ifndef __CONFIG_H
18#define __CONFIG_H
19
20
21#define CONFIG_CPM2 1
22
23
24
25
26
27
28#define CONFIG_PCI_INDIRECT_BRIDGE
29#define CONFIG_SYS_PCI_64BIT 1
30#undef CONFIG_ETHER_ON_FCC
31#define CONFIG_ENV_OVERWRITE
32#define CONFIG_RESET_PHY_R 1
33
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46
47
48#ifndef CONFIG_SYS_CLK_FREQ
49#define CONFIG_SYS_CLK_FREQ 33000000
50#endif
51
52
53
54
55#define CONFIG_L2_CACHE
56#define CONFIG_BTB
57
58#define CONFIG_SYS_INIT_DBCR DBCR_IDM
59
60#define CONFIG_SYS_MEMTEST_START 0x00200000
61#define CONFIG_SYS_MEMTEST_END 0x00400000
62
63#define CONFIG_SYS_CCSRBAR 0xe0000000
64#define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR
65
66
67#define CONFIG_SPD_EEPROM
68#define CONFIG_DDR_SPD
69
70#define CONFIG_MEM_INIT_VALUE 0xDeadBeef
71
72#define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000
73#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
74
75#define CONFIG_DIMM_SLOTS_PER_CTLR 1
76#define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR)
77
78
79#define SPD_EEPROM_ADDRESS 0x51
80
81
82#define CONFIG_SYS_SDRAM_SIZE 128
83#define CONFIG_SYS_DDR_CS0_BNDS 0x00000007
84#define CONFIG_SYS_DDR_CS0_CONFIG 0x80000002
85#define CONFIG_SYS_DDR_TIMING_1 0x37344321
86#define CONFIG_SYS_DDR_TIMING_2 0x00000800
87#define CONFIG_SYS_DDR_CONTROL 0xc2000000
88#define CONFIG_SYS_DDR_MODE 0x00000062
89#define CONFIG_SYS_DDR_INTERVAL 0x05200100
90
91
92
93
94#define CONFIG_SYS_LBC_SDRAM_BASE 0xf0000000
95#define CONFIG_SYS_LBC_SDRAM_SIZE 64
96
97#define CONFIG_SYS_FLASH_BASE 0xff000000
98#define CONFIG_SYS_BR0_PRELIM 0xff001801
99
100#define CONFIG_SYS_OR0_PRELIM 0xff006ff7
101#define CONFIG_SYS_MAX_FLASH_BANKS 1
102#define CONFIG_SYS_MAX_FLASH_SECT 64
103#undef CONFIG_SYS_FLASH_CHECKSUM
104#define CONFIG_SYS_FLASH_ERASE_TOUT 60000
105#define CONFIG_SYS_FLASH_WRITE_TOUT 500
106
107#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
108
109#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
110#define CONFIG_SYS_RAMBOOT
111#else
112#undef CONFIG_SYS_RAMBOOT
113#endif
114
115#define CONFIG_SYS_FLASH_EMPTY_INFO
116
117#undef CONFIG_CLOCKS_IN_MHZ
118
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139
140
141#define CONFIG_SYS_BR2_PRELIM 0xf0001861
142
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156
157#define CONFIG_SYS_OR2_PRELIM 0xfc006901
158
159#define CONFIG_SYS_LBC_LCRR 0x00030004
160#define CONFIG_SYS_LBC_LBCR 0x00000000
161#define CONFIG_SYS_LBC_LSRT 0x20000000
162#define CONFIG_SYS_LBC_MRTPR 0x20000000
163
164#define CONFIG_SYS_LBC_LSDMR_COMMON ( LSDMR_BSMA1516 \
165 | LSDMR_RFCR5 \
166 | LSDMR_PRETOACT3 \
167 | LSDMR_ACTTORW3 \
168 | LSDMR_BL8 \
169 | LSDMR_WRC2 \
170 | LSDMR_CL3 \
171 | LSDMR_RFEN \
172 )
173
174
175
176
177#define CONFIG_SYS_LBC_LSDMR_1 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_PCHALL)
178#define CONFIG_SYS_LBC_LSDMR_2 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_ARFRSH)
179#define CONFIG_SYS_LBC_LSDMR_3 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_ARFRSH)
180#define CONFIG_SYS_LBC_LSDMR_4 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_MRW)
181#define CONFIG_SYS_LBC_LSDMR_5 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_NORMAL)
182
183
184
185
186#define CONFIG_SYS_BR4_PRELIM 0xf8000801
187#define CONFIG_SYS_OR4_PRELIM 0xffffe1f1
188#define CONFIG_SYS_BCSR (CONFIG_SYS_BR4_PRELIM & 0xffff8000)
189
190#define CONFIG_SYS_INIT_RAM_LOCK 1
191#define CONFIG_SYS_INIT_RAM_ADDR 0xe4010000
192#define CONFIG_SYS_INIT_RAM_SIZE 0x4000
193
194#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
195#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
196
197#define CONFIG_SYS_MONITOR_LEN (256 * 1024)
198#define CONFIG_SYS_MALLOC_LEN (128 * 1024)
199
200
201#define CONFIG_CONS_ON_SCC
202#undef CONFIG_CONS_NONE
203
204#define CONFIG_SYS_BAUDRATE_TABLE \
205 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400,115200}
206
207
208
209
210#define CONFIG_SYS_I2C
211#define CONFIG_SYS_I2C_FSL
212#define CONFIG_SYS_FSL_I2C_SPEED 400000
213#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
214#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000
215#define CONFIG_SYS_I2C_NOPROBES { {0, 0x69} }
216
217
218#define CONFIG_SYS_RIO_MEM_VIRT 0xc0000000
219#define CONFIG_SYS_RIO_MEM_BUS 0xc0000000
220#define CONFIG_SYS_RIO_MEM_PHYS 0xc0000000
221#define CONFIG_SYS_RIO_MEM_SIZE 0x20000000
222
223
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225
226
227#define CONFIG_SYS_PCI1_MEM_VIRT 0x80000000
228#define CONFIG_SYS_PCI1_MEM_BUS 0x80000000
229#define CONFIG_SYS_PCI1_MEM_PHYS 0x80000000
230#define CONFIG_SYS_PCI1_MEM_SIZE 0x20000000
231#define CONFIG_SYS_PCI1_IO_VIRT 0xe2000000
232#define CONFIG_SYS_PCI1_IO_BUS 0x00000000
233#define CONFIG_SYS_PCI1_IO_PHYS 0xe2000000
234#define CONFIG_SYS_PCI1_IO_SIZE 0x100000
235
236#if defined(CONFIG_PCI)
237#undef CONFIG_EEPRO100
238#undef CONFIG_TULIP
239
240#if !defined(CONFIG_PCI_PNP)
241 #define PCI_ENET0_IOADDR 0xe0000000
242 #define PCI_ENET0_MEMADDR 0xe0000000
243 #define PCI_IDSEL_NUMBER 0x0c
244#endif
245
246#undef CONFIG_PCI_SCAN_SHOW
247#define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x1057
248
249#endif
250
251#ifdef CONFIG_TSEC_ENET
252
253#define CONFIG_TSEC1 1
254#define CONFIG_TSEC1_NAME "TSEC0"
255#define CONFIG_TSEC2 1
256#define CONFIG_TSEC2_NAME "TSEC1"
257#define TSEC1_PHY_ADDR 0
258#define TSEC2_PHY_ADDR 1
259#define TSEC1_PHYIDX 0
260#define TSEC2_PHYIDX 0
261#define TSEC1_FLAGS TSEC_GIGABIT
262#define TSEC2_FLAGS TSEC_GIGABIT
263
264
265#define CONFIG_ETHPRIME "TSEC0"
266
267#endif
268
269#ifdef CONFIG_ETHER_ON_FCC
270
271#undef CONFIG_ETHER_NONE
272#define CONFIG_ETHER_INDEX 2
273
274#if (CONFIG_ETHER_INDEX == 2)
275
276
277
278
279
280
281 #define CONFIG_SYS_CMXFCR_MASK2 (CMXFCR_FC2 | CMXFCR_RF2CS_MSK | CMXFCR_TF2CS_MSK)
282 #define CONFIG_SYS_CMXFCR_VALUE2 (CMXFCR_RF2CS_CLK13 | CMXFCR_TF2CS_CLK14)
283 #define CONFIG_SYS_CPMFCR_RAMTYPE 0
284 #define CONFIG_SYS_FCC_PSMR (FCC_PSMR_FDE)
285 #define FETH2_RST 0x01
286#elif (CONFIG_ETHER_INDEX == 3)
287
288 #define FETH3_RST 0x80
289#endif
290
291#define CONFIG_BITBANGMII
292
293
294
295
296#define MDIO_PORT 2
297#define MDIO_DECLARE volatile ioport_t *iop = ioport_addr ( \
298 (immap_t *) CONFIG_SYS_IMMR, MDIO_PORT )
299#define MDC_DECLARE MDIO_DECLARE
300
301#define MDIO_ACTIVE (iop->pdir |= 0x00400000)
302#define MDIO_TRISTATE (iop->pdir &= ~0x00400000)
303#define MDIO_READ ((iop->pdat & 0x00400000) != 0)
304
305#define MDIO(bit) if(bit) iop->pdat |= 0x00400000; \
306 else iop->pdat &= ~0x00400000
307
308#define MDC(bit) if(bit) iop->pdat |= 0x00200000; \
309 else iop->pdat &= ~0x00200000
310
311#define MIIDELAY udelay(1)
312
313#endif
314
315
316
317
318
319#define CONFIG_LOADS_ECHO 1
320#define CONFIG_SYS_LOADS_BAUD_CHANGE 1
321
322
323
324
325#define CONFIG_BOOTP_BOOTFILESIZE
326
327#undef CONFIG_WATCHDOG
328
329
330
331
332#define CONFIG_SYS_LOAD_ADDR 0x1000000
333
334#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
335
336
337
338
339
340
341#define CONFIG_SYS_BOOTMAPSZ (64 << 20)
342#define CONFIG_SYS_BOOTM_LEN (64 << 20)
343
344#if defined(CONFIG_CMD_KGDB)
345#define CONFIG_KGDB_BAUDRATE 230400
346#endif
347
348
349
350
351#if defined(CONFIG_TSEC_ENET) || defined(CONFIG_ETHER_ON_FCC)
352#define CONFIG_HAS_ETH0
353#define CONFIG_HAS_ETH1
354#define CONFIG_HAS_ETH2
355#define CONFIG_HAS_ETH3
356#endif
357
358#define CONFIG_IPADDR 192.168.1.253
359
360#define CONFIG_HOSTNAME "unknown"
361#define CONFIG_ROOTPATH "/nfsroot"
362#define CONFIG_BOOTFILE "your.uImage"
363
364#define CONFIG_SERVERIP 192.168.1.1
365#define CONFIG_GATEWAYIP 192.168.1.1
366#define CONFIG_NETMASK 255.255.255.0
367
368#define CONFIG_LOADADDR 200000
369
370#define CONFIG_EXTRA_ENV_SETTINGS \
371 "netdev=eth0\0" \
372 "consoledev=ttyCPM\0" \
373 "ramdiskaddr=1000000\0" \
374 "ramdiskfile=your.ramdisk.u-boot\0" \
375 "fdtaddr=400000\0" \
376 "fdtfile=mpc8560ads.dtb\0"
377
378#define CONFIG_NFSBOOTCOMMAND \
379 "setenv bootargs root=/dev/nfs rw " \
380 "nfsroot=$serverip:$rootpath " \
381 "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \
382 "console=$consoledev,$baudrate $othbootargs;" \
383 "tftp $loadaddr $bootfile;" \
384 "tftp $fdtaddr $fdtfile;" \
385 "bootm $loadaddr - $fdtaddr"
386
387#define CONFIG_RAMBOOTCOMMAND \
388 "setenv bootargs root=/dev/ram rw " \
389 "console=$consoledev,$baudrate $othbootargs;" \
390 "tftp $ramdiskaddr $ramdiskfile;" \
391 "tftp $loadaddr $bootfile;" \
392 "tftp $fdtaddr $fdtfile;" \
393 "bootm $loadaddr $ramdiskaddr $fdtaddr"
394
395#define CONFIG_BOOTCOMMAND CONFIG_NFSBOOTCOMMAND
396
397#endif
398