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12#ifndef __CONFIG_H
13#define __CONFIG_H
14
15
16
17
18
19#include <asm/arch/cpu.h>
20#include <asm/arch/omap.h>
21
22
23#define V_OSCK 26000000
24#define V_SCLK (V_OSCK >> 1)
25
26#define CONFIG_CMDLINE_TAG 1
27#define CONFIG_SETUP_MEMORY_TAGS 1
28#define CONFIG_INITRD_TAG 1
29#define CONFIG_REVISION_TAG 1
30
31
32
33
34#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10))
35
36
37
38
39#define CONFIG_SYS_CS0_SIZE (256 * 1024 * 1024)
40
41
42
43
44
45
46
47
48#define V_NS16550_CLK 48000000
49
50#define CONFIG_SYS_NS16550_SERIAL
51#define CONFIG_SYS_NS16550_REG_SIZE (-4)
52#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
53
54
55
56
57#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
58
59
60#define CONFIG_ENV_OVERWRITE
61#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
62 115200}
63
64
65
66
67
68
69
70#ifdef CONFIG_USB_AM35X
71#ifdef CONFIG_USB_MUSB_UDC
72
73#define CONFIG_USB_DEVICE 1
74#define CONFIG_USB_TTY 1
75
76#define CONFIG_USBD_VENDORID 0x0451
77#define CONFIG_USBD_PRODUCTID 0x5678
78#define CONFIG_USBD_MANUFACTURER "Texas Instruments"
79#define CONFIG_USBD_PRODUCT_NAME "AM3517CRANE"
80#endif
81
82#endif
83
84#define CONFIG_SYS_I2C
85
86
87
88
89#define CONFIG_SYS_NAND_BASE NAND_BASE
90
91
92
93#define CONFIG_SYS_MAX_NAND_DEVICE 1
94
95
96#define CONFIG_JFFS2_NAND
97
98#define CONFIG_JFFS2_DEV "nand0"
99
100#define CONFIG_JFFS2_PART_OFFSET 0x680000
101#define CONFIG_JFFS2_PART_SIZE 0xf980000
102
103
104
105#define CONFIG_BOOTFILE "uImage"
106
107#define CONFIG_EXTRA_ENV_SETTINGS \
108 "loadaddr=0x82000000\0" \
109 "console=ttyS2,115200n8\0" \
110 "mmcdev=0\0" \
111 "mmcargs=setenv bootargs console=${console} " \
112 "root=/dev/mmcblk0p2 rw " \
113 "rootfstype=ext3 rootwait\0" \
114 "nandargs=setenv bootargs console=${console} " \
115 "root=/dev/mtdblock4 rw " \
116 "rootfstype=jffs2\0" \
117 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
118 "bootscript=echo Running bootscript from mmc ...; " \
119 "source ${loadaddr}\0" \
120 "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
121 "mmcboot=echo Booting from mmc ...; " \
122 "run mmcargs; " \
123 "bootm ${loadaddr}\0" \
124 "nandboot=echo Booting from nand ...; " \
125 "run nandargs; " \
126 "nand read ${loadaddr} 280000 400000; " \
127 "bootm ${loadaddr}\0" \
128
129#define CONFIG_BOOTCOMMAND \
130 "mmc dev ${mmcdev}; if mmc rescan; then " \
131 "if run loadbootscript; then " \
132 "run bootscript; " \
133 "else " \
134 "if run loaduimage; then " \
135 "run mmcboot; " \
136 "else run nandboot; " \
137 "fi; " \
138 "fi; " \
139 "else run nandboot; fi"
140
141
142
143
144#define CONFIG_SYS_CBSIZE 512
145#define CONFIG_SYS_MAXARGS 32
146
147
148#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
149#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
150 0x01F00000)
151
152#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0)
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156
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158
159
160#define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2
161#define CONFIG_SYS_PTV 2
162
163
164
165
166#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
167#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
168
169
170
171
172
173
174#define CONFIG_SYS_MAX_FLASH_SECT 520
175
176#define CONFIG_SYS_MAX_FLASH_BANKS 2
177#define CONFIG_SYS_MONITOR_LEN (256 << 10)
178
179#define CONFIG_SYS_FLASH_BASE NAND_BASE
180
181
182#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
183
184#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10)
185
186
187
188
189
190#define CONFIG_SYS_FLASH_ERASE_TOUT (100 * CONFIG_SYS_HZ)
191#define CONFIG_SYS_FLASH_WRITE_TOUT (100 * CONFIG_SYS_HZ)
192
193
194#define CONFIG_SYS_MAX_MTD_BANKS (CONFIG_SYS_MAX_FLASH_BANKS + \
195 CONFIG_SYS_MAX_NAND_DEVICE)
196#define CONFIG_SYS_JFFS2_MEM_NAND
197
198#define CONFIG_SYS_JFFS2_FIRST_BANK CONFIG_SYS_MAX_FLASH_BANKS
199#define CONFIG_SYS_JFFS2_NUM_BANKS 1
200
201#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
202#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
203#define CONFIG_SYS_INIT_RAM_SIZE 0x800
204#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
205 CONFIG_SYS_INIT_RAM_SIZE - \
206 GENERATED_GBL_DATA_SIZE)
207
208
209#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \
210 CONFIG_SPL_TEXT_BASE)
211
212#define CONFIG_SPL_BSS_START_ADDR 0x80000000
213#define CONFIG_SPL_BSS_MAX_SIZE 0x80000
214
215#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
216#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
217
218#define CONFIG_SPL_NAND_BASE
219#define CONFIG_SPL_NAND_DRIVERS
220#define CONFIG_SPL_NAND_ECC
221
222
223#define CONFIG_SYS_NAND_5_ADDR_CYCLE
224#define CONFIG_SYS_NAND_PAGE_COUNT 64
225#define CONFIG_SYS_NAND_PAGE_SIZE 2048
226#define CONFIG_SYS_NAND_OOBSIZE 64
227#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
228#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
229#define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\
230 10, 11, 12, 13}
231#define CONFIG_SYS_NAND_ECCSIZE 512
232#define CONFIG_SYS_NAND_ECCBYTES 3
233#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_HW
234#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
235#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
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237
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240
241
242
243#define CONFIG_SYS_SPL_MALLOC_START 0x80208000
244#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
245
246#endif
247