1/* SPDX-License-Identifier: GPL-2.0+ */ 2/* 3 * Configuation settings for the Sentec Cobra Board. 4 * 5 * (C) Copyright 2003 Josef Baumgartner <josef.baumgartner@telex.de> 6 */ 7 8/* --- 9 * Version: U-Boot 1.0.0 - initial release for Sentec COBRA5272 board 10 * Date: 2004-03-29 11 * Author: Florian Schlote 12 * 13 * For a description of configuration options please refer also to the 14 * general u-boot-1.x.x/README file 15 * --- 16 */ 17 18/* --- 19 * board/config.h - configuration options, board specific 20 * --- 21 */ 22 23#ifndef _CONFIG_COBRA5272_H 24#define _CONFIG_COBRA5272_H 25 26/* --- 27 * Defines processor clock - important for correct timings concerning serial 28 * interface etc. 29 * --- 30 */ 31 32#define CONFIG_SYS_CLK 66000000 33#define CONFIG_SYS_SDRAM_SIZE 16 /* SDRAM size in MB */ 34 35/* Enable Dma Timer */ 36#define CONFIG_MCFTMR 37 38/* --- 39 * Define baudrate for UART1 (console output, tftp, ...) 40 * default value of CONFIG_BAUDRATE for Sentec board: 19200 baud 41 * CONFIG_SYS_BAUDRATE_TABLE defines values that can be selected in u-boot command 42 * interface 43 * --- 44 */ 45 46#define CONFIG_MCFUART 47#define CONFIG_SYS_UART_PORT (0) 48 49/* --- 50 * set "#if 0" to "#if 1" if (Hardware)-WATCHDOG should be enabled & change 51 * timeout acc. to your needs 52 * #define CONFIG_WATCHDOG_TIMEOUT x , x is timeout in milliseconds, e. g. 10000 53 * for 10 sec 54 * --- 55 */ 56 57#if 0 58#define CONFIG_WATCHDOG 59#define CONFIG_WATCHDOG_TIMEOUT 10000 /* timeout in milliseconds */ 60#endif 61 62/* --- 63 * CONFIG_MONITOR_IS_IN_RAM defines if u-boot is started from a different 64 * bootloader residing in flash ('chainloading'); if you want to use 65 * chainloading or want to compile a u-boot binary that can be loaded into 66 * RAM via BDM set 67 * "#if 0" to "#if 1" 68 * You will need a first stage bootloader then, e. g. colilo or a working BDM 69 * cable (Background Debug Mode) 70 * 71 * Setting #if 0: u-boot will start from flash and relocate itself to RAM 72 * 73 * Please do not forget to modify the setting of CONFIG_SYS_TEXT_BASE 74 * in board/cobra5272/config.mk accordingly (#if 0: 0xffe00000; #if 1: 0x20000) 75 * 76 * --- 77 */ 78 79#if 0 80#define CONFIG_MONITOR_IS_IN_RAM /* monitor is started from a preloader */ 81#endif 82 83/* --- 84 * Configuration for environment 85 * Environment is embedded in u-boot in the second sector of the flash 86 * --- 87 */ 88 89#define LDS_BOARD_TEXT \ 90 . = DEFINED(env_offset) ? env_offset : .; \ 91 env/embedded.o(.text); 92 93/* 94 * BOOTP options 95 */ 96#define CONFIG_BOOTP_BOOTFILESIZE 97 98/* 99 * Command line configuration. 100 */ 101 102#ifdef CONFIG_MCFFEC 103# define CONFIG_MII_INIT 1 104# define CONFIG_SYS_DISCOVER_PHY 105# define CONFIG_SYS_RX_ETH_BUFFER 8 106# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN 107/* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */ 108# ifndef CONFIG_SYS_DISCOVER_PHY 109# define FECDUPLEX FULL 110# define FECSPEED _100BASET 111# else 112# ifndef CONFIG_SYS_FAULT_ECHO_LINK_DOWN 113# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN 114# endif 115# endif /* CONFIG_SYS_DISCOVER_PHY */ 116#endif 117 118/* 119 *----------------------------------------------------------------------------- 120 * Define user parameters that have to be customized most likely 121 *----------------------------------------------------------------------------- 122 */ 123 124/*AUTOBOOT settings - booting images automatically by u-boot after power on*/ 125 126/* The following settings will be contained in the environment block ; if you 127want to use a neutral environment all those settings can be manually set in 128u-boot: 'set' command */ 129 130#if 0 131 132#define CONFIG_BOOTCOMMAND "bootm 0xffe80000" /*Autoboto command, please 133enter a valid image address in flash */ 134 135/* User network settings */ 136 137#define CONFIG_IPADDR 192.168.100.2 /* default board IP address */ 138#define CONFIG_SERVERIP 192.168.100.1 /* default tftp server IP address */ 139 140#endif 141 142#define CONFIG_SYS_LOAD_ADDR 0x20000 /*Defines default RAM address 143from which user programs will be started */ 144 145/*---*/ 146 147/* 148 *----------------------------------------------------------------------------- 149 * End of user parameters to be customized 150 *----------------------------------------------------------------------------- 151 */ 152 153/* --- 154 * Defines memory range for test 155 * --- 156 */ 157 158#define CONFIG_SYS_MEMTEST_START 0x400 159#define CONFIG_SYS_MEMTEST_END 0x380000 160 161/* --- 162 * Low Level Configuration Settings 163 * (address mappings, register initial values, etc.) 164 * You should know what you are doing if you make changes here. 165 * --- 166 */ 167 168/* --- 169 * Base register address 170 * --- 171 */ 172 173#define CONFIG_SYS_MBAR 0x10000000 /* Register Base Addrs */ 174 175/* --- 176 * System Conf. Reg. & System Protection Reg. 177 * --- 178 */ 179 180#define CONFIG_SYS_SCR 0x0003 181#define CONFIG_SYS_SPR 0xffff 182 183/* --- 184 * Ethernet settings 185 * --- 186 */ 187 188#define CONFIG_SYS_DISCOVER_PHY 189#define CONFIG_SYS_ENET_BD_BASE 0x780000 190 191/*----------------------------------------------------------------------- 192 * Definitions for initial stack pointer and data area (in internal SRAM) 193 */ 194#define CONFIG_SYS_INIT_RAM_ADDR 0x20000000 195#define CONFIG_SYS_INIT_RAM_SIZE 0x1000 /* Size of used area in internal SRAM */ 196#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 197#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET 198 199/*----------------------------------------------------------------------- 200 * Start addresses for the final memory configuration 201 * (Set up by the startup code) 202 * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 203 */ 204#define CONFIG_SYS_SDRAM_BASE 0x00000000 205 206/* 207 *------------------------------------------------------------------------- 208 * RAM SIZE (is defined above) 209 *----------------------------------------------------------------------- 210 */ 211 212/* #define CONFIG_SYS_SDRAM_SIZE 16 */ 213 214/* 215 *----------------------------------------------------------------------- 216 */ 217 218#define CONFIG_SYS_FLASH_BASE 0xffe00000 219 220#ifdef CONFIG_MONITOR_IS_IN_RAM 221#define CONFIG_SYS_MONITOR_BASE 0x20000 222#else 223#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400) 224#endif 225 226#define CONFIG_SYS_MONITOR_LEN 0x20000 227#define CONFIG_SYS_MALLOC_LEN (256 << 10) 228#define CONFIG_SYS_BOOTPARAMS_LEN 64*1024 229 230/* 231 * For booting Linux, the board info and command line data 232 * have to be in the first 8 MB of memory, since this is 233 * the maximum mapped by the Linux kernel during initialization ?? 234 */ 235#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ 236 237/*----------------------------------------------------------------------- 238 * FLASH organization 239 */ 240#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ 241#define CONFIG_SYS_MAX_FLASH_SECT 11 /* max number of sectors on one chip */ 242#define CONFIG_SYS_FLASH_ERASE_TOUT 1000 /* flash timeout */ 243 244/*----------------------------------------------------------------------- 245 * Cache Configuration 246 */ 247#define CONFIG_SYS_CACHELINE_SIZE 16 248 249#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ 250 CONFIG_SYS_INIT_RAM_SIZE - 8) 251#define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ 252 CONFIG_SYS_INIT_RAM_SIZE - 4) 253#define CONFIG_SYS_ICACHE_INV (CF_CACR_CINV | CF_CACR_INVI) 254#define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE | \ 255 CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \ 256 CF_ACR_EN | CF_ACR_SM_ALL) 257#define CONFIG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_CINV | \ 258 CF_CACR_DISD | CF_CACR_INVI | \ 259 CF_CACR_CEIB | CF_CACR_DCM | \ 260 CF_CACR_EUSP) 261 262/*----------------------------------------------------------------------- 263 * Memory bank definitions 264 * 265 * Please refer also to Motorola Coldfire user manual - Chapter XXX 266 * <http://e-www.motorola.com/files/dsp/doc/ref_manual/MCF5272UM.pdf> 267 */ 268#define CONFIG_SYS_BR0_PRELIM 0xFFE00201 269#define CONFIG_SYS_OR0_PRELIM 0xFFE00014 270 271#define CONFIG_SYS_BR1_PRELIM 0 272#define CONFIG_SYS_OR1_PRELIM 0 273 274#define CONFIG_SYS_BR2_PRELIM 0 275#define CONFIG_SYS_OR2_PRELIM 0 276 277#define CONFIG_SYS_BR3_PRELIM 0 278#define CONFIG_SYS_OR3_PRELIM 0 279 280#define CONFIG_SYS_BR4_PRELIM 0 281#define CONFIG_SYS_OR4_PRELIM 0 282 283#define CONFIG_SYS_BR5_PRELIM 0 284#define CONFIG_SYS_OR5_PRELIM 0 285 286#define CONFIG_SYS_BR6_PRELIM 0 287#define CONFIG_SYS_OR6_PRELIM 0 288 289#define CONFIG_SYS_BR7_PRELIM 0x00000701 290#define CONFIG_SYS_OR7_PRELIM 0xFF00007C 291 292/*----------------------------------------------------------------------- 293 * LED config 294 */ 295#define LED_STAT_0 0xffff /*all LEDs off*/ 296#define LED_STAT_1 0xfffe 297#define LED_STAT_2 0xfffd 298#define LED_STAT_3 0xfffb 299#define LED_STAT_4 0xfff7 300#define LED_STAT_5 0xffef 301#define LED_STAT_6 0xffdf 302#define LED_STAT_7 0xff00 /*all LEDs on*/ 303 304/*----------------------------------------------------------------------- 305 * Port configuration (GPIO) 306 */ 307#define CONFIG_SYS_PACNT 0x00000000 /* PortA control reg.: All pins are external 308GPIO*/ 309#define CONFIG_SYS_PADDR 0x00FF /* PortA direction reg.: PA7 to PA0 are outputs 310(1^=output, 0^=input) */ 311#define CONFIG_SYS_PADAT LED_STAT_0 /* PortA value reg.: Turn all LED off */ 312#define CONFIG_SYS_PBCNT 0x55554155 /* PortB control reg.: Ethernet/UART 313configuration */ 314#define CONFIG_SYS_PBDDR 0x0000 /* PortB direction: All pins configured as inputs */ 315#define CONFIG_SYS_PBDAT 0x0000 /* PortB value reg. */ 316#define CONFIG_SYS_PDCNT 0x00000000 /* PortD control reg. */ 317 318#endif /* _CONFIG_COBRA5272_H */ 319