uboot/include/configs/picosam9g45.h
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   1/* SPDX-License-Identifier: GPL-2.0+ */
   2/*
   3 * Configuration settings for the mini-box PICOSAM9G45 board.
   4 * (C) Copyright 2015 Inter Act B.V.
   5 *
   6 * Based on:
   7 * U-Boot file: include/configs/at91sam9m10g45ek.h
   8 * (C) Copyright 2007-2008
   9 * Stelian Pop <stelian@popies.net>
  10 * Lead Tech Design <www.leadtechdesign.com>
  11 */
  12
  13#ifndef __CONFIG_H
  14#define __CONFIG_H
  15
  16#include <asm/hardware.h>
  17
  18#define CONFIG_ATMEL_LEGACY             /* required until (g)pio is fixed */
  19
  20/* ARM asynchronous clock */
  21#define CONFIG_SYS_AT91_SLOW_CLOCK      32768
  22#define CONFIG_SYS_AT91_MAIN_CLOCK      12000000 /* from 12 MHz crystal */
  23
  24#define CONFIG_CMDLINE_TAG              /* enable passing of ATAGs      */
  25#define CONFIG_SETUP_MEMORY_TAGS
  26#define CONFIG_INITRD_TAG
  27#define CONFIG_SKIP_LOWLEVEL_INIT
  28
  29/* general purpose I/O */
  30#define CONFIG_ATMEL_LEGACY             /* required until (g)pio is fixed */
  31#define CONFIG_AT91_GPIO
  32#define CONFIG_AT91_GPIO_PULLUP 1       /* keep pullups on peripheral pins */
  33
  34/* serial console */
  35#define CONFIG_ATMEL_USART
  36#define CONFIG_USART_BASE               ATMEL_BASE_DBGU
  37#define CONFIG_USART_ID                 ATMEL_ID_SYS
  38
  39/* LCD */
  40#define LCD_BPP                         LCD_COLOR8
  41#define CONFIG_LCD_LOGO
  42#undef LCD_TEST_PATTERN
  43#define CONFIG_LCD_INFO
  44#define CONFIG_LCD_INFO_BELOW_LOGO
  45#define CONFIG_ATMEL_LCD
  46#define CONFIG_ATMEL_LCD_RGB565
  47/* board specific(not enough SRAM) */
  48#define CONFIG_AT91SAM9G45_LCD_BASE             0x23E00000
  49
  50/* LED */
  51#define CONFIG_AT91_LED
  52#define CONFIG_GREEN_LED        AT91_PIN_PD31   /* this is the user1 led */
  53
  54
  55/*
  56 * BOOTP options
  57 */
  58#define CONFIG_BOOTP_BOOTFILESIZE
  59
  60/*
  61 * Command line configuration.
  62 */
  63
  64/* SDRAM */
  65#define PHYS_SDRAM_1            ATMEL_BASE_CS1  /* on DDRSDRC1 */
  66#define PHYS_SDRAM_1_SIZE       0x08000000      /* 128 MB */
  67#define PHYS_SDRAM_2            ATMEL_BASE_CS6  /* on DDRSDRC0 */
  68#define PHYS_SDRAM_2_SIZE       0x08000000      /* 128 MB */
  69#define CONFIG_SYS_SDRAM_BASE   PHYS_SDRAM_1
  70
  71#define CONFIG_SYS_INIT_SP_ADDR \
  72        (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE)
  73
  74/* MMC */
  75
  76#ifdef CONFIG_CMD_MMC
  77#define CONFIG_GENERIC_ATMEL_MCI
  78#endif
  79
  80/* Ethernet */
  81#define CONFIG_MACB
  82#define CONFIG_RMII
  83#define CONFIG_NET_RETRY_COUNT          20
  84#define CONFIG_RESET_PHY_R
  85#define CONFIG_AT91_WANTS_COMMON_PHY
  86
  87#define CONFIG_SYS_LOAD_ADDR            0x22000000      /* load address */
  88
  89#define CONFIG_SYS_MEMTEST_START        CONFIG_SYS_SDRAM_BASE
  90#define CONFIG_SYS_MEMTEST_END          0x23e00000
  91
  92#ifdef CONFIG_SYS_USE_MMC
  93/* bootstrap + u-boot + env + linux in mmc */
  94
  95#define CONFIG_BOOTCOMMAND      "fatload mmc 0:1 0x21000000 dtb; " \
  96                                "fatload mmc 0:1 0x22000000 zImage; " \
  97                                "bootz 0x22000000 - 0x21000000"
  98#endif
  99
 100/*
 101 * Size of malloc() pool
 102 */
 103#define CONFIG_SYS_MALLOC_LEN   ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)
 104
 105/* Defines for SPL */
 106#define CONFIG_SPL_MAX_SIZE             0x010000
 107#define CONFIG_SPL_STACK                0x310000
 108
 109#define CONFIG_SYS_MONITOR_LEN          0x80000
 110
 111#ifdef CONFIG_SYS_USE_MMC
 112
 113#define CONFIG_SPL_BSS_START_ADDR       0x20000000
 114#define CONFIG_SPL_BSS_MAX_SIZE         0x00080000
 115#define CONFIG_SYS_SPL_MALLOC_START     0x20080000
 116#define CONFIG_SYS_SPL_MALLOC_SIZE      0x00080000
 117
 118#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION      1
 119#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME         "u-boot.img"
 120
 121#define CONFIG_SPL_ATMEL_SIZE
 122#define CONFIG_SYS_MASTER_CLOCK         132096000
 123#define CONFIG_SYS_AT91_PLLA            0x20c73f03
 124#define CONFIG_SYS_MCKR                 0x1301
 125#define CONFIG_SYS_MCKR_CSS             0x1302
 126
 127#endif
 128#endif
 129