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16
17#ifndef __CONFIG_H
18#define __CONFIG_H
19
20
21
22
23#define CONFIG_E300 1
24
25
26#undef CONFIG_MPC83XX_PCI2
27
28#undef CONFIG_SYS_DRAM_TEST
29#define CONFIG_SYS_MEMTEST_START 0x00000000
30#define CONFIG_SYS_MEMTEST_END 0x00100000
31
32
33
34
35#define CONFIG_DDR_ECC
36#define CONFIG_DDR_ECC_CMD
37#define CONFIG_SPD_EEPROM
38#define SPD_EEPROM_ADDRESS 0x54
39#define CONFIG_SYS_READ_SPD vme8349_read_spd
40#define CONFIG_SYS_83XX_DDR_USES_CS0
41
42
43
44
45
46
47
48
49
50
51
52#undef CONFIG_DDR_32BIT
53
54#define CONFIG_SYS_SDRAM_BASE 0x00000000
55#define CONFIG_SYS_DDR_SDRAM_CLK_CNTL (DDR_SDRAM_CLK_CNTL_SS_EN \
56 | DDR_SDRAM_CLK_CNTL_CLK_ADJUST_075)
57#define CONFIG_DDR_2T_TIMING
58#define CONFIG_SYS_DDRCDR (DDRCDR_DHC_EN \
59 | DDRCDR_ODT \
60 | DDRCDR_Q_DRN)
61
62
63
64
65
66#define CONFIG_SYS_FLASH_BASE 0xf8000000
67#define CONFIG_SYS_FLASH_SIZE 128
68
69
70#define CONFIG_SYS_WINDOW1_BASE 0xf0000000
71
72
73#define CONFIG_SYS_MAX_FLASH_BANKS 1
74#define CONFIG_SYS_MAX_FLASH_SECT 1024
75
76#undef CONFIG_SYS_FLASH_CHECKSUM
77#define CONFIG_SYS_FLASH_ERASE_TOUT 60000
78#define CONFIG_SYS_FLASH_WRITE_TOUT 500
79
80#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
81
82#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
83#define CONFIG_SYS_RAMBOOT
84#else
85#undef CONFIG_SYS_RAMBOOT
86#endif
87
88#define CONFIG_SYS_INIT_RAM_LOCK 1
89#define CONFIG_SYS_INIT_RAM_ADDR 0xF7000000
90#define CONFIG_SYS_INIT_RAM_SIZE 0x1000
91
92#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \
93 GENERATED_GBL_DATA_SIZE)
94#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
95
96#define CONFIG_SYS_MONITOR_LEN (256 * 1024)
97#define CONFIG_SYS_MALLOC_LEN (256 * 1024)
98
99#undef CONFIG_SYS_LB_SDRAM
100
101
102
103
104#define CONFIG_SYS_NS16550_SERIAL
105#define CONFIG_SYS_NS16550_REG_SIZE 1
106#define CONFIG_SYS_NS16550_CLK get_bus_freq(0)
107
108#define CONFIG_SYS_BAUDRATE_TABLE \
109 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 115200}
110
111#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_IMMR + 0x4500)
112#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_IMMR + 0x4600)
113
114
115#define CONFIG_SYS_I2C
116#define CONFIG_SYS_I2C_FSL
117#define CONFIG_SYS_FSL_I2C_SPEED 400000
118#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
119#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000
120#define CONFIG_SYS_FSL_I2C2_SPEED 400000
121#define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F
122#define CONFIG_SYS_FSL_I2C2_OFFSET 0x3100
123#define CONFIG_SYS_I2C_NOPROBES { {0, 0x69} }
124
125
126#define CONFIG_SYS_I2C_8574_ADDR2 0x20
127
128
129#define CONFIG_SYS_TSEC1_OFFSET 0x24000
130#define CONFIG_SYS_TSEC1 (CONFIG_SYS_IMMR + CONFIG_SYS_TSEC1_OFFSET)
131#define CONFIG_SYS_TSEC2_OFFSET 0x25000
132#define CONFIG_SYS_TSEC2 (CONFIG_SYS_IMMR + CONFIG_SYS_TSEC2_OFFSET)
133
134
135
136
137
138#define CONFIG_SYS_PCI1_MEM_BASE 0x80000000
139#define CONFIG_SYS_PCI1_MEM_PHYS CONFIG_SYS_PCI1_MEM_BASE
140#define CONFIG_SYS_PCI1_MEM_SIZE 0x10000000
141#define CONFIG_SYS_PCI1_MMIO_BASE 0x90000000
142#define CONFIG_SYS_PCI1_MMIO_PHYS CONFIG_SYS_PCI1_MMIO_BASE
143#define CONFIG_SYS_PCI1_MMIO_SIZE 0x10000000
144#define CONFIG_SYS_PCI1_IO_BASE 0x00000000
145#define CONFIG_SYS_PCI1_IO_PHYS 0xE2000000
146#define CONFIG_SYS_PCI1_IO_SIZE 0x00100000
147
148#define CONFIG_SYS_PCI2_MEM_BASE 0xA0000000
149#define CONFIG_SYS_PCI2_MEM_PHYS CONFIG_SYS_PCI2_MEM_BASE
150#define CONFIG_SYS_PCI2_MEM_SIZE 0x10000000
151#define CONFIG_SYS_PCI2_MMIO_BASE 0xB0000000
152#define CONFIG_SYS_PCI2_MMIO_PHYS CONFIG_SYS_PCI2_MMIO_BASE
153#define CONFIG_SYS_PCI2_MMIO_SIZE 0x10000000
154#define CONFIG_SYS_PCI2_IO_BASE 0x00000000
155#define CONFIG_SYS_PCI2_IO_PHYS 0xE2100000
156#define CONFIG_SYS_PCI2_IO_SIZE 0x00100000
157
158#if defined(CONFIG_PCI)
159
160#undef CONFIG_EEPRO100
161#undef CONFIG_TULIP
162
163#if !defined(CONFIG_PCI_PNP)
164 #define PCI_ENET0_IOADDR 0xFIXME
165 #define PCI_ENET0_MEMADDR 0xFIXME
166 #define PCI_IDSEL_NUMBER 0xFIXME
167#endif
168
169#define CONFIG_PCI_SCAN_SHOW
170#define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x1957
171
172#endif
173
174
175
176
177
178#if defined(CONFIG_TSEC_ENET)
179
180#define CONFIG_GMII
181#define CONFIG_TSEC1
182#define CONFIG_TSEC1_NAME "TSEC0"
183#define CONFIG_TSEC2
184#define CONFIG_TSEC2_NAME "TSEC1"
185#define CONFIG_PHY_M88E1111
186#define TSEC1_PHY_ADDR 0x08
187#define TSEC2_PHY_ADDR 0x10
188#define TSEC1_PHYIDX 0
189#define TSEC2_PHYIDX 0
190#define TSEC1_FLAGS TSEC_GIGABIT
191#define TSEC2_FLAGS TSEC_GIGABIT
192
193
194#define CONFIG_ETHPRIME "TSEC0"
195
196#endif
197
198
199
200
201#ifndef CONFIG_SYS_RAMBOOT
202
203#endif
204
205#define CONFIG_LOADS_ECHO
206#define CONFIG_SYS_LOADS_BAUD_CHANGE
207
208
209
210
211#define CONFIG_BOOTP_BOOTFILESIZE
212
213
214
215
216#define CONFIG_SYS_RTC_BUS_NUM 0x01
217#define CONFIG_SYS_I2C_RTC_ADDR 0x32
218
219
220#define CONFIG_SYS_VXWORKS_MAC_PTR 0x000043f0
221
222#undef CONFIG_WATCHDOG
223
224
225
226
227#define CONFIG_SYS_LOAD_ADDR 0x2000000
228
229
230
231
232
233
234#define CONFIG_SYS_BOOTMAPSZ (256 << 20)
235
236#define CONFIG_SYS_RCWH_PCIHOST 0x80000000
237
238
239#define CONFIG_SYS_SICRH 0
240#define CONFIG_SYS_SICRL SICRL_LDP_A
241
242#define CONFIG_SYS_GPIO1_PRELIM
243#define CONFIG_SYS_GPIO1_DIR 0x00100000
244#define CONFIG_SYS_GPIO1_DAT 0x00100000
245
246#define CONFIG_SYS_GPIO2_PRELIM
247#define CONFIG_SYS_GPIO2_DIR 0x78900000
248#define CONFIG_SYS_GPIO2_DAT 0x70100000
249
250#ifdef CONFIG_PCI
251#define CONFIG_PCI_INDIRECT_BRIDGE
252#endif
253
254#if defined(CONFIG_CMD_KGDB)
255#define CONFIG_KGDB_BAUDRATE 230400
256#endif
257
258
259
260
261#define CONFIG_ENV_OVERWRITE
262
263#if defined(CONFIG_TSEC_ENET)
264#define CONFIG_HAS_ETH0
265#define CONFIG_HAS_ETH1
266#endif
267
268#define CONFIG_HOSTNAME "VME8349"
269#define CONFIG_ROOTPATH "/tftpboot/rootfs"
270#define CONFIG_BOOTFILE "uImage"
271
272#define CONFIG_LOADADDR 800000
273
274#define CONFIG_EXTRA_ENV_SETTINGS \
275 "netdev=eth0\0" \
276 "hostname=vme8349\0" \
277 "nfsargs=setenv bootargs root=/dev/nfs rw " \
278 "nfsroot=${serverip}:${rootpath}\0" \
279 "ramargs=setenv bootargs root=/dev/ram rw\0" \
280 "addip=setenv bootargs ${bootargs} " \
281 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
282 ":${hostname}:${netdev}:off panic=1\0" \
283 "addtty=setenv bootargs ${bootargs} console=ttyS0,${baudrate}\0"\
284 "flash_nfs=run nfsargs addip addtty;" \
285 "bootm ${kernel_addr}\0" \
286 "flash_self=run ramargs addip addtty;" \
287 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
288 "net_nfs=tftp 200000 ${bootfile};run nfsargs addip addtty;" \
289 "bootm\0" \
290 "load=tftp 100000 /tftpboot/bdi2000/vme8349.bin\0" \
291 "update=protect off fff00000 fff3ffff; " \
292 "era fff00000 fff3ffff; cp.b 100000 fff00000 ${filesize}\0" \
293 "upd=run load update\0" \
294 "fdtaddr=780000\0" \
295 "fdtfile=vme8349.dtb\0" \
296 ""
297
298#define CONFIG_NFSBOOTCOMMAND \
299 "setenv bootargs root=/dev/nfs rw " \
300 "nfsroot=$serverip:$rootpath " \
301 "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:" \
302 "$netdev:off " \
303 "console=$consoledev,$baudrate $othbootargs;" \
304 "tftp $loadaddr $bootfile;" \
305 "tftp $fdtaddr $fdtfile;" \
306 "bootm $loadaddr - $fdtaddr"
307
308#define CONFIG_RAMBOOTCOMMAND \
309 "setenv bootargs root=/dev/ram rw " \
310 "console=$consoledev,$baudrate $othbootargs;" \
311 "tftp $ramdiskaddr $ramdiskfile;" \
312 "tftp $loadaddr $bootfile;" \
313 "tftp $fdtaddr $fdtfile;" \
314 "bootm $loadaddr $ramdiskaddr $fdtaddr"
315
316#define CONFIG_BOOTCOMMAND "run flash_self"
317
318#ifndef __ASSEMBLY__
319int vme8349_read_spd(unsigned char chip, unsigned int addr, int alen,
320 unsigned char *buffer, int len);
321#endif
322
323#endif
324