LXR uboot/include/configs/x600.h

   1/* SPDX-License-Identifier: GPL-2.0+ */
   2/*
   3 * Copyright (C) 2009, STMicroelectronics - All Rights Reserved
   4 * Author(s): Vipin Kumar, <vipin.kumar@st.com> for STMicroelectronics.
   5 *
   6 * Copyright (C) 2012, 2015 Stefan Roese <sr@denx.de>
   7 */
   8
   9#ifndef __CONFIG_H
  10#define __CONFIG_H
  11
  12/*
  13 * High Level Configuration Options
  14 * (easy to change)
  15 */
  16#define CONFIG_SPEAR600                         /* SPEAr600 SoC */
  17#define CONFIG_X600                             /* on X600 board */
  18
  19#include <asm/arch/hardware.h>
  20
  21/* Timer, HZ specific defines */
  22#define CONFIG_SYS_HZ_CLOCK                     8300000
  23
  24#define CONFIG_SYS_FLASH_BASE                   0xf8000000
  25/* Reserve 8KiB for SPL */
  26#define CONFIG_SPL_PAD_TO                       8192    /* decimal for 'dd' */
  27#define CONFIG_SYS_SPL_LEN                      CONFIG_SPL_PAD_TO
  28#define CONFIG_SYS_UBOOT_BASE                   (CONFIG_SYS_FLASH_BASE + \
  29                                                 CONFIG_SYS_SPL_LEN)
  30#define CONFIG_SYS_MONITOR_BASE                 CONFIG_SYS_FLASH_BASE
  31#define CONFIG_SYS_MONITOR_LEN                  0x60000
  32
  33/* Serial Configuration (PL011) */
  34#define CONFIG_SYS_SERIAL0                      0xD0000000
  35#define CONFIG_SYS_SERIAL1                      0xD0080000
  36#define CONFIG_PL01x_PORTS                      { (void *)CONFIG_SYS_SERIAL0, \
  37                                                (void *)CONFIG_SYS_SERIAL1 }
  38#define CONFIG_PL011_CLOCK                      (48 * 1000 * 1000)
  39#define CONFIG_SYS_BAUDRATE_TABLE               { 9600, 19200, 38400, \
  40                                                  57600, 115200 }
  41#define CONFIG_SYS_LOADS_BAUD_CHANGE
  42
  43/* NOR FLASH config options */
  44#define CONFIG_ST_SMI
  45#define CONFIG_SYS_MAX_FLASH_BANKS              1
  46#define CONFIG_SYS_FLASH_BANK_SIZE              0x01000000
  47#define CONFIG_SYS_FLASH_ADDR_BASE              { CONFIG_SYS_FLASH_BASE }
  48#define CONFIG_SYS_MAX_FLASH_SECT               128
  49#define CONFIG_SYS_FLASH_EMPTY_INFO
  50#define CONFIG_SYS_FLASH_ERASE_TOUT             (3 * CONFIG_SYS_HZ)
  51#define CONFIG_SYS_FLASH_WRITE_TOUT             (3 * CONFIG_SYS_HZ)
  52
  53/* NAND FLASH config options */
  54#define CONFIG_NAND_FSMC
  55#define CONFIG_SYS_NAND_SELF_INIT
  56#define CONFIG_SYS_MAX_NAND_DEVICE              1
  57#define CONFIG_SYS_NAND_BASE                    CONFIG_FSMC_NAND_BASE
  58#define CONFIG_MTD_ECC_SOFT
  59#define CONFIG_SYS_FSMC_NAND_8BIT
  60#define CONFIG_SYS_NAND_ONFI_DETECTION
  61#define CONFIG_NAND_ECC_BCH
  62
  63/* UBI/UBI config options */
  64
  65/* Ethernet config options */
  66#define CONFIG_PHY_RESET_DELAY                  10000           /* in usec */
  67
  68#define CONFIG_SPEAR_GPIO
  69
  70/* I2C config options */
  71#define CONFIG_SYS_I2C
  72#define CONFIG_SYS_I2C_BASE                     0xD0200000
  73#define CONFIG_SYS_I2C_SPEED                    400000
  74#define CONFIG_SYS_I2C_SLAVE                    0x02
  75#define CONFIG_I2C_CHIPADDRESS                  0x50
  76
  77#define CONFIG_SYS_I2C_RTC_ADDR 0x68
  78
  79/* FPGA config options */
  80#define CONFIG_FPGA_COUNT       1
  81
  82/* USB EHCI options */
  83#define CONFIG_USB_EHCI_SPEAR
  84#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
  85
  86/*
  87 * U-Boot Environment placing definitions.
  88 */
  89
  90/* Miscellaneous configurable options */
  91#define CONFIG_BOOT_PARAMS_ADDR                 0x00000100
  92#define CONFIG_CMDLINE_TAG
  93#define CONFIG_SETUP_MEMORY_TAGS
  94
  95#define CONFIG_SYS_MEMTEST_START                0x00800000
  96#define CONFIG_SYS_MEMTEST_END                  0x04000000
  97#define CONFIG_SYS_MALLOC_LEN                   (8 << 20)
  98#define CONFIG_SYS_LOAD_ADDR                    0x00800000
  99
 100#define CONFIG_HOSTNAME                         "x600"
 101#define CONFIG_UBI_PART                         ubi0
 102#define CONFIG_UBIFS_VOLUME                     rootfs
 103
 104#define CONFIG_EXTRA_ENV_SETTINGS                                       \
 105        "u-boot_addr=1000000\0"                                         \
 106        "u-boot=" CONFIG_HOSTNAME "/u-boot.spr\0"               \
 107        "load=tftp ${u-boot_addr} ${u-boot}\0"                          \
 108        "update=protect off " __stringify(CONFIG_SYS_MONITOR_BASE)      \
 109                " +${filesize};"                                        \
 110                "erase " __stringify(CONFIG_SYS_MONITOR_BASE) " +${filesize};" \
 111                "cp.b ${u-boot_addr} " __stringify(CONFIG_SYS_MONITOR_BASE) \
 112                " ${filesize};"                                         \
 113                "protect on " __stringify(CONFIG_SYS_MONITOR_BASE)      \
 114                " +${filesize}\0"                                       \
 115        "upd=run load update\0"                                         \
 116        "ubifs=" CONFIG_HOSTNAME "/ubifs.img\0"         \
 117        "part=" __stringify(CONFIG_UBI_PART) "\0"                       \
 118        "vol=" __stringify(CONFIG_UBIFS_VOLUME) "\0"                    \
 119        "load_ubifs=tftp ${kernel_addr} ${ubifs}\0"                     \
 120        "update_ubifs=ubi part ${part};ubi write ${kernel_addr} ${vol}" \
 121                " ${filesize}\0"                                        \
 122        "upd_ubifs=run load_ubifs update_ubifs\0"                       \
 123        "init_ubifs=nand erase.part ubi0;ubi part ${part};"             \
 124                "ubi create ${vol} 4000000\0"                           \
 125        "netdev=eth0\0"                                                 \
 126        "rootpath=/opt/eldk-4.2/arm\0"                                  \
 127        "nfsargs=setenv bootargs root=/dev/nfs rw "                     \
 128                "nfsroot=${serverip}:${rootpath}\0"                     \
 129        "ramargs=setenv bootargs root=/dev/ram rw\0"                    \
 130        "boot_part=0\0"                                                 \
 131        "altbootcmd=if test $boot_part -eq 0;then "                     \
 132                        "echo Switching to partition 1!;"               \
 133                        "setenv boot_part 1;"                           \
 134                "else; "                                                \
 135                        "echo Switching to partition 0!;"               \
 136                        "setenv boot_part 0;"                           \
 137                "fi;"                                                   \
 138                "saveenv;boot\0"                                        \
 139        "ubifsargs=set bootargs ubi.mtd=ubi${boot_part} "               \
 140                "root=ubi0:rootfs rootfstype=ubifs\0"                   \
 141        "kernel=" CONFIG_HOSTNAME "/uImage\0"           \
 142        "kernel_fs=/boot/uImage \0"                                     \
 143        "kernel_addr=1000000\0"                                         \
 144        "dtb=" CONFIG_HOSTNAME "/"                              \
 145                CONFIG_HOSTNAME ".dtb\0"                        \
 146        "dtb_fs=/boot/" CONFIG_HOSTNAME ".dtb\0"                \
 147        "dtb_addr=1800000\0"                                            \
 148        "load_kernel=tftp ${kernel_addr} ${kernel}\0"                   \
 149        "load_dtb=tftp ${dtb_addr} ${dtb}\0"                            \
 150        "addip=setenv bootargs ${bootargs} "                            \
 151                "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"      \
 152                ":${hostname}:${netdev}:off panic=1\0"                  \
 153        "addcon=setenv bootargs ${bootargs} console=ttyAMA0,"           \
 154                "${baudrate}\0"                                         \
 155        "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0"              \
 156        "net_nfs=run load_dtb load_kernel; "                            \
 157                "run nfsargs addip addcon addmtd addmisc;"              \
 158                "bootm ${kernel_addr} - ${dtb_addr}\0"                  \
 159        "mtdids=" CONFIG_MTDIDS_DEFAULT "\0"                                    \
 160        "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0"                                \
 161        "nand_ubifs=run ubifs_mount ubifs_load ubifsargs addip"         \
 162                " addcon addmisc addmtd;"                               \
 163                "bootm ${kernel_addr} - ${dtb_addr}\0"                  \
 164        "ubifs_mount=ubi part ubi${boot_part};ubifsmount ubi:rootfs\0"  \
 165        "ubifs_load=ubifsload ${kernel_addr} ${kernel_fs};"             \
 166                "ubifsload ${dtb_addr} ${dtb_fs};\0"                    \
 167        "nand_ubifs=run ubifs_mount ubifs_load ubifsargs addip addcon " \
 168                "addmtd addmisc;bootm ${kernel_addr} - ${dtb_addr}\0"   \
 169        "bootcmd=run nand_ubifs\0"                                      \
 170        "\0"
 171
 172/* Physical Memory Map */
 173#define PHYS_SDRAM_1                            0x00000000
 174#define PHYS_SDRAM_1_MAXSIZE                    0x40000000
 175
 176#define CONFIG_SYS_SDRAM_BASE                   PHYS_SDRAM_1
 177#define CONFIG_SRAM_BASE                        0xd2800000
 178/* Preserve the last 2 lwords for the boot-counter */
 179#define CONFIG_SRAM_SIZE                        ((8 << 10) - 0x8)
 180#define CONFIG_SYS_INIT_RAM_ADDR                CONFIG_SRAM_BASE
 181#define CONFIG_SYS_INIT_RAM_SIZE                CONFIG_SRAM_SIZE
 182
 183#define CONFIG_SYS_INIT_SP_OFFSET               \
 184        (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 185
 186#define CONFIG_SYS_INIT_SP_ADDR                 \
 187        (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 188
 189/*
 190 * SPL related defines
 191 */
 192#define CONFIG_SPL_MAX_SIZE             (CONFIG_SRAM_SIZE - 0xb00)
 193#define CONFIG_SPL_START_S_PATH "arch/arm/cpu/arm926ejs/spear"
 194
 195/*
 196 * Please select/define only one of the following
 197 * Each definition corresponds to a supported DDR chip.
 198 * DDR configuration is based on the following selection
 199 */
 200#define CONFIG_DDR_MT47H64M16           1
 201#define CONFIG_DDR_MT47H32M16           0
 202#define CONFIG_DDR_MT47H128M8           0
 203
 204/*
 205 * Synchronous/Asynchronous operation of DDR
 206 *
 207 * Select CONFIG_DDR_2HCLK for DDR clk = 333MHz, synchronous operation
 208 * Select CONFIG_DDR_HCLK for DDR clk = 166MHz, synchronous operation
 209 * Select CONFIG_DDR_PLL2 for DDR clk = PLL2, asynchronous operation
 210 */
 211#define CONFIG_DDR_2HCLK                1
 212#define CONFIG_DDR_HCLK                 0
 213#define CONFIG_DDR_PLL2                 0
 214
 215/*
 216 * xxx_BOOT_SUPPORTED macro defines whether a booting type is supported
 217 * or not. Modify/Add to only these macros to define new boot types
 218 */
 219#define USB_BOOT_SUPPORTED              0
 220#define PCIE_BOOT_SUPPORTED             0
 221#define SNOR_BOOT_SUPPORTED             1
 222#define NAND_BOOT_SUPPORTED             1
 223#define PNOR_BOOT_SUPPORTED             0
 224#define TFTP_BOOT_SUPPORTED             0
 225#define UART_BOOT_SUPPORTED             0
 226#define SPI_BOOT_SUPPORTED              0
 227#define I2C_BOOT_SUPPORTED              0
 228#define MMC_BOOT_SUPPORTED              0
 229
 230#endif  /* __CONFIG_H */
 231