1/* SPDX-License-Identifier: GPL-2.0+ */ 2/* 3 * Copyright 2014 Freescale Semiconductor, Inc. 4 */ 5 6#ifndef __T1024QDS_QIXIS_H__ 7#define __T1024QDS_QIXIS_H__ 8 9/* Definitions of QIXIS Registers for T1024/T1023 QDS */ 10 11/* BRDCFG4[4:7]] select EC1 and EC2 as a pair */ 12#define BRDCFG4_EMISEL_MASK 0xE0 13#define BRDCFG4_EMISEL_SHIFT 5 14 15/* BRDCFG5[0:1] controls routing and use of I2C3 & I2C4 ports*/ 16#define BRDCFG5_IMX_MASK 0xC0 17#define BRDCFG5_IMX_DIU 0x80 18 19#define BRDCFG5_SPIRTE_MASK 0x07 20#define BRDCFG5_SPIRTE_TDM 0x01 21#define BRDCFG5_SPIRTE_SDHC 0x02 22#define BRDCFG9_XFI_TX_DISABLE 0x10 23 24/* BRDCFG13[0:5] TDM configuration and setup */ 25#define BRDCFG13_TDM_MASK 0xfc 26#define BRDCFG13_TDM_INTERFACE 0x37 27#define BRDCFG13_HDLC_LOOPBACK 0x29 28#define BRDCFG13_TDM_LOOPBACK 0x31 29 30/* BRDCFG15[3] controls LCD Panel Powerdown */ 31#define BRDCFG15_LCDFM 0x20 32#define BRDCFG15_LCDPD 0x10 33#define BRDCFG15_LCDPD_MASK 0x10 34#define BRDCFG15_LCDPD_ENABLED 0x00 35 36/* BRDCFG15[6:7] controls DIU MUX selction*/ 37#define BRDCFG15_DIUSEL_MASK 0x03 38#define BRDCFG15_DIUSEL_HDMI 0x00 39#define BRDCFG15_DIUSEL_LCD 0x01 40#define BRDCFG15_DIUSEL_UCC 0x02 41#define BRDCFG15_DIUSEL_TDM 0x03 42 43/* SYSCLK */ 44#define QIXIS_SYSCLK_66 0x0 45#define QIXIS_SYSCLK_83 0x1 46#define QIXIS_SYSCLK_100 0x2 47#define QIXIS_SYSCLK_125 0x3 48#define QIXIS_SYSCLK_133 0x4 49#define QIXIS_SYSCLK_150 0x5 50#define QIXIS_SYSCLK_160 0x6 51#define QIXIS_SYSCLK_166 0x7 52#define QIXIS_SYSCLK_64 0x8 53 54/* DDRCLK */ 55#define QIXIS_DDRCLK_66 0x0 56#define QIXIS_DDRCLK_100 0x1 57#define QIXIS_DDRCLK_125 0x2 58#define QIXIS_DDRCLK_133 0x3 59 60 61#define QIXIS_SRDS1CLK_122 0x5a 62#define QIXIS_SRDS1CLK_125 0x5e 63#endif 64