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19#include <common.h>
20#include <console.h>
21#include <dm.h>
22#include <env.h>
23#include <errno.h>
24#include <fdt_support.h>
25#include <flash.h>
26#include <init.h>
27#include <irq_func.h>
28#include <log.h>
29#include <asm/processor.h>
30#include <asm/io.h>
31#include <asm/byteorder.h>
32#include <asm/unaligned.h>
33#include <env_internal.h>
34#include <linux/delay.h>
35#include <mtd/cfi_flash.h>
36#include <watchdog.h>
37
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57
58
59DECLARE_GLOBAL_DATA_PTR;
60
61static uint flash_offset_cfi[2] = { FLASH_OFFSET_CFI, FLASH_OFFSET_CFI_ALT };
62#ifdef CONFIG_FLASH_CFI_MTD
63static uint flash_verbose = 1;
64#else
65#define flash_verbose 1
66#endif
67
68flash_info_t flash_info[CFI_MAX_FLASH_BANKS];
69
70
71
72
73#ifndef CONFIG_SYS_FLASH_CFI_WIDTH
74#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT
75#endif
76
77#ifdef CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
78#define __maybe_weak __weak
79#else
80#define __maybe_weak static
81#endif
82
83
84
85
86
87
88static u16 cfi_flash_config_reg(int i)
89{
90#ifdef CONFIG_SYS_CFI_FLASH_CONFIG_REGS
91 return ((u16 [])CONFIG_SYS_CFI_FLASH_CONFIG_REGS)[i];
92#else
93 return 0xffff;
94#endif
95}
96
97#if defined(CONFIG_SYS_MAX_FLASH_BANKS_DETECT)
98int cfi_flash_num_flash_banks = CONFIG_SYS_MAX_FLASH_BANKS_DETECT;
99#else
100int cfi_flash_num_flash_banks;
101#endif
102
103#ifdef CONFIG_CFI_FLASH
104static void cfi_flash_init_dm(void)
105{
106 struct udevice *dev;
107
108 cfi_flash_num_flash_banks = 0;
109
110
111
112
113
114
115 for (uclass_first_device(UCLASS_MTD, &dev);
116 dev;
117 uclass_next_device(&dev)) {
118 }
119}
120
121phys_addr_t cfi_flash_bank_addr(int i)
122{
123 return flash_info[i].base;
124}
125#else
126__weak phys_addr_t cfi_flash_bank_addr(int i)
127{
128 return ((phys_addr_t [])CONFIG_SYS_FLASH_BANKS_LIST)[i];
129}
130#endif
131
132__weak unsigned long cfi_flash_bank_size(int i)
133{
134#ifdef CONFIG_SYS_FLASH_BANKS_SIZES
135 return ((unsigned long [])CONFIG_SYS_FLASH_BANKS_SIZES)[i];
136#else
137 return 0;
138#endif
139}
140
141__maybe_weak void flash_write8(u8 value, void *addr)
142{
143 __raw_writeb(value, addr);
144}
145
146__maybe_weak void flash_write16(u16 value, void *addr)
147{
148 __raw_writew(value, addr);
149}
150
151__maybe_weak void flash_write32(u32 value, void *addr)
152{
153 __raw_writel(value, addr);
154}
155
156__maybe_weak void flash_write64(u64 value, void *addr)
157{
158
159 *(volatile u64 *)addr = value;
160}
161
162__maybe_weak u8 flash_read8(void *addr)
163{
164 return __raw_readb(addr);
165}
166
167__maybe_weak u16 flash_read16(void *addr)
168{
169 return __raw_readw(addr);
170}
171
172__maybe_weak u32 flash_read32(void *addr)
173{
174 return __raw_readl(addr);
175}
176
177__maybe_weak u64 flash_read64(void *addr)
178{
179
180 return *(volatile u64 *)addr;
181}
182
183
184
185#if defined(CONFIG_ENV_IS_IN_FLASH) || defined(CONFIG_ENV_ADDR_REDUND) || \
186 (defined(CONFIG_SYS_MONITOR_BASE) && \
187 (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE))
188static flash_info_t *flash_get_info(ulong base)
189{
190 int i;
191 flash_info_t *info;
192
193 for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
194 info = &flash_info[i];
195 if (info->size && info->start[0] <= base &&
196 base <= info->start[0] + info->size - 1)
197 return info;
198 }
199
200 return NULL;
201}
202#endif
203
204unsigned long flash_sector_size(flash_info_t *info, flash_sect_t sect)
205{
206 if (sect != (info->sector_count - 1))
207 return info->start[sect + 1] - info->start[sect];
208 else
209 return info->start[0] + info->size - info->start[sect];
210}
211
212
213
214
215static inline void *
216flash_map(flash_info_t *info, flash_sect_t sect, uint offset)
217{
218 unsigned int byte_offset = offset * info->portwidth;
219
220 return (void *)(info->start[sect] + byte_offset);
221}
222
223static inline void flash_unmap(flash_info_t *info, flash_sect_t sect,
224 unsigned int offset, void *addr)
225{
226}
227
228
229
230
231static void flash_make_cmd(flash_info_t *info, u32 cmd, void *cmdbuf)
232{
233 int i;
234 int cword_offset;
235 int cp_offset;
236#if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
237 u32 cmd_le = cpu_to_le32(cmd);
238#endif
239 uchar val;
240 uchar *cp = (uchar *) cmdbuf;
241
242 for (i = info->portwidth; i > 0; i--) {
243 cword_offset = (info->portwidth - i) % info->chipwidth;
244#if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
245 cp_offset = info->portwidth - i;
246 val = *((uchar *)&cmd_le + cword_offset);
247#else
248 cp_offset = i - 1;
249 val = *((uchar *)&cmd + sizeof(u32) - cword_offset - 1);
250#endif
251 cp[cp_offset] = (cword_offset >= sizeof(u32)) ? 0x00 : val;
252 }
253}
254
255#ifdef DEBUG
256
257
258
259static void print_longlong(char *str, unsigned long long data)
260{
261 int i;
262 char *cp;
263
264 cp = (char *)&data;
265 for (i = 0; i < 8; i++)
266 sprintf(&str[i * 2], "%2.2x", *cp++);
267}
268
269static void flash_printqry(struct cfi_qry *qry)
270{
271 u8 *p = (u8 *)qry;
272 int x, y;
273
274 for (x = 0; x < sizeof(struct cfi_qry); x += 16) {
275 debug("%02x : ", x);
276 for (y = 0; y < 16; y++)
277 debug("%2.2x ", p[x + y]);
278 debug(" ");
279 for (y = 0; y < 16; y++) {
280 unsigned char c = p[x + y];
281
282 if (c >= 0x20 && c <= 0x7e)
283 debug("%c", c);
284 else
285 debug(".");
286 }
287 debug("\n");
288 }
289}
290#endif
291
292
293
294
295static inline uchar flash_read_uchar(flash_info_t *info, uint offset)
296{
297 uchar *cp;
298 uchar retval;
299
300 cp = flash_map(info, 0, offset);
301#if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
302 retval = flash_read8(cp);
303#else
304 retval = flash_read8(cp + info->portwidth - 1);
305#endif
306 flash_unmap(info, 0, offset, cp);
307 return retval;
308}
309
310
311
312
313static inline ushort flash_read_word(flash_info_t *info, uint offset)
314{
315 ushort *addr, retval;
316
317 addr = flash_map(info, 0, offset);
318 retval = flash_read16(addr);
319 flash_unmap(info, 0, offset, addr);
320 return retval;
321}
322
323
324
325
326
327static ulong flash_read_long (flash_info_t *info, flash_sect_t sect,
328 uint offset)
329{
330 uchar *addr;
331 ulong retval;
332
333#ifdef DEBUG
334 int x;
335#endif
336 addr = flash_map(info, sect, offset);
337
338#ifdef DEBUG
339 debug("long addr is at %p info->portwidth = %d\n", addr,
340 info->portwidth);
341 for (x = 0; x < 4 * info->portwidth; x++)
342 debug("addr[%x] = 0x%x\n", x, flash_read8(addr + x));
343#endif
344#if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
345 retval = ((flash_read8(addr) << 16) |
346 (flash_read8(addr + info->portwidth) << 24) |
347 (flash_read8(addr + 2 * info->portwidth)) |
348 (flash_read8(addr + 3 * info->portwidth) << 8));
349#else
350 retval = ((flash_read8(addr + 2 * info->portwidth - 1) << 24) |
351 (flash_read8(addr + info->portwidth - 1) << 16) |
352 (flash_read8(addr + 4 * info->portwidth - 1) << 8) |
353 (flash_read8(addr + 3 * info->portwidth - 1)));
354#endif
355 flash_unmap(info, sect, offset, addr);
356
357 return retval;
358}
359
360
361
362
363static void flash_write_cmd(flash_info_t *info, flash_sect_t sect,
364 uint offset, u32 cmd)
365{
366 void *addr;
367 cfiword_t cword;
368
369 addr = flash_map(info, sect, offset);
370 flash_make_cmd(info, cmd, &cword);
371 switch (info->portwidth) {
372 case FLASH_CFI_8BIT:
373 debug("fwc addr %p cmd %x %x 8bit x %d bit\n", addr, cmd,
374 cword.w8, info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
375 flash_write8(cword.w8, addr);
376 break;
377 case FLASH_CFI_16BIT:
378 debug("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr,
379 cmd, cword.w16,
380 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
381 flash_write16(cword.w16, addr);
382 break;
383 case FLASH_CFI_32BIT:
384 debug("fwc addr %p cmd %x %8.8x 32bit x %d bit\n", addr,
385 cmd, cword.w32,
386 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
387 flash_write32(cword.w32, addr);
388 break;
389 case FLASH_CFI_64BIT:
390#ifdef DEBUG
391 {
392 char str[20];
393
394 print_longlong(str, cword.w64);
395
396 debug("fwrite addr %p cmd %x %s 64 bit x %d bit\n",
397 addr, cmd, str,
398 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
399 }
400#endif
401 flash_write64(cword.w64, addr);
402 break;
403 }
404
405
406 sync();
407
408 flash_unmap(info, sect, offset, addr);
409}
410
411static void flash_unlock_seq(flash_info_t *info, flash_sect_t sect)
412{
413 flash_write_cmd(info, sect, info->addr_unlock1, AMD_CMD_UNLOCK_START);
414 flash_write_cmd(info, sect, info->addr_unlock2, AMD_CMD_UNLOCK_ACK);
415}
416
417
418
419static int flash_isequal(flash_info_t *info, flash_sect_t sect, uint offset,
420 uchar cmd)
421{
422 void *addr;
423 cfiword_t cword;
424 int retval;
425
426 addr = flash_map(info, sect, offset);
427 flash_make_cmd(info, cmd, &cword);
428
429 debug("is= cmd %x(%c) addr %p ", cmd, cmd, addr);
430 switch (info->portwidth) {
431 case FLASH_CFI_8BIT:
432 debug("is= %x %x\n", flash_read8(addr), cword.w8);
433 retval = (flash_read8(addr) == cword.w8);
434 break;
435 case FLASH_CFI_16BIT:
436 debug("is= %4.4x %4.4x\n", flash_read16(addr), cword.w16);
437 retval = (flash_read16(addr) == cword.w16);
438 break;
439 case FLASH_CFI_32BIT:
440 debug("is= %8.8x %8.8x\n", flash_read32(addr), cword.w32);
441 retval = (flash_read32(addr) == cword.w32);
442 break;
443 case FLASH_CFI_64BIT:
444#ifdef DEBUG
445 {
446 char str1[20];
447 char str2[20];
448
449 print_longlong(str1, flash_read64(addr));
450 print_longlong(str2, cword.w64);
451 debug("is= %s %s\n", str1, str2);
452 }
453#endif
454 retval = (flash_read64(addr) == cword.w64);
455 break;
456 default:
457 retval = 0;
458 break;
459 }
460 flash_unmap(info, sect, offset, addr);
461
462 return retval;
463}
464
465
466
467static int flash_isset(flash_info_t *info, flash_sect_t sect, uint offset,
468 uchar cmd)
469{
470 void *addr;
471 cfiword_t cword;
472 int retval;
473
474 addr = flash_map(info, sect, offset);
475 flash_make_cmd(info, cmd, &cword);
476 switch (info->portwidth) {
477 case FLASH_CFI_8BIT:
478 retval = ((flash_read8(addr) & cword.w8) == cword.w8);
479 break;
480 case FLASH_CFI_16BIT:
481 retval = ((flash_read16(addr) & cword.w16) == cword.w16);
482 break;
483 case FLASH_CFI_32BIT:
484 retval = ((flash_read32(addr) & cword.w32) == cword.w32);
485 break;
486 case FLASH_CFI_64BIT:
487 retval = ((flash_read64(addr) & cword.w64) == cword.w64);
488 break;
489 default:
490 retval = 0;
491 break;
492 }
493 flash_unmap(info, sect, offset, addr);
494
495 return retval;
496}
497
498
499
500static int flash_toggle(flash_info_t *info, flash_sect_t sect, uint offset,
501 uchar cmd)
502{
503 u8 *addr;
504 cfiword_t cword;
505 int retval;
506
507 addr = flash_map(info, sect, offset);
508 flash_make_cmd(info, cmd, &cword);
509 switch (info->portwidth) {
510 case FLASH_CFI_8BIT:
511 retval = flash_read8(addr) != flash_read8(addr);
512 break;
513 case FLASH_CFI_16BIT:
514 retval = flash_read16(addr) != flash_read16(addr);
515 break;
516 case FLASH_CFI_32BIT:
517 retval = flash_read32(addr) != flash_read32(addr);
518 break;
519 case FLASH_CFI_64BIT:
520 retval = ((flash_read32(addr) != flash_read32(addr)) ||
521 (flash_read32(addr + 4) != flash_read32(addr + 4)));
522 break;
523 default:
524 retval = 0;
525 break;
526 }
527 flash_unmap(info, sect, offset, addr);
528
529 return retval;
530}
531
532
533
534
535
536
537
538static int flash_is_busy(flash_info_t *info, flash_sect_t sect)
539{
540 int retval;
541
542 switch (info->vendor) {
543 case CFI_CMDSET_INTEL_PROG_REGIONS:
544 case CFI_CMDSET_INTEL_STANDARD:
545 case CFI_CMDSET_INTEL_EXTENDED:
546 retval = !flash_isset(info, sect, 0, FLASH_STATUS_DONE);
547 break;
548 case CFI_CMDSET_AMD_STANDARD:
549 case CFI_CMDSET_AMD_EXTENDED:
550#ifdef CONFIG_FLASH_CFI_LEGACY
551 case CFI_CMDSET_AMD_LEGACY:
552#endif
553 if (info->sr_supported) {
554 flash_write_cmd(info, sect, info->addr_unlock1,
555 FLASH_CMD_READ_STATUS);
556 retval = !flash_isset(info, sect, 0,
557 FLASH_STATUS_DONE);
558 } else {
559 retval = flash_toggle(info, sect, 0,
560 AMD_STATUS_TOGGLE);
561 }
562
563 break;
564 default:
565 retval = 0;
566 }
567 debug("%s: %d\n", __func__, retval);
568 return retval;
569}
570
571
572
573
574
575static int flash_status_check(flash_info_t *info, flash_sect_t sector,
576 ulong tout, char *prompt)
577{
578 ulong start;
579
580#if CONFIG_SYS_HZ != 1000
581
582 if ((ulong)CONFIG_SYS_HZ > 100000)
583 tout *= (ulong)CONFIG_SYS_HZ / 1000;
584 else
585 tout = DIV_ROUND_UP(tout * (ulong)CONFIG_SYS_HZ, 1000);
586#endif
587
588
589#ifdef CONFIG_SYS_LOW_RES_TIMER
590 reset_timer();
591#endif
592 start = get_timer(0);
593 WATCHDOG_RESET();
594 while (flash_is_busy(info, sector)) {
595 if (get_timer(start) > tout) {
596 printf("Flash %s timeout at address %lx data %lx\n",
597 prompt, info->start[sector],
598 flash_read_long(info, sector, 0));
599 flash_write_cmd(info, sector, 0, info->cmd_reset);
600 udelay(1);
601 return ERR_TIMEOUT;
602 }
603 udelay(1);
604 }
605 return ERR_OK;
606}
607
608
609
610
611
612
613
614static int flash_full_status_check(flash_info_t *info, flash_sect_t sector,
615 ulong tout, char *prompt)
616{
617 int retcode;
618
619 retcode = flash_status_check(info, sector, tout, prompt);
620 switch (info->vendor) {
621 case CFI_CMDSET_INTEL_PROG_REGIONS:
622 case CFI_CMDSET_INTEL_EXTENDED:
623 case CFI_CMDSET_INTEL_STANDARD:
624 if (retcode == ERR_OK &&
625 !flash_isset(info, sector, 0, FLASH_STATUS_DONE)) {
626 retcode = ERR_INVAL;
627 printf("Flash %s error at address %lx\n", prompt,
628 info->start[sector]);
629 if (flash_isset(info, sector, 0, FLASH_STATUS_ECLBS |
630 FLASH_STATUS_PSLBS)) {
631 puts("Command Sequence Error.\n");
632 } else if (flash_isset(info, sector, 0,
633 FLASH_STATUS_ECLBS)) {
634 puts("Block Erase Error.\n");
635 retcode = ERR_NOT_ERASED;
636 } else if (flash_isset(info, sector, 0,
637 FLASH_STATUS_PSLBS)) {
638 puts("Locking Error\n");
639 }
640 if (flash_isset(info, sector, 0, FLASH_STATUS_DPS)) {
641 puts("Block locked.\n");
642 retcode = ERR_PROTECTED;
643 }
644 if (flash_isset(info, sector, 0, FLASH_STATUS_VPENS))
645 puts("Vpp Low Error.\n");
646 }
647 flash_write_cmd(info, sector, 0, info->cmd_reset);
648 udelay(1);
649 break;
650 default:
651 break;
652 }
653 return retcode;
654}
655
656static int use_flash_status_poll(flash_info_t *info)
657{
658#ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL
659 if (info->vendor == CFI_CMDSET_AMD_EXTENDED ||
660 info->vendor == CFI_CMDSET_AMD_STANDARD)
661 return 1;
662#endif
663 return 0;
664}
665
666static int flash_status_poll(flash_info_t *info, void *src, void *dst,
667 ulong tout, char *prompt)
668{
669#ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL
670 ulong start;
671 int ready;
672
673#if CONFIG_SYS_HZ != 1000
674
675 if ((ulong)CONFIG_SYS_HZ > 100000)
676 tout *= (ulong)CONFIG_SYS_HZ / 1000;
677 else
678 tout = DIV_ROUND_UP(tout * (ulong)CONFIG_SYS_HZ, 1000);
679#endif
680
681
682#ifdef CONFIG_SYS_LOW_RES_TIMER
683 reset_timer();
684#endif
685 start = get_timer(0);
686 WATCHDOG_RESET();
687 while (1) {
688 switch (info->portwidth) {
689 case FLASH_CFI_8BIT:
690 ready = flash_read8(dst) == flash_read8(src);
691 break;
692 case FLASH_CFI_16BIT:
693 ready = flash_read16(dst) == flash_read16(src);
694 break;
695 case FLASH_CFI_32BIT:
696 ready = flash_read32(dst) == flash_read32(src);
697 break;
698 case FLASH_CFI_64BIT:
699 ready = flash_read64(dst) == flash_read64(src);
700 break;
701 default:
702 ready = 0;
703 break;
704 }
705 if (ready)
706 break;
707 if (get_timer(start) > tout) {
708 printf("Flash %s timeout at address %lx data %lx\n",
709 prompt, (ulong)dst, (ulong)flash_read8(dst));
710 return ERR_TIMEOUT;
711 }
712 udelay(1);
713 }
714#endif
715 return ERR_OK;
716}
717
718
719
720static void flash_add_byte(flash_info_t *info, cfiword_t *cword, uchar c)
721{
722#if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
723 unsigned short w;
724 unsigned int l;
725 unsigned long long ll;
726#endif
727
728 switch (info->portwidth) {
729 case FLASH_CFI_8BIT:
730 cword->w8 = c;
731 break;
732 case FLASH_CFI_16BIT:
733#if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
734 w = c;
735 w <<= 8;
736 cword->w16 = (cword->w16 >> 8) | w;
737#else
738 cword->w16 = (cword->w16 << 8) | c;
739#endif
740 break;
741 case FLASH_CFI_32BIT:
742#if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
743 l = c;
744 l <<= 24;
745 cword->w32 = (cword->w32 >> 8) | l;
746#else
747 cword->w32 = (cword->w32 << 8) | c;
748#endif
749 break;
750 case FLASH_CFI_64BIT:
751#if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
752 ll = c;
753 ll <<= 56;
754 cword->w64 = (cword->w64 >> 8) | ll;
755#else
756 cword->w64 = (cword->w64 << 8) | c;
757#endif
758 break;
759 }
760}
761
762
763
764
765
766static flash_sect_t find_sector(flash_info_t *info, ulong addr)
767{
768 static flash_sect_t saved_sector;
769 static flash_info_t *saved_info;
770 flash_sect_t sector = saved_sector;
771
772 if (info != saved_info || sector >= info->sector_count)
773 sector = 0;
774
775 while ((sector < info->sector_count - 1) &&
776 (info->start[sector] < addr))
777 sector++;
778 while ((info->start[sector] > addr) && (sector > 0))
779
780
781
782
783 sector--;
784
785 saved_sector = sector;
786 saved_info = info;
787 return sector;
788}
789
790
791
792static int flash_write_cfiword(flash_info_t *info, ulong dest, cfiword_t cword)
793{
794 void *dstaddr = (void *)dest;
795 int flag;
796 flash_sect_t sect = 0;
797 char sect_found = 0;
798
799
800 switch (info->portwidth) {
801 case FLASH_CFI_8BIT:
802 flag = ((flash_read8(dstaddr) & cword.w8) == cword.w8);
803 break;
804 case FLASH_CFI_16BIT:
805 flag = ((flash_read16(dstaddr) & cword.w16) == cword.w16);
806 break;
807 case FLASH_CFI_32BIT:
808 flag = ((flash_read32(dstaddr) & cword.w32) == cword.w32);
809 break;
810 case FLASH_CFI_64BIT:
811 flag = ((flash_read64(dstaddr) & cword.w64) == cword.w64);
812 break;
813 default:
814 flag = 0;
815 break;
816 }
817 if (!flag)
818 return ERR_NOT_ERASED;
819
820
821 flag = disable_interrupts();
822
823 switch (info->vendor) {
824 case CFI_CMDSET_INTEL_PROG_REGIONS:
825 case CFI_CMDSET_INTEL_EXTENDED:
826 case CFI_CMDSET_INTEL_STANDARD:
827 flash_write_cmd(info, 0, 0, FLASH_CMD_CLEAR_STATUS);
828 flash_write_cmd(info, 0, 0, FLASH_CMD_WRITE);
829 break;
830 case CFI_CMDSET_AMD_EXTENDED:
831 case CFI_CMDSET_AMD_STANDARD:
832 sect = find_sector(info, dest);
833 flash_unlock_seq(info, sect);
834 flash_write_cmd(info, sect, info->addr_unlock1, AMD_CMD_WRITE);
835 sect_found = 1;
836 break;
837#ifdef CONFIG_FLASH_CFI_LEGACY
838 case CFI_CMDSET_AMD_LEGACY:
839 sect = find_sector(info, dest);
840 flash_unlock_seq(info, 0);
841 flash_write_cmd(info, 0, info->addr_unlock1, AMD_CMD_WRITE);
842 sect_found = 1;
843 break;
844#endif
845 }
846
847 switch (info->portwidth) {
848 case FLASH_CFI_8BIT:
849 flash_write8(cword.w8, dstaddr);
850 break;
851 case FLASH_CFI_16BIT:
852 flash_write16(cword.w16, dstaddr);
853 break;
854 case FLASH_CFI_32BIT:
855 flash_write32(cword.w32, dstaddr);
856 break;
857 case FLASH_CFI_64BIT:
858 flash_write64(cword.w64, dstaddr);
859 break;
860 }
861
862
863 if (flag)
864 enable_interrupts();
865
866 if (!sect_found)
867 sect = find_sector(info, dest);
868
869 if (use_flash_status_poll(info))
870 return flash_status_poll(info, &cword, dstaddr,
871 info->write_tout, "write");
872 else
873 return flash_full_status_check(info, sect,
874 info->write_tout, "write");
875}
876
877#ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
878
879static int flash_write_cfibuffer(flash_info_t *info, ulong dest, uchar *cp,
880 int len)
881{
882 flash_sect_t sector;
883 int cnt;
884 int retcode;
885 u8 *src = cp;
886 u8 *dst = (u8 *)dest;
887 u8 *dst2 = dst;
888 int flag = 1;
889 uint offset = 0;
890 unsigned int shift;
891 uchar write_cmd;
892
893 switch (info->portwidth) {
894 case FLASH_CFI_8BIT:
895 shift = 0;
896 break;
897 case FLASH_CFI_16BIT:
898 shift = 1;
899 break;
900 case FLASH_CFI_32BIT:
901 shift = 2;
902 break;
903 case FLASH_CFI_64BIT:
904 shift = 3;
905 break;
906 default:
907 retcode = ERR_INVAL;
908 goto out_unmap;
909 }
910
911 cnt = len >> shift;
912
913 while ((cnt-- > 0) && (flag == 1)) {
914 switch (info->portwidth) {
915 case FLASH_CFI_8BIT:
916 flag = ((flash_read8(dst2) & flash_read8(src)) ==
917 flash_read8(src));
918 src += 1, dst2 += 1;
919 break;
920 case FLASH_CFI_16BIT:
921 flag = ((flash_read16(dst2) & flash_read16(src)) ==
922 flash_read16(src));
923 src += 2, dst2 += 2;
924 break;
925 case FLASH_CFI_32BIT:
926 flag = ((flash_read32(dst2) & flash_read32(src)) ==
927 flash_read32(src));
928 src += 4, dst2 += 4;
929 break;
930 case FLASH_CFI_64BIT:
931 flag = ((flash_read64(dst2) & flash_read64(src)) ==
932 flash_read64(src));
933 src += 8, dst2 += 8;
934 break;
935 }
936 }
937 if (!flag) {
938 retcode = ERR_NOT_ERASED;
939 goto out_unmap;
940 }
941
942 src = cp;
943 sector = find_sector(info, dest);
944
945 switch (info->vendor) {
946 case CFI_CMDSET_INTEL_PROG_REGIONS:
947 case CFI_CMDSET_INTEL_STANDARD:
948 case CFI_CMDSET_INTEL_EXTENDED:
949 write_cmd = (info->vendor == CFI_CMDSET_INTEL_PROG_REGIONS) ?
950 FLASH_CMD_WRITE_BUFFER_PROG :
951 FLASH_CMD_WRITE_TO_BUFFER;
952 flash_write_cmd(info, sector, 0, FLASH_CMD_CLEAR_STATUS);
953 flash_write_cmd(info, sector, 0, FLASH_CMD_READ_STATUS);
954 flash_write_cmd(info, sector, 0, write_cmd);
955 retcode = flash_status_check(info, sector,
956 info->buffer_write_tout,
957 "write to buffer");
958 if (retcode == ERR_OK) {
959
960
961
962 cnt = len >> shift;
963 flash_write_cmd(info, sector, 0, cnt - 1);
964 while (cnt-- > 0) {
965 switch (info->portwidth) {
966 case FLASH_CFI_8BIT:
967 flash_write8(flash_read8(src), dst);
968 src += 1, dst += 1;
969 break;
970 case FLASH_CFI_16BIT:
971 flash_write16(flash_read16(src), dst);
972 src += 2, dst += 2;
973 break;
974 case FLASH_CFI_32BIT:
975 flash_write32(flash_read32(src), dst);
976 src += 4, dst += 4;
977 break;
978 case FLASH_CFI_64BIT:
979 flash_write64(flash_read64(src), dst);
980 src += 8, dst += 8;
981 break;
982 default:
983 retcode = ERR_INVAL;
984 goto out_unmap;
985 }
986 }
987 flash_write_cmd(info, sector, 0,
988 FLASH_CMD_WRITE_BUFFER_CONFIRM);
989 retcode = flash_full_status_check(
990 info, sector, info->buffer_write_tout,
991 "buffer write");
992 }
993
994 break;
995
996 case CFI_CMDSET_AMD_STANDARD:
997 case CFI_CMDSET_AMD_EXTENDED:
998 flash_unlock_seq(info, sector);
999
1000#ifdef CONFIG_FLASH_SPANSION_S29WS_N
1001 offset = ((unsigned long)dst - info->start[sector]) >> shift;
1002#endif
1003 flash_write_cmd(info, sector, offset, AMD_CMD_WRITE_TO_BUFFER);
1004 cnt = len >> shift;
1005 flash_write_cmd(info, sector, offset, cnt - 1);
1006
1007 switch (info->portwidth) {
1008 case FLASH_CFI_8BIT:
1009 while (cnt-- > 0) {
1010 flash_write8(flash_read8(src), dst);
1011 src += 1, dst += 1;
1012 }
1013 break;
1014 case FLASH_CFI_16BIT:
1015 while (cnt-- > 0) {
1016 flash_write16(flash_read16(src), dst);
1017 src += 2, dst += 2;
1018 }
1019 break;
1020 case FLASH_CFI_32BIT:
1021 while (cnt-- > 0) {
1022 flash_write32(flash_read32(src), dst);
1023 src += 4, dst += 4;
1024 }
1025 break;
1026 case FLASH_CFI_64BIT:
1027 while (cnt-- > 0) {
1028 flash_write64(flash_read64(src), dst);
1029 src += 8, dst += 8;
1030 }
1031 break;
1032 default:
1033 retcode = ERR_INVAL;
1034 goto out_unmap;
1035 }
1036
1037 flash_write_cmd(info, sector, 0, AMD_CMD_WRITE_BUFFER_CONFIRM);
1038 if (use_flash_status_poll(info))
1039 retcode = flash_status_poll(info, src - (1 << shift),
1040 dst - (1 << shift),
1041 info->buffer_write_tout,
1042 "buffer write");
1043 else
1044 retcode = flash_full_status_check(info, sector,
1045 info->buffer_write_tout,
1046 "buffer write");
1047 break;
1048
1049 default:
1050 debug("Unknown Command Set\n");
1051 retcode = ERR_INVAL;
1052 break;
1053 }
1054
1055out_unmap:
1056 return retcode;
1057}
1058#endif
1059
1060
1061
1062int flash_erase(flash_info_t *info, int s_first, int s_last)
1063{
1064 int rcode = 0;
1065 int prot;
1066 flash_sect_t sect;
1067 int st;
1068
1069 if (info->flash_id != FLASH_MAN_CFI) {
1070 puts("Can't erase unknown flash type - aborted\n");
1071 return 1;
1072 }
1073 if (s_first < 0 || s_first > s_last) {
1074 puts("- no sectors to erase\n");
1075 return 1;
1076 }
1077
1078 prot = 0;
1079 for (sect = s_first; sect <= s_last; ++sect)
1080 if (info->protect[sect])
1081 prot++;
1082 if (prot) {
1083 printf("- Warning: %d protected sectors will not be erased!\n",
1084 prot);
1085 } else if (flash_verbose) {
1086 putc('\n');
1087 }
1088
1089 for (sect = s_first; sect <= s_last; sect++) {
1090 if (ctrlc()) {
1091 printf("\n");
1092 return 1;
1093 }
1094
1095 if (info->protect[sect] == 0) {
1096#ifdef CONFIG_SYS_FLASH_CHECK_BLANK_BEFORE_ERASE
1097 int k;
1098 int size;
1099 int erased;
1100 u32 *flash;
1101
1102
1103
1104
1105 size = flash_sector_size(info, sect);
1106 erased = 1;
1107 flash = (u32 *)info->start[sect];
1108
1109 size = size >> 2;
1110 for (k = 0; k < size; k++) {
1111 if (flash_read32(flash++) != 0xffffffff) {
1112 erased = 0;
1113 break;
1114 }
1115 }
1116 if (erased) {
1117 if (flash_verbose)
1118 putc(',');
1119 continue;
1120 }
1121#endif
1122 switch (info->vendor) {
1123 case CFI_CMDSET_INTEL_PROG_REGIONS:
1124 case CFI_CMDSET_INTEL_STANDARD:
1125 case CFI_CMDSET_INTEL_EXTENDED:
1126 flash_write_cmd(info, sect, 0,
1127 FLASH_CMD_CLEAR_STATUS);
1128 flash_write_cmd(info, sect, 0,
1129 FLASH_CMD_BLOCK_ERASE);
1130 flash_write_cmd(info, sect, 0,
1131 FLASH_CMD_ERASE_CONFIRM);
1132 break;
1133 case CFI_CMDSET_AMD_STANDARD:
1134 case CFI_CMDSET_AMD_EXTENDED:
1135 flash_unlock_seq(info, sect);
1136 flash_write_cmd(info, sect,
1137 info->addr_unlock1,
1138 AMD_CMD_ERASE_START);
1139 flash_unlock_seq(info, sect);
1140 flash_write_cmd(info, sect, 0,
1141 info->cmd_erase_sector);
1142 break;
1143#ifdef CONFIG_FLASH_CFI_LEGACY
1144 case CFI_CMDSET_AMD_LEGACY:
1145 flash_unlock_seq(info, 0);
1146 flash_write_cmd(info, 0, info->addr_unlock1,
1147 AMD_CMD_ERASE_START);
1148 flash_unlock_seq(info, 0);
1149 flash_write_cmd(info, sect, 0,
1150 AMD_CMD_ERASE_SECTOR);
1151 break;
1152#endif
1153 default:
1154 debug("Unknown flash vendor %d\n",
1155 info->vendor);
1156 break;
1157 }
1158
1159 if (use_flash_status_poll(info)) {
1160 cfiword_t cword;
1161 void *dest;
1162
1163 cword.w64 = 0xffffffffffffffffULL;
1164 dest = flash_map(info, sect, 0);
1165 st = flash_status_poll(info, &cword, dest,
1166 info->erase_blk_tout,
1167 "erase");
1168 flash_unmap(info, sect, 0, dest);
1169 } else {
1170 st = flash_full_status_check(info, sect,
1171 info->erase_blk_tout,
1172 "erase");
1173 }
1174
1175 if (st)
1176 rcode = 1;
1177 else if (flash_verbose)
1178 putc('.');
1179 }
1180 }
1181
1182 if (flash_verbose)
1183 puts(" done\n");
1184
1185 return rcode;
1186}
1187
1188#ifdef CONFIG_SYS_FLASH_EMPTY_INFO
1189static int sector_erased(flash_info_t *info, int i)
1190{
1191 int k;
1192 int size;
1193 u32 *flash;
1194
1195
1196
1197
1198 size = flash_sector_size(info, i);
1199 flash = (u32 *)info->start[i];
1200
1201 size = size >> 2;
1202
1203 for (k = 0; k < size; k++) {
1204 if (flash_read32(flash++) != 0xffffffff)
1205 return 0;
1206 }
1207
1208 return 1;
1209}
1210#endif
1211
1212void flash_print_info(flash_info_t *info)
1213{
1214 int i;
1215
1216 if (info->flash_id != FLASH_MAN_CFI) {
1217 puts("missing or unknown FLASH type\n");
1218 return;
1219 }
1220
1221 printf("%s flash (%d x %d)",
1222 info->name,
1223 (info->portwidth << 3), (info->chipwidth << 3));
1224 if (info->size < 1024 * 1024)
1225 printf(" Size: %ld kB in %d Sectors\n",
1226 info->size >> 10, info->sector_count);
1227 else
1228 printf(" Size: %ld MB in %d Sectors\n",
1229 info->size >> 20, info->sector_count);
1230 printf(" ");
1231 switch (info->vendor) {
1232 case CFI_CMDSET_INTEL_PROG_REGIONS:
1233 printf("Intel Prog Regions");
1234 break;
1235 case CFI_CMDSET_INTEL_STANDARD:
1236 printf("Intel Standard");
1237 break;
1238 case CFI_CMDSET_INTEL_EXTENDED:
1239 printf("Intel Extended");
1240 break;
1241 case CFI_CMDSET_AMD_STANDARD:
1242 printf("AMD Standard");
1243 break;
1244 case CFI_CMDSET_AMD_EXTENDED:
1245 printf("AMD Extended");
1246 break;
1247#ifdef CONFIG_FLASH_CFI_LEGACY
1248 case CFI_CMDSET_AMD_LEGACY:
1249 printf("AMD Legacy");
1250 break;
1251#endif
1252 default:
1253 printf("Unknown (%d)", info->vendor);
1254 break;
1255 }
1256 printf(" command set, Manufacturer ID: 0x%02X, Device ID: 0x",
1257 info->manufacturer_id);
1258 printf(info->chipwidth == FLASH_CFI_16BIT ? "%04X" : "%02X",
1259 info->device_id);
1260 if ((info->device_id & 0xff) == 0x7E) {
1261 printf(info->chipwidth == FLASH_CFI_16BIT ? "%04X" : "%02X",
1262 info->device_id2);
1263 }
1264 if (info->vendor == CFI_CMDSET_AMD_STANDARD && info->legacy_unlock)
1265 printf("\n Advanced Sector Protection (PPB) enabled");
1266 printf("\n Erase timeout: %ld ms, write timeout: %ld ms\n",
1267 info->erase_blk_tout, info->write_tout);
1268 if (info->buffer_size > 1) {
1269 printf(" Buffer write timeout: %ld ms, ",
1270 info->buffer_write_tout);
1271 printf("buffer size: %d bytes\n", info->buffer_size);
1272 }
1273
1274 puts("\n Sector Start Addresses:");
1275 for (i = 0; i < info->sector_count; ++i) {
1276 if (ctrlc())
1277 break;
1278 if ((i % 5) == 0)
1279 putc('\n');
1280#ifdef CONFIG_SYS_FLASH_EMPTY_INFO
1281
1282 printf(" %08lX %c %s ",
1283 info->start[i],
1284 sector_erased(info, i) ? 'E' : ' ',
1285 info->protect[i] ? "RO" : " ");
1286#else
1287 printf(" %08lX %s ",
1288 info->start[i],
1289 info->protect[i] ? "RO" : " ");
1290#endif
1291 }
1292 putc('\n');
1293}
1294
1295
1296
1297
1298
1299
1300
1301#ifdef CONFIG_FLASH_SHOW_PROGRESS
1302#define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub) \
1303 if (flash_verbose) { \
1304 dots -= dots_sub; \
1305 if (scale > 0 && dots <= 0) { \
1306 if ((digit % 5) == 0) \
1307 printf("%d", digit / 5); \
1308 else \
1309 putc('.'); \
1310 digit--; \
1311 dots += scale; \
1312 } \
1313 }
1314#else
1315#define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub)
1316#endif
1317
1318
1319
1320
1321
1322
1323
1324int write_buff(flash_info_t *info, uchar *src, ulong addr, ulong cnt)
1325{
1326 ulong wp;
1327 uchar *p;
1328 int aln;
1329 cfiword_t cword;
1330 int i, rc;
1331#ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
1332 int buffered_size;
1333#endif
1334#ifdef CONFIG_FLASH_SHOW_PROGRESS
1335 int digit = CONFIG_FLASH_SHOW_PROGRESS;
1336 int scale = 0;
1337 int dots = 0;
1338
1339
1340
1341
1342 if (cnt >= CONFIG_FLASH_SHOW_PROGRESS) {
1343 scale = (int)((cnt + CONFIG_FLASH_SHOW_PROGRESS - 1) /
1344 CONFIG_FLASH_SHOW_PROGRESS);
1345 }
1346#endif
1347
1348
1349 wp = (addr & ~(info->portwidth - 1));
1350
1351
1352 aln = addr - wp;
1353 if (aln != 0) {
1354 cword.w32 = 0;
1355 p = (uchar *)wp;
1356 for (i = 0; i < aln; ++i)
1357 flash_add_byte(info, &cword, flash_read8(p + i));
1358
1359 for (; (i < info->portwidth) && (cnt > 0); i++) {
1360 flash_add_byte(info, &cword, *src++);
1361 cnt--;
1362 }
1363 for (; (cnt == 0) && (i < info->portwidth); ++i)
1364 flash_add_byte(info, &cword, flash_read8(p + i));
1365
1366 rc = flash_write_cfiword(info, wp, cword);
1367 if (rc != 0)
1368 return rc;
1369
1370 wp += i;
1371 FLASH_SHOW_PROGRESS(scale, dots, digit, i);
1372 }
1373
1374
1375#ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
1376 buffered_size = (info->portwidth / info->chipwidth);
1377 buffered_size *= info->buffer_size;
1378 while (cnt >= info->portwidth) {
1379
1380 if (info->buffer_size == 1) {
1381 cword.w32 = 0;
1382 for (i = 0; i < info->portwidth; i++)
1383 flash_add_byte(info, &cword, *src++);
1384 rc = flash_write_cfiword(info, wp, cword);
1385 if (rc != 0)
1386 return rc;
1387 wp += info->portwidth;
1388 cnt -= info->portwidth;
1389 continue;
1390 }
1391
1392
1393 i = buffered_size - (wp % buffered_size);
1394 if (i > cnt)
1395 i = cnt;
1396 rc = flash_write_cfibuffer(info, wp, src, i);
1397 if (rc != ERR_OK)
1398 return rc;
1399 i -= i & (info->portwidth - 1);
1400 wp += i;
1401 src += i;
1402 cnt -= i;
1403 FLASH_SHOW_PROGRESS(scale, dots, digit, i);
1404
1405 if ((cnt & 0xFFFF) < buffered_size && ctrlc())
1406 return ERR_ABORTED;
1407 }
1408#else
1409 while (cnt >= info->portwidth) {
1410 cword.w32 = 0;
1411 for (i = 0; i < info->portwidth; i++)
1412 flash_add_byte(info, &cword, *src++);
1413 rc = flash_write_cfiword(info, wp, cword);
1414 if (rc != 0)
1415 return rc;
1416 wp += info->portwidth;
1417 cnt -= info->portwidth;
1418 FLASH_SHOW_PROGRESS(scale, dots, digit, info->portwidth);
1419
1420 if ((cnt & 0xFFFF) < info->portwidth && ctrlc())
1421 return ERR_ABORTED;
1422 }
1423#endif
1424
1425 if (cnt == 0)
1426 return (0);
1427
1428
1429
1430
1431 cword.w32 = 0;
1432 p = (uchar *)wp;
1433 for (i = 0; (i < info->portwidth) && (cnt > 0); ++i) {
1434 flash_add_byte(info, &cword, *src++);
1435 --cnt;
1436 }
1437 for (; i < info->portwidth; ++i)
1438 flash_add_byte(info, &cword, flash_read8(p + i));
1439
1440 return flash_write_cfiword(info, wp, cword);
1441}
1442
1443static inline int manufact_match(flash_info_t *info, u32 manu)
1444{
1445 return info->manufacturer_id == ((manu & FLASH_VENDMASK) >> 16);
1446}
1447
1448
1449
1450#ifdef CONFIG_SYS_FLASH_PROTECTION
1451
1452static int cfi_protect_bugfix(flash_info_t *info, long sector, int prot)
1453{
1454 if (manufact_match(info, INTEL_MANUFACT) &&
1455 info->device_id == NUMONYX_256MBIT) {
1456
1457
1458
1459
1460 flash_write_cmd(info, sector, 0, FLASH_CMD_READ_ID);
1461 if (!flash_isequal(info, sector, FLASH_OFFSET_PROTECT,
1462 prot)) {
1463
1464
1465
1466
1467 int flag = disable_interrupts();
1468 unsigned short cmd;
1469
1470 if (prot)
1471 cmd = FLASH_CMD_PROTECT_SET;
1472 else
1473 cmd = FLASH_CMD_PROTECT_CLEAR;
1474
1475 flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT);
1476 flash_write_cmd(info, sector, 0, cmd);
1477
1478 if (flag)
1479 enable_interrupts();
1480 }
1481 return 1;
1482 }
1483 return 0;
1484}
1485
1486int flash_real_protect(flash_info_t *info, long sector, int prot)
1487{
1488 int retcode = 0;
1489
1490 switch (info->vendor) {
1491 case CFI_CMDSET_INTEL_PROG_REGIONS:
1492 case CFI_CMDSET_INTEL_STANDARD:
1493 case CFI_CMDSET_INTEL_EXTENDED:
1494 if (!cfi_protect_bugfix(info, sector, prot)) {
1495 flash_write_cmd(info, sector, 0,
1496 FLASH_CMD_CLEAR_STATUS);
1497 flash_write_cmd(info, sector, 0,
1498 FLASH_CMD_PROTECT);
1499 if (prot)
1500 flash_write_cmd(info, sector, 0,
1501 FLASH_CMD_PROTECT_SET);
1502 else
1503 flash_write_cmd(info, sector, 0,
1504 FLASH_CMD_PROTECT_CLEAR);
1505 }
1506 break;
1507 case CFI_CMDSET_AMD_EXTENDED:
1508 case CFI_CMDSET_AMD_STANDARD:
1509
1510 if (manufact_match(info, ATM_MANUFACT)) {
1511 if (prot) {
1512 flash_unlock_seq(info, 0);
1513 flash_write_cmd(info, 0,
1514 info->addr_unlock1,
1515 ATM_CMD_SOFTLOCK_START);
1516 flash_unlock_seq(info, 0);
1517 flash_write_cmd(info, sector, 0,
1518 ATM_CMD_LOCK_SECT);
1519 } else {
1520 flash_write_cmd(info, 0,
1521 info->addr_unlock1,
1522 AMD_CMD_UNLOCK_START);
1523 if (info->device_id == ATM_ID_BV6416)
1524 flash_write_cmd(info, sector,
1525 0, ATM_CMD_UNLOCK_SECT);
1526 }
1527 }
1528 if (info->legacy_unlock) {
1529 int flag = disable_interrupts();
1530 int lock_flag;
1531
1532 flash_unlock_seq(info, 0);
1533 flash_write_cmd(info, 0, info->addr_unlock1,
1534 AMD_CMD_SET_PPB_ENTRY);
1535 lock_flag = flash_isset(info, sector, 0, 0x01);
1536 if (prot) {
1537 if (lock_flag) {
1538 flash_write_cmd(info, sector, 0,
1539 AMD_CMD_PPB_LOCK_BC1);
1540 flash_write_cmd(info, sector, 0,
1541 AMD_CMD_PPB_LOCK_BC2);
1542 }
1543 debug("sector %ld %slocked\n", sector,
1544 lock_flag ? "" : "already ");
1545 } else {
1546 if (!lock_flag) {
1547 debug("unlock %ld\n", sector);
1548 flash_write_cmd(info, 0, 0,
1549 AMD_CMD_PPB_UNLOCK_BC1);
1550 flash_write_cmd(info, 0, 0,
1551 AMD_CMD_PPB_UNLOCK_BC2);
1552 }
1553 debug("sector %ld %sunlocked\n", sector,
1554 !lock_flag ? "" : "already ");
1555 }
1556 if (flag)
1557 enable_interrupts();
1558
1559 if (flash_status_check(info, sector,
1560 info->erase_blk_tout,
1561 prot ? "protect" : "unprotect"))
1562 printf("status check error\n");
1563
1564 flash_write_cmd(info, 0, 0,
1565 AMD_CMD_SET_PPB_EXIT_BC1);
1566 flash_write_cmd(info, 0, 0,
1567 AMD_CMD_SET_PPB_EXIT_BC2);
1568 }
1569 break;
1570#ifdef CONFIG_FLASH_CFI_LEGACY
1571 case CFI_CMDSET_AMD_LEGACY:
1572 flash_write_cmd(info, sector, 0, FLASH_CMD_CLEAR_STATUS);
1573 flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT);
1574 if (prot)
1575 flash_write_cmd(info, sector, 0,
1576 FLASH_CMD_PROTECT_SET);
1577 else
1578 flash_write_cmd(info, sector, 0,
1579 FLASH_CMD_PROTECT_CLEAR);
1580#endif
1581 };
1582
1583
1584
1585
1586
1587 flash_write_cmd(info, sector, 0, FLASH_CMD_READ_STATUS);
1588 retcode = flash_full_status_check(info, sector, info->erase_blk_tout,
1589 prot ? "protect" : "unprotect");
1590 if (retcode == 0) {
1591 info->protect[sector] = prot;
1592
1593
1594
1595
1596
1597 if (prot == 0 && info->legacy_unlock) {
1598 flash_sect_t i;
1599
1600 for (i = 0; i < info->sector_count; i++) {
1601 if (info->protect[i])
1602 flash_real_protect(info, i, 1);
1603 }
1604 }
1605 }
1606 return retcode;
1607}
1608
1609
1610
1611
1612void flash_read_user_serial(flash_info_t *info, void *buffer, int offset,
1613 int len)
1614{
1615 uchar *src;
1616 uchar *dst;
1617
1618 dst = buffer;
1619 src = flash_map(info, 0, FLASH_OFFSET_USER_PROTECTION);
1620 flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
1621 memcpy(dst, src + offset, len);
1622 flash_write_cmd(info, 0, 0, info->cmd_reset);
1623 udelay(1);
1624 flash_unmap(info, 0, FLASH_OFFSET_USER_PROTECTION, src);
1625}
1626
1627
1628
1629
1630void flash_read_factory_serial(flash_info_t *info, void *buffer, int offset,
1631 int len)
1632{
1633 uchar *src;
1634
1635 src = flash_map(info, 0, FLASH_OFFSET_INTEL_PROTECTION);
1636 flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
1637 memcpy(buffer, src + offset, len);
1638 flash_write_cmd(info, 0, 0, info->cmd_reset);
1639 udelay(1);
1640 flash_unmap(info, 0, FLASH_OFFSET_INTEL_PROTECTION, src);
1641}
1642
1643#endif
1644
1645
1646
1647
1648
1649
1650static void cfi_reverse_geometry(struct cfi_qry *qry)
1651{
1652 unsigned int i, j;
1653 u32 tmp;
1654
1655 for (i = 0, j = qry->num_erase_regions - 1; i < j; i++, j--) {
1656 tmp = get_unaligned(&qry->erase_region_info[i]);
1657 put_unaligned(get_unaligned(&qry->erase_region_info[j]),
1658 &qry->erase_region_info[i]);
1659 put_unaligned(tmp, &qry->erase_region_info[j]);
1660 }
1661}
1662
1663
1664
1665
1666
1667
1668
1669static void cmdset_intel_read_jedec_ids(flash_info_t *info)
1670{
1671 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1672 udelay(1);
1673 flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
1674 udelay(1000);
1675 info->manufacturer_id = flash_read_uchar(info,
1676 FLASH_OFFSET_MANUFACTURER_ID);
1677 info->device_id = (info->chipwidth == FLASH_CFI_16BIT) ?
1678 flash_read_word(info, FLASH_OFFSET_DEVICE_ID) :
1679 flash_read_uchar(info, FLASH_OFFSET_DEVICE_ID);
1680 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1681}
1682
1683static int cmdset_intel_init(flash_info_t *info, struct cfi_qry *qry)
1684{
1685 info->cmd_reset = FLASH_CMD_RESET;
1686
1687 cmdset_intel_read_jedec_ids(info);
1688 flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
1689
1690#ifdef CONFIG_SYS_FLASH_PROTECTION
1691
1692 if (info->ext_addr) {
1693 info->legacy_unlock =
1694 flash_read_uchar(info, info->ext_addr + 5) & 0x08;
1695 }
1696#endif
1697
1698 return 0;
1699}
1700
1701static void cmdset_amd_read_jedec_ids(flash_info_t *info)
1702{
1703 ushort bank_id = 0;
1704 uchar manu_id;
1705 uchar feature;
1706
1707 flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1708 flash_unlock_seq(info, 0);
1709 flash_write_cmd(info, 0, info->addr_unlock1, FLASH_CMD_READ_ID);
1710 udelay(1000);
1711
1712 manu_id = flash_read_uchar(info, FLASH_OFFSET_MANUFACTURER_ID);
1713
1714 while (manu_id == FLASH_CONTINUATION_CODE && bank_id < 0x800) {
1715 bank_id += 0x100;
1716 manu_id = flash_read_uchar(info,
1717 bank_id | FLASH_OFFSET_MANUFACTURER_ID);
1718 }
1719 info->manufacturer_id = manu_id;
1720
1721 debug("info->ext_addr = 0x%x, cfi_version = 0x%x\n",
1722 info->ext_addr, info->cfi_version);
1723 if (info->ext_addr && info->cfi_version >= 0x3134) {
1724
1725 feature = flash_read_uchar(info, info->ext_addr + 0x13);
1726 debug("feature = 0x%x\n", feature);
1727 info->sr_supported = feature & 0x1;
1728 }
1729
1730 switch (info->chipwidth) {
1731 case FLASH_CFI_8BIT:
1732 info->device_id = flash_read_uchar(info,
1733 FLASH_OFFSET_DEVICE_ID);
1734 if (info->device_id == 0x7E) {
1735
1736 info->device_id2 = flash_read_uchar(info,
1737 FLASH_OFFSET_DEVICE_ID2);
1738 info->device_id2 <<= 8;
1739 info->device_id2 |= flash_read_uchar(info,
1740 FLASH_OFFSET_DEVICE_ID3);
1741 }
1742 break;
1743 case FLASH_CFI_16BIT:
1744 info->device_id = flash_read_word(info,
1745 FLASH_OFFSET_DEVICE_ID);
1746 if ((info->device_id & 0xff) == 0x7E) {
1747
1748 info->device_id2 = flash_read_uchar(info,
1749 FLASH_OFFSET_DEVICE_ID2);
1750 info->device_id2 <<= 8;
1751 info->device_id2 |= flash_read_uchar(info,
1752 FLASH_OFFSET_DEVICE_ID3);
1753 }
1754 break;
1755 default:
1756 break;
1757 }
1758 flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1759 udelay(1);
1760}
1761
1762static int cmdset_amd_init(flash_info_t *info, struct cfi_qry *qry)
1763{
1764 info->cmd_reset = AMD_CMD_RESET;
1765 info->cmd_erase_sector = AMD_CMD_ERASE_SECTOR;
1766
1767 cmdset_amd_read_jedec_ids(info);
1768 flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
1769
1770#ifdef CONFIG_SYS_FLASH_PROTECTION
1771 if (info->ext_addr) {
1772
1773 if (flash_read_uchar(info, info->ext_addr + 9) == 0x8)
1774 info->legacy_unlock = 1;
1775 }
1776#endif
1777
1778 return 0;
1779}
1780
1781#ifdef CONFIG_FLASH_CFI_LEGACY
1782static void flash_read_jedec_ids(flash_info_t *info)
1783{
1784 info->manufacturer_id = 0;
1785 info->device_id = 0;
1786 info->device_id2 = 0;
1787
1788 switch (info->vendor) {
1789 case CFI_CMDSET_INTEL_PROG_REGIONS:
1790 case CFI_CMDSET_INTEL_STANDARD:
1791 case CFI_CMDSET_INTEL_EXTENDED:
1792 cmdset_intel_read_jedec_ids(info);
1793 break;
1794 case CFI_CMDSET_AMD_STANDARD:
1795 case CFI_CMDSET_AMD_EXTENDED:
1796 cmdset_amd_read_jedec_ids(info);
1797 break;
1798 default:
1799 break;
1800 }
1801}
1802
1803
1804
1805
1806
1807
1808static int flash_detect_legacy(phys_addr_t base, int banknum)
1809{
1810 flash_info_t *info = &flash_info[banknum];
1811
1812 if (board_flash_get_legacy(base, banknum, info)) {
1813
1814
1815
1816 if (!info->vendor) {
1817 int modes[] = {
1818 CFI_CMDSET_AMD_STANDARD,
1819 CFI_CMDSET_INTEL_STANDARD
1820 };
1821 int i;
1822
1823 for (i = 0; i < ARRAY_SIZE(modes); i++) {
1824 info->vendor = modes[i];
1825 info->start[0] =
1826 (ulong)map_physmem(base,
1827 info->portwidth,
1828 MAP_NOCACHE);
1829 if (info->portwidth == FLASH_CFI_8BIT &&
1830 info->interface == FLASH_CFI_X8X16) {
1831 info->addr_unlock1 = 0x2AAA;
1832 info->addr_unlock2 = 0x5555;
1833 } else {
1834 info->addr_unlock1 = 0x5555;
1835 info->addr_unlock2 = 0x2AAA;
1836 }
1837 flash_read_jedec_ids(info);
1838 debug("JEDEC PROBE: ID %x %x %x\n",
1839 info->manufacturer_id,
1840 info->device_id,
1841 info->device_id2);
1842 if (jedec_flash_match(info, info->start[0]))
1843 break;
1844
1845 unmap_physmem((void *)info->start[0],
1846 info->portwidth);
1847 }
1848 }
1849
1850 switch (info->vendor) {
1851 case CFI_CMDSET_INTEL_PROG_REGIONS:
1852 case CFI_CMDSET_INTEL_STANDARD:
1853 case CFI_CMDSET_INTEL_EXTENDED:
1854 info->cmd_reset = FLASH_CMD_RESET;
1855 break;
1856 case CFI_CMDSET_AMD_STANDARD:
1857 case CFI_CMDSET_AMD_EXTENDED:
1858 case CFI_CMDSET_AMD_LEGACY:
1859 info->cmd_reset = AMD_CMD_RESET;
1860 break;
1861 }
1862 info->flash_id = FLASH_MAN_CFI;
1863 return 1;
1864 }
1865 return 0;
1866}
1867#else
1868static inline int flash_detect_legacy(phys_addr_t base, int banknum)
1869{
1870 return 0;
1871}
1872#endif
1873
1874
1875
1876
1877
1878static void flash_read_cfi(flash_info_t *info, void *buf, unsigned int start,
1879 size_t len)
1880{
1881 u8 *p = buf;
1882 unsigned int i;
1883
1884 for (i = 0; i < len; i++)
1885 p[i] = flash_read_uchar(info, start + i);
1886}
1887
1888static void __flash_cmd_reset(flash_info_t *info)
1889{
1890
1891
1892
1893
1894
1895 flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1896 udelay(1);
1897 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1898}
1899
1900void flash_cmd_reset(flash_info_t *info)
1901 __attribute__((weak, alias("__flash_cmd_reset")));
1902
1903static int __flash_detect_cfi(flash_info_t *info, struct cfi_qry *qry)
1904{
1905 int cfi_offset;
1906
1907
1908 flash_cmd_reset(info);
1909
1910 for (cfi_offset = 0; cfi_offset < ARRAY_SIZE(flash_offset_cfi);
1911 cfi_offset++) {
1912 flash_write_cmd(info, 0, flash_offset_cfi[cfi_offset],
1913 FLASH_CMD_CFI);
1914 if (flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP, 'Q') &&
1915 flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R') &&
1916 flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) {
1917 flash_read_cfi(info, qry, FLASH_OFFSET_CFI_RESP,
1918 sizeof(struct cfi_qry));
1919 info->interface = le16_to_cpu(qry->interface_desc);
1920
1921 info->cfi_offset = flash_offset_cfi[cfi_offset];
1922 debug("device interface is %d\n",
1923 info->interface);
1924 debug("found port %d chip %d ",
1925 info->portwidth, info->chipwidth);
1926 debug("port %d bits chip %d bits\n",
1927 info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1928 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1929
1930
1931 info->addr_unlock1 = 0x555;
1932 info->addr_unlock2 = 0x2aa;
1933
1934
1935
1936
1937
1938 if (
1939 (info->chipwidth == FLASH_CFI_BY8 &&
1940 info->interface == FLASH_CFI_X8X16) ||
1941
1942 (info->chipwidth == FLASH_CFI_BY16 &&
1943 info->interface == FLASH_CFI_X16X32)) {
1944 info->addr_unlock1 = 0xaaa;
1945 info->addr_unlock2 = 0x555;
1946 }
1947
1948 info->name = "CFI conformant";
1949 return 1;
1950 }
1951 }
1952
1953 return 0;
1954}
1955
1956static int flash_detect_cfi(flash_info_t *info, struct cfi_qry *qry)
1957{
1958 debug("flash detect cfi\n");
1959
1960 for (info->portwidth = CONFIG_SYS_FLASH_CFI_WIDTH;
1961 info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) {
1962 for (info->chipwidth = FLASH_CFI_BY8;
1963 info->chipwidth <= info->portwidth;
1964 info->chipwidth <<= 1)
1965 if (__flash_detect_cfi(info, qry))
1966 return 1;
1967 }
1968 debug("not found\n");
1969 return 0;
1970}
1971
1972
1973
1974
1975
1976static void flash_fixup_amd(flash_info_t *info, struct cfi_qry *qry)
1977{
1978
1979 if (qry->num_erase_regions > 1) {
1980
1981 if (info->cfi_version < 0x3131) {
1982
1983 if ((info->device_id & 0x80) != 0)
1984 cfi_reverse_geometry(qry);
1985 } else if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) {
1986
1987
1988 cfi_reverse_geometry(qry);
1989 }
1990 }
1991}
1992
1993static void flash_fixup_atmel(flash_info_t *info, struct cfi_qry *qry)
1994{
1995 int reverse_geometry = 0;
1996
1997
1998 if (info->ext_addr && !(flash_read_uchar(info, info->ext_addr + 6) & 1))
1999 reverse_geometry = 1;
2000
2001
2002
2003
2004
2005 if (info->device_id == 0xd6 || info->device_id == 0xd2)
2006 reverse_geometry = !reverse_geometry;
2007
2008 if (reverse_geometry)
2009 cfi_reverse_geometry(qry);
2010}
2011
2012static void flash_fixup_stm(flash_info_t *info, struct cfi_qry *qry)
2013{
2014
2015 if (qry->num_erase_regions > 1) {
2016
2017 if (info->cfi_version < 0x3131) {
2018
2019 if (info->device_id == 0x22CA ||
2020 info->device_id == 0x2256 ||
2021 info->device_id == 0x22D7) {
2022 cfi_reverse_geometry(qry);
2023 }
2024 } else if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) {
2025
2026
2027 cfi_reverse_geometry(qry);
2028 }
2029 }
2030}
2031
2032static void flash_fixup_sst(flash_info_t *info, struct cfi_qry *qry)
2033{
2034
2035
2036
2037
2038
2039
2040
2041
2042
2043
2044 if (info->device_id == 0x5D23 ||
2045 info->device_id == 0x5C23) {
2046
2047 info->cmd_erase_sector = 0x50;
2048 }
2049}
2050
2051static void flash_fixup_num(flash_info_t *info, struct cfi_qry *qry)
2052{
2053
2054
2055
2056
2057
2058
2059 if (qry->max_buf_write_size > 0x8 &&
2060 info->device_id == 0x7E &&
2061 (info->device_id2 == 0x2201 ||
2062 info->device_id2 == 0x2301 ||
2063 info->device_id2 == 0x2801 ||
2064 info->device_id2 == 0x4801)) {
2065 debug("Adjusted buffer size on Numonyx flash");
2066 debug(" M29EW family in 8 bit mode\n");
2067 qry->max_buf_write_size = 0x8;
2068 }
2069}
2070
2071
2072
2073
2074
2075ulong flash_get_size(phys_addr_t base, int banknum)
2076{
2077 flash_info_t *info = &flash_info[banknum];
2078 int i, j;
2079 flash_sect_t sect_cnt;
2080 phys_addr_t sector;
2081 unsigned long tmp;
2082 int size_ratio;
2083 uchar num_erase_regions;
2084 int erase_region_size;
2085 int erase_region_count;
2086 struct cfi_qry qry;
2087 unsigned long max_size;
2088
2089 memset(&qry, 0, sizeof(qry));
2090
2091 info->ext_addr = 0;
2092 info->cfi_version = 0;
2093#ifdef CONFIG_SYS_FLASH_PROTECTION
2094 info->legacy_unlock = 0;
2095#endif
2096
2097 info->start[0] = (ulong)map_physmem(base, info->portwidth, MAP_NOCACHE);
2098
2099 if (flash_detect_cfi(info, &qry)) {
2100 info->vendor = le16_to_cpu(get_unaligned(&qry.p_id));
2101 info->ext_addr = le16_to_cpu(get_unaligned(&qry.p_adr));
2102 num_erase_regions = qry.num_erase_regions;
2103
2104 if (info->ext_addr) {
2105 info->cfi_version = (ushort)flash_read_uchar(info,
2106 info->ext_addr + 3) << 8;
2107 info->cfi_version |= (ushort)flash_read_uchar(info,
2108 info->ext_addr + 4);
2109 }
2110
2111#ifdef DEBUG
2112 flash_printqry(&qry);
2113#endif
2114
2115 switch (info->vendor) {
2116 case CFI_CMDSET_INTEL_PROG_REGIONS:
2117 case CFI_CMDSET_INTEL_STANDARD:
2118 case CFI_CMDSET_INTEL_EXTENDED:
2119 cmdset_intel_init(info, &qry);
2120 break;
2121 case CFI_CMDSET_AMD_STANDARD:
2122 case CFI_CMDSET_AMD_EXTENDED:
2123 cmdset_amd_init(info, &qry);
2124 break;
2125 default:
2126 printf("CFI: Unknown command set 0x%x\n",
2127 info->vendor);
2128
2129
2130
2131
2132
2133 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
2134 return 0;
2135 }
2136
2137
2138 switch (info->manufacturer_id) {
2139 case 0x0001:
2140 case 0x0037:
2141 flash_fixup_amd(info, &qry);
2142 break;
2143 case 0x001f:
2144 flash_fixup_atmel(info, &qry);
2145 break;
2146 case 0x0020:
2147 flash_fixup_stm(info, &qry);
2148 break;
2149 case 0x00bf:
2150 flash_fixup_sst(info, &qry);
2151 break;
2152 case 0x0089:
2153 flash_fixup_num(info, &qry);
2154 break;
2155 }
2156
2157 debug("manufacturer is %d\n", info->vendor);
2158 debug("manufacturer id is 0x%x\n", info->manufacturer_id);
2159 debug("device id is 0x%x\n", info->device_id);
2160 debug("device id2 is 0x%x\n", info->device_id2);
2161 debug("cfi version is 0x%04x\n", info->cfi_version);
2162
2163 size_ratio = info->portwidth / info->chipwidth;
2164
2165 if (info->interface == FLASH_CFI_X8X16 &&
2166 info->chipwidth == FLASH_CFI_BY8) {
2167 size_ratio >>= 1;
2168 }
2169 debug("size_ratio %d port %d bits chip %d bits\n",
2170 size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH,
2171 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
2172 info->size = 1 << qry.dev_size;
2173
2174 info->size *= size_ratio;
2175 max_size = cfi_flash_bank_size(banknum);
2176 if (max_size && info->size > max_size) {
2177 debug("[truncated from %ldMiB]", info->size >> 20);
2178 info->size = max_size;
2179 }
2180 debug("found %d erase regions\n", num_erase_regions);
2181 sect_cnt = 0;
2182 sector = base;
2183 for (i = 0; i < num_erase_regions; i++) {
2184 if (i > NUM_ERASE_REGIONS) {
2185 printf("%d erase regions found, only %d used\n",
2186 num_erase_regions, NUM_ERASE_REGIONS);
2187 break;
2188 }
2189
2190 tmp = le32_to_cpu(get_unaligned(
2191 &qry.erase_region_info[i]));
2192 debug("erase region %u: 0x%08lx\n", i, tmp);
2193
2194 erase_region_count = (tmp & 0xffff) + 1;
2195 tmp >>= 16;
2196 erase_region_size =
2197 (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128;
2198 debug("erase_region_count = %d ", erase_region_count);
2199 debug("erase_region_size = %d\n", erase_region_size);
2200 for (j = 0; j < erase_region_count; j++) {
2201 if (sector - base >= info->size)
2202 break;
2203 if (sect_cnt >= CONFIG_SYS_MAX_FLASH_SECT) {
2204 printf("ERROR: too many flash sectors\n");
2205 break;
2206 }
2207 info->start[sect_cnt] =
2208 (ulong)map_physmem(sector,
2209 info->portwidth,
2210 MAP_NOCACHE);
2211 sector += (erase_region_size * size_ratio);
2212
2213
2214
2215
2216
2217 switch (info->vendor) {
2218 case CFI_CMDSET_INTEL_PROG_REGIONS:
2219 case CFI_CMDSET_INTEL_EXTENDED:
2220 case CFI_CMDSET_INTEL_STANDARD:
2221
2222
2223
2224
2225
2226 flash_write_cmd(info, sect_cnt, 0,
2227 FLASH_CMD_READ_ID);
2228 info->protect[sect_cnt] =
2229 flash_isset(info, sect_cnt,
2230 FLASH_OFFSET_PROTECT,
2231 FLASH_STATUS_PROTECT);
2232 flash_write_cmd(info, sect_cnt, 0,
2233 FLASH_CMD_RESET);
2234 break;
2235 case CFI_CMDSET_AMD_EXTENDED:
2236 case CFI_CMDSET_AMD_STANDARD:
2237 if (!info->legacy_unlock) {
2238
2239 info->protect[sect_cnt] = 0;
2240 break;
2241 }
2242
2243
2244 flash_write_cmd(info, 0, 0,
2245 info->cmd_reset);
2246 flash_unlock_seq(info, 0);
2247 flash_write_cmd(info, 0,
2248 info->addr_unlock1,
2249 FLASH_CMD_READ_ID);
2250 info->protect[sect_cnt] =
2251 flash_isset(
2252 info, sect_cnt,
2253 FLASH_OFFSET_PROTECT,
2254 FLASH_STATUS_PROTECT);
2255 break;
2256 default:
2257
2258 info->protect[sect_cnt] = 0;
2259 }
2260
2261 sect_cnt++;
2262 }
2263 }
2264
2265 info->sector_count = sect_cnt;
2266 info->buffer_size = 1 << le16_to_cpu(qry.max_buf_write_size);
2267 tmp = 1 << qry.block_erase_timeout_typ;
2268 info->erase_blk_tout = tmp *
2269 (1 << qry.block_erase_timeout_max);
2270 tmp = (1 << qry.buf_write_timeout_typ) *
2271 (1 << qry.buf_write_timeout_max);
2272
2273
2274 info->buffer_write_tout = (tmp + 999) / 1000;
2275 tmp = (1 << qry.word_write_timeout_typ) *
2276 (1 << qry.word_write_timeout_max);
2277
2278 info->write_tout = (tmp + 999) / 1000;
2279 info->flash_id = FLASH_MAN_CFI;
2280 if (info->interface == FLASH_CFI_X8X16 &&
2281 info->chipwidth == FLASH_CFI_BY8) {
2282
2283 info->portwidth >>= 1;
2284 }
2285
2286 flash_write_cmd(info, 0, 0, info->cmd_reset);
2287 }
2288
2289 return (info->size);
2290}
2291
2292#ifdef CONFIG_FLASH_CFI_MTD
2293void flash_set_verbose(uint v)
2294{
2295 flash_verbose = v;
2296}
2297#endif
2298
2299static void cfi_flash_set_config_reg(u32 base, u16 val)
2300{
2301#ifdef CONFIG_SYS_CFI_FLASH_CONFIG_REGS
2302
2303
2304
2305
2306 if (val == 0xffff)
2307 return;
2308
2309
2310
2311
2312
2313 flash_write16(FLASH_CMD_SETUP, (void *)(base + (val << 1)));
2314 flash_write16(FLASH_CMD_SET_CR_CONFIRM, (void *)(base + (val << 1)));
2315
2316
2317
2318
2319
2320 flash_write16(FLASH_CMD_RESET, (void *)base);
2321#endif
2322}
2323
2324
2325
2326
2327static void flash_protect_default(void)
2328{
2329#if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST)
2330 int i;
2331 struct apl_s {
2332 ulong start;
2333 ulong size;
2334 } apl[] = CONFIG_SYS_FLASH_AUTOPROTECT_LIST;
2335#endif
2336
2337
2338#if defined(CONFIG_SYS_MONITOR_BASE) && \
2339 (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE) && \
2340 (!defined(CONFIG_MONITOR_IS_IN_RAM))
2341 flash_protect(FLAG_PROTECT_SET,
2342 CONFIG_SYS_MONITOR_BASE,
2343 CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1,
2344 flash_get_info(CONFIG_SYS_MONITOR_BASE));
2345#endif
2346
2347
2348#ifdef CONFIG_ENV_IS_IN_FLASH
2349 flash_protect(FLAG_PROTECT_SET,
2350 CONFIG_ENV_ADDR,
2351 CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1,
2352 flash_get_info(CONFIG_ENV_ADDR));
2353#endif
2354
2355
2356#ifdef CONFIG_ENV_ADDR_REDUND
2357 flash_protect(FLAG_PROTECT_SET,
2358 CONFIG_ENV_ADDR_REDUND,
2359 CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1,
2360 flash_get_info(CONFIG_ENV_ADDR_REDUND));
2361#endif
2362
2363#if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST)
2364 for (i = 0; i < ARRAY_SIZE(apl); i++) {
2365 debug("autoprotecting from %08lx to %08lx\n",
2366 apl[i].start, apl[i].start + apl[i].size - 1);
2367 flash_protect(FLAG_PROTECT_SET,
2368 apl[i].start,
2369 apl[i].start + apl[i].size - 1,
2370 flash_get_info(apl[i].start));
2371 }
2372#endif
2373}
2374
2375unsigned long flash_init(void)
2376{
2377 unsigned long size = 0;
2378 int i;
2379
2380#ifdef CONFIG_SYS_FLASH_PROTECTION
2381
2382 char s[64];
2383
2384 env_get_f("unlock", s, sizeof(s));
2385#endif
2386
2387#ifdef CONFIG_CFI_FLASH
2388 cfi_flash_init_dm();
2389#endif
2390
2391
2392 for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
2393 flash_info[i].flash_id = FLASH_UNKNOWN;
2394
2395
2396 cfi_flash_set_config_reg(cfi_flash_bank_addr(i),
2397 cfi_flash_config_reg(i));
2398
2399 if (!flash_detect_legacy(cfi_flash_bank_addr(i), i))
2400 flash_get_size(cfi_flash_bank_addr(i), i);
2401 size += flash_info[i].size;
2402 if (flash_info[i].flash_id == FLASH_UNKNOWN) {
2403#ifndef CONFIG_SYS_FLASH_QUIET_TEST
2404 printf("## Unknown flash on Bank %d ", i + 1);
2405 printf("- Size = 0x%08lx = %ld MB\n",
2406 flash_info[i].size,
2407 flash_info[i].size >> 20);
2408#endif
2409 }
2410#ifdef CONFIG_SYS_FLASH_PROTECTION
2411 else if (strcmp(s, "yes") == 0) {
2412
2413
2414
2415
2416
2417
2418
2419
2420 if (flash_info[i].legacy_unlock) {
2421 int k;
2422
2423
2424
2425
2426
2427
2428
2429 flash_info[i].legacy_unlock = 0;
2430
2431
2432
2433
2434
2435
2436 flash_real_protect(&flash_info[i], 0, 0);
2437
2438 flash_info[i].legacy_unlock = 1;
2439
2440
2441
2442
2443
2444 for (k = 1; k < flash_info[i].sector_count; k++)
2445 flash_info[i].protect[k] = 0;
2446 } else {
2447
2448
2449
2450 flash_protect(FLAG_PROTECT_CLEAR,
2451 flash_info[i].start[0],
2452 flash_info[i].start[0]
2453 + flash_info[i].size - 1,
2454 &flash_info[i]);
2455 }
2456 }
2457#endif
2458 }
2459
2460 flash_protect_default();
2461#ifdef CONFIG_FLASH_CFI_MTD
2462 cfi_mtd_init();
2463#endif
2464
2465 return (size);
2466}
2467
2468#ifdef CONFIG_CFI_FLASH
2469static int cfi_flash_probe(struct udevice *dev)
2470{
2471 const fdt32_t *cell;
2472 int addrc, sizec;
2473 int len, idx;
2474
2475 addrc = dev_read_addr_cells(dev);
2476 sizec = dev_read_size_cells(dev);
2477
2478
2479 cell = dev_read_prop(dev, "reg", &len);
2480 if (!cell)
2481 return -ENOENT;
2482 idx = 0;
2483 len /= sizeof(fdt32_t);
2484 while (idx < len) {
2485 phys_addr_t addr;
2486
2487 addr = dev_translate_address(dev, cell + idx);
2488
2489 flash_info[cfi_flash_num_flash_banks].dev = dev;
2490 flash_info[cfi_flash_num_flash_banks].base = addr;
2491 cfi_flash_num_flash_banks++;
2492
2493 idx += addrc + sizec;
2494 }
2495 gd->bd->bi_flashstart = flash_info[0].base;
2496
2497 return 0;
2498}
2499
2500static const struct udevice_id cfi_flash_ids[] = {
2501 { .compatible = "cfi-flash" },
2502 { .compatible = "jedec-flash" },
2503 {}
2504};
2505
2506U_BOOT_DRIVER(cfi_flash) = {
2507 .name = "cfi_flash",
2508 .id = UCLASS_MTD,
2509 .of_match = cfi_flash_ids,
2510 .probe = cfi_flash_probe,
2511};
2512#endif
2513