1/* SPDX-License-Identifier: GPL-2.0+ */ 2/* 3 * Copyright (C) 2017 Andes Technology Corporation 4 * Rick Chen, Andes Technology Corporation <rick@andestech.com> 5 */ 6 7#ifndef __CONFIG_H 8#define __CONFIG_H 9 10#ifdef CONFIG_SPL 11#define CONFIG_SPL_MAX_SIZE 0x00100000 12#define CONFIG_SPL_BSS_START_ADDR 0x04000000 13#define CONFIG_SPL_BSS_MAX_SIZE 0x00100000 14 15#ifndef CONFIG_XIP 16#define CONFIG_SPL_LOAD_FIT_ADDRESS 0x00200000 17#else 18#define CONFIG_SPL_LOAD_FIT_ADDRESS 0x80010000 19#endif 20 21#ifdef CONFIG_SPL_MMC_SUPPORT 22#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 23#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.itb" 24#endif 25#endif 26 27/* 28 * CPU and Board Configuration Options 29 */ 30#define CONFIG_BOOTP_SEND_HOSTNAME 31 32/* 33 * Miscellaneous configurable options 34 */ 35#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ 36 37/* 38 * Print Buffer Size 39 */ 40#define CONFIG_SYS_PBSIZE \ 41 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 42 43/* 44 * max number of command args 45 */ 46#define CONFIG_SYS_MAXARGS 16 47 48/* 49 * Boot Argument Buffer Size 50 */ 51#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 52 53/* 54 * Size of malloc() pool 55 * 512kB is suggested, (CONFIG_ENV_SIZE + 128 * 1024) was not enough 56 */ 57#define CONFIG_SYS_MALLOC_LEN (512 << 10) 58 59/* DT blob (fdt) address */ 60#define CONFIG_SYS_FDT_BASE 0x800f0000 61 62/* 63 * Physical Memory Map 64 */ 65#define PHYS_SDRAM_0 0x00000000 /* SDRAM Bank #1 */ 66#define PHYS_SDRAM_1 \ 67 (PHYS_SDRAM_0 + PHYS_SDRAM_0_SIZE) /* SDRAM Bank #2 */ 68#define PHYS_SDRAM_0_SIZE 0x20000000 /* 512 MB */ 69#define PHYS_SDRAM_1_SIZE 0x20000000 /* 512 MB */ 70#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_0 71 72/* 73 * Serial console configuration 74 */ 75#define CONFIG_SYS_NS16550_SERIAL 76#ifndef CONFIG_DM_SERIAL 77#define CONFIG_SYS_NS16550_REG_SIZE -4 78#endif 79#define CONFIG_SYS_NS16550_CLK 19660800 80 81/* Init Stack Pointer */ 82#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000000 - \ 83 GENERATED_GBL_DATA_SIZE) 84 85/* 86 * Load address and memory test area should agree with 87 * arch/riscv/config.mk. Be careful not to overwrite U-Boot itself. 88 */ 89#define CONFIG_SYS_LOAD_ADDR 0x100000 /* SDRAM */ 90 91/* 92 * memtest works on 512 MB in DRAM 93 */ 94 95/* 96 * FLASH and environment organization 97 */ 98 99/* use CFI framework */ 100 101#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT 102#define CONFIG_SYS_CFI_FLASH_STATUS_POLL 103 104/* support JEDEC */ 105#ifdef CONFIG_CFI_FLASH 106#define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 1 107#endif/* Do not use CONFIG_FLASH_CFI_LEGACY to detect on board flash */ 108#define PHYS_FLASH_1 0x88000000 /* BANK 0 */ 109#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 110#define CONFIG_SYS_FLASH_BANKS_LIST { PHYS_FLASH_1, } 111#define CONFIG_SYS_MONITOR_BASE PHYS_FLASH_1 112 113#define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* TO for Flash Erase (ms) */ 114#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* TO for Flash Write (ms) */ 115 116/* max number of memory banks */ 117/* 118 * There are 4 banks supported for this Controller, 119 * but we have only 1 bank connected to flash on board 120*/ 121#ifndef CONFIG_SYS_MAX_FLASH_BANKS_DETECT 122#define CONFIG_SYS_MAX_FLASH_BANKS 1 123#endif 124#define CONFIG_SYS_FLASH_BANKS_SIZES {0x4000000} 125 126/* max number of sectors on one chip */ 127#define CONFIG_FLASH_SECTOR_SIZE (0x10000*2) 128#define CONFIG_SYS_MAX_FLASH_SECT 512 129 130/* environments */ 131#define CONFIG_ENV_OVERWRITE 132 133/* SPI FLASH */ 134 135/* 136 * For booting Linux, the board info and command line data 137 * have to be in the first 16 MB of memory, since this is 138 * the maximum mapped by the Linux kernel during initialization. 139 */ 140 141/* Initial Memory map for Linux*/ 142#define CONFIG_SYS_BOOTMAPSZ (64 << 20) 143/* Increase max gunzip size */ 144#define CONFIG_SYS_BOOTM_LEN (64 << 20) 145 146/* When we use RAM as ENV */ 147 148/* Enable distro boot */ 149#define BOOT_TARGET_DEVICES(func) \ 150 func(MMC, mmc, 0) \ 151 func(DHCP, dhcp, na) 152#include <config_distro_bootcmd.h> 153 154#define CONFIG_EXTRA_ENV_SETTINGS \ 155 "kernel_addr_r=0x00080000\0" \ 156 "pxefile_addr_r=0x01f00000\0" \ 157 "scriptaddr=0x01f00000\0" \ 158 "fdt_addr_r=0x02000000\0" \ 159 "ramdisk_addr_r=0x02800000\0" \ 160 BOOTENV 161 162#endif /* __CONFIG_H */ 163