LXR uboot/include/configs/qemu-mips64.h

   1/* SPDX-License-Identifier: GPL-2.0+ */
   2/*
   3 * (C) Copyright 2003
   4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   5 */
   6
   7/*
   8 * This file contains the configuration parameters for qemu-mips64 target.
   9 */
  10
  11#ifndef __CONFIG_H
  12#define __CONFIG_H
  13
  14#define CONFIG_QEMU_MIPS
  15
  16#define CONFIG_TIMESTAMP                /* Print image info with timestamp */
  17
  18#define CONFIG_EXTRA_ENV_SETTINGS                                       \
  19        "addmisc=setenv bootargs ${bootargs} "                          \
  20                "console=ttyS0,${baudrate} "                            \
  21                "panic=1\0"                                             \
  22        "bootfile=/tftpboot/vmlinux\0"                                  \
  23        "load=tftp ffffffff80500000 ${u-boot}\0"                        \
  24        ""
  25
  26#define CONFIG_BOOTCOMMAND      "bootp;bootelf"
  27
  28/*
  29 * BOOTP options
  30 */
  31#define CONFIG_BOOTP_BOOTFILESIZE
  32
  33#define CONFIG_DRIVER_NE2000
  34#define CONFIG_DRIVER_NE2000_BASE       0xffffffffb4000300
  35
  36#define CONFIG_SYS_NS16550_SERIAL
  37#define CONFIG_SYS_NS16550_REG_SIZE     1
  38#define CONFIG_SYS_NS16550_CLK          115200
  39#define CONFIG_SYS_NS16550_COM1         0xffffffffb40003f8
  40
  41#ifdef CONFIG_SYS_BIG_ENDIAN
  42#define CONFIG_IDE_SWAP_IO
  43#endif
  44
  45#define CONFIG_SYS_IDE_MAXBUS           2
  46#define CONFIG_SYS_ATA_IDE0_OFFSET      0x1f0
  47#define CONFIG_SYS_ATA_IDE1_OFFSET      0x170
  48#define CONFIG_SYS_ATA_DATA_OFFSET      0
  49#define CONFIG_SYS_ATA_REG_OFFSET       0
  50#define CONFIG_SYS_ATA_BASE_ADDR        0xffffffffb4000000
  51
  52#define CONFIG_SYS_IDE_MAXDEVICE        4
  53
  54/*
  55 * Miscellaneous configurable options
  56 */
  57
  58#define CONFIG_SYS_MALLOC_LEN           (256 << 10)
  59
  60#define CONFIG_SYS_BOOTPARAMS_LEN       128*1024
  61
  62#define CONFIG_SYS_MHZ                  132
  63
  64#define CONFIG_SYS_MIPS_TIMER_FREQ      (CONFIG_SYS_MHZ * 1000000)
  65
  66/* Cached addr */
  67#define CONFIG_SYS_SDRAM_BASE           0xffffffff80000000
  68
  69/* default load address */
  70#define CONFIG_SYS_LOAD_ADDR            0xffffffff81000000
  71
  72/*-----------------------------------------------------------------------
  73 * FLASH and environment organization
  74 */
  75/* The following #defines are needed to get flash environment right */
  76#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
  77
  78#define CONFIG_SYS_INIT_SP_OFFSET       0x400000
  79
  80/* We boot from this flash, selected with dip switch */
  81#define CONFIG_SYS_FLASH_BASE           0xffffffffbfc00000
  82#define CONFIG_SYS_MAX_FLASH_BANKS      1
  83#define CONFIG_SYS_MAX_FLASH_SECT       128
  84
  85/* Address and size of Primary Environment Sector */
  86
  87#define CONFIG_ENV_OVERWRITE    1
  88
  89#define MEM_SIZE                128
  90
  91#endif /* __CONFIG_H */
  92