1/* SPDX-License-Identifier: GPL-2.0+ */ 2/* 3 * ti_armv7_common.h 4 * 5 * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ 6 * 7 * The various ARMv7 SoCs from TI all share a number of IP blocks when 8 * implementing a given feature. Rather than define these in every 9 * board or even SoC common file, we define a common file to be re-used 10 * in all cases. While technically true that some of these details are 11 * configurable at the board design, they are common throughout SoC 12 * reference platforms as well as custom designs and become de facto 13 * standards. 14 */ 15 16#ifndef __CONFIG_TI_ARMV7_COMMON_H__ 17#define __CONFIG_TI_ARMV7_COMMON_H__ 18 19/* Support both device trees and ATAGs. */ 20#define CONFIG_CMDLINE_TAG 21#define CONFIG_SETUP_MEMORY_TAGS 22#define CONFIG_INITRD_TAG 23 24/* 25 * Our DDR memory always starts at 0x80000000 and U-Boot shall have 26 * relocated itself to higher in memory by the time this value is used. 27 * However, set this to a 32MB offset to allow for easier Linux kernel 28 * booting as the default is often used as the kernel load address. 29 */ 30#define CONFIG_SYS_LOAD_ADDR 0x82000000 31 32/* 33 * We setup defaults based on constraints from the Linux kernel, which should 34 * also be safe elsewhere. We have the default load at 32MB into DDR (for 35 * the kernel), FDT above 128MB (the maximum location for the end of the 36 * kernel), and the ramdisk 512KB above that (allowing for hopefully never 37 * seen large trees). We say all of this must be within the first 256MB 38 * as that will normally be within the kernel lowmem and thus visible via 39 * bootm_size and we only run on platforms with 256MB or more of memory. 40 * 41 * As a temporary storage for DTBO blobs (which should be applied into DTB 42 * blob), we use the location 15.5 MB above the ramdisk. If someone wants to 43 * use ramdisk bigger than 15.5 MB, then DTBO can be loaded and applied to DTB 44 * blob before loading the ramdisk, as DTBO location is only used as a temporary 45 * storage, and can be re-used after 'fdt apply' command is done. 46 */ 47#define DEFAULT_LINUX_BOOT_ENV \ 48 "loadaddr=0x82000000\0" \ 49 "kernel_addr_r=0x82000000\0" \ 50 "fdtaddr=0x88000000\0" \ 51 "dtboaddr=0x89000000\0" \ 52 "fdt_addr_r=0x88000000\0" \ 53 "rdaddr=0x88080000\0" \ 54 "ramdisk_addr_r=0x88080000\0" \ 55 "scriptaddr=0x80000000\0" \ 56 "pxefile_addr_r=0x80100000\0" \ 57 "bootm_size=0x10000000\0" \ 58 "boot_fdt=try\0" 59 60#define DEFAULT_FIT_TI_ARGS \ 61 "boot_fit=0\0" \ 62 "addr_fit=0x90000000\0" \ 63 "name_fit=fitImage\0" \ 64 "update_to_fit=setenv loadaddr ${addr_fit}; setenv bootfile ${name_fit}\0" \ 65 "get_overlaystring=" \ 66 "for overlay in $name_overlays;" \ 67 "do;" \ 68 "setenv overlaystring ${overlaystring}'#'${overlay};" \ 69 "done;\0" \ 70 "run_fit=bootm ${addr_fit}#${fdtfile}${overlaystring}\0" \ 71 72/* 73 * DDR information. If the CONFIG_NR_DRAM_BANKS is not defined, 74 * we say (for simplicity) that we have 1 bank, always, even when 75 * we have more. We always start at 0x80000000, and we place the 76 * initial stack pointer in our SRAM. Otherwise, we can define 77 * CONFIG_NR_DRAM_BANKS before including this file. 78 */ 79#define CONFIG_SYS_SDRAM_BASE 0x80000000 80 81#ifndef CONFIG_SYS_INIT_SP_ADDR 82#define CONFIG_SYS_INIT_SP_ADDR (NON_SECURE_SRAM_END - \ 83 GENERATED_GBL_DATA_SIZE) 84#endif 85 86/* Timer information. */ 87#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ 88 89/* If DM_I2C, enable non-DM I2C support */ 90#if !defined(CONFIG_DM_I2C) 91#define CONFIG_I2C 92#define CONFIG_SYS_I2C 93#endif 94 95/* 96 * The following are general good-enough settings for U-Boot. We set a 97 * large malloc pool as we generally have a lot of DDR, and we opt for 98 * function over binary size in the main portion of U-Boot as this is 99 * generally easily constrained later if needed. We enable the config 100 * options that give us information in the environment about what board 101 * we are on so we do not need to rely on the command prompt. We set a 102 * console baudrate of 115200 and use the default baud rate table. 103 */ 104#define CONFIG_SYS_MALLOC_LEN SZ_32M 105#define CONFIG_ENV_OVERWRITE /* Overwrite ethaddr / serial# */ 106 107/* As stated above, the following choices are optional. */ 108 109/* We set the max number of command args high to avoid HUSH bugs. */ 110#define CONFIG_SYS_MAXARGS 64 111 112/* Console I/O Buffer Size */ 113#define CONFIG_SYS_CBSIZE 1024 114/* Boot Argument Buffer Size */ 115#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 116 117/* 118 * When we have SPI, NOR or NAND flash we expect to be making use of 119 * mtdparts, both for ease of use in U-Boot and for passing information 120 * on to the Linux kernel. 121 */ 122 123/* 124 * Our platforms make use of SPL to initalize the hardware (primarily 125 * memory) enough for full U-Boot to be loaded. We make use of the general 126 * SPL framework found under common/spl/. Given our generally common memory 127 * map, we set a number of related defaults and sizes here. 128 */ 129#if !defined(CONFIG_NOR_BOOT) && \ 130 !(defined(CONFIG_QSPI_BOOT) && defined(CONFIG_AM43XX)) 131 132/* 133 * We also support Falcon Mode so that the Linux kernel can be booted 134 * directly from SPL. This is not currently available on HS devices. 135 */ 136 137/* 138 * Place the image at the start of the ROM defined image space (per 139 * CONFIG_SPL_TEXT_BASE and we limit our size to the ROM-defined 140 * downloaded image area minus 1KiB for scratch space. We initalize DRAM as 141 * soon as we can so that we can place stack, malloc and BSS there. We load 142 * U-Boot itself into memory at 0x80800000 for legacy reasons (to not conflict 143 * with older SPLs). We have our BSS be placed 2MiB after this, to allow for 144 * the default Linux kernel address of 0x80008000 to work with most sized 145 * kernels, in the Falcon Mode case. We have the SPL malloc pool at the end 146 * of the BSS area. We suggest that the stack be placed at 32MiB after the 147 * start of DRAM to allow room for all of the above (handled in Kconfig). 148 */ 149#ifndef CONFIG_SPL_BSS_START_ADDR 150#define CONFIG_SPL_BSS_START_ADDR 0x80a00000 151#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */ 152#endif 153#ifndef CONFIG_SYS_SPL_MALLOC_START 154#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \ 155 CONFIG_SPL_BSS_MAX_SIZE) 156#define CONFIG_SYS_SPL_MALLOC_SIZE SZ_8M 157#endif 158#ifndef CONFIG_SPL_MAX_SIZE 159#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \ 160 CONFIG_SPL_TEXT_BASE) 161#endif 162 163 164/* FAT sd card locations. */ 165#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 166#ifndef CONFIG_SPL_FS_LOAD_PAYLOAD_NAME 167#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" 168#endif 169 170#ifdef CONFIG_SPL_OS_BOOT 171/* FAT */ 172#define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage" 173#define CONFIG_SPL_FS_LOAD_ARGS_NAME "args" 174 175/* RAW SD card / eMMC */ 176#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x1700 /* address 0x2E0000 */ 177#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x1500 /* address 0x2A0000 */ 178#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0x200 /* 256KiB */ 179#endif 180 181/* General parts of the framework, required. */ 182 183#ifdef CONFIG_MTD_RAW_NAND 184#define CONFIG_SPL_NAND_BASE 185#define CONFIG_SPL_NAND_DRIVERS 186#define CONFIG_SPL_NAND_ECC 187#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE 188#endif 189#endif /* !CONFIG_NOR_BOOT */ 190 191/* Generic Environment Variables */ 192 193#ifdef CONFIG_CMD_NET 194#define NETARGS \ 195 "static_ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}" \ 196 "::off\0" \ 197 "nfsopts=nolock\0" \ 198 "rootpath=/export/rootfs\0" \ 199 "netloadimage=tftp ${loadaddr} ${bootfile}\0" \ 200 "netloadfdt=tftp ${fdtaddr} ${fdtfile}\0" \ 201 "netargs=setenv bootargs console=${console} " \ 202 "${optargs} " \ 203 "root=/dev/nfs " \ 204 "nfsroot=${serverip}:${rootpath},${nfsopts} rw " \ 205 "ip=dhcp\0" \ 206 "netboot=echo Booting from network ...; " \ 207 "setenv autoload no; " \ 208 "dhcp; " \ 209 "run netloadimage; " \ 210 "run netloadfdt; " \ 211 "run netargs; " \ 212 "bootz ${loadaddr} - ${fdtaddr}\0" 213#else 214#define NETARGS "" 215#endif 216 217#endif /* __CONFIG_TI_ARMV7_COMMON_H__ */ 218