LXR uboot/board/cavium/thunderx/thunderx.c

   1// SPDX-License-Identifier: GPL-2.0+
   2/**
   3 * (C) Copyright 2014, Cavium Inc.
   4**/
   5
   6#include <common.h>
   7#include <cpu_func.h>
   8#include <dm.h>
   9#include <init.h>
  10#include <malloc.h>
  11#include <errno.h>
  12#include <net.h>
  13#include <linux/compiler.h>
  14
  15#include <cavium/atf.h>
  16#include <asm/armv8/mmu.h>
  17
  18#if !CONFIG_IS_ENABLED(OF_CONTROL)
  19#include <dm/platform_data/serial_pl01x.h>
  20
  21static const struct pl01x_serial_platdata serial0 = {
  22        .base = CONFIG_SYS_SERIAL0,
  23        .type = TYPE_PL011,
  24        .clock = 0,
  25        .skip_init = true,
  26};
  27
  28U_BOOT_DEVICE(thunderx_serial0) = {
  29        .name = "serial_pl01x",
  30        .platdata = &serial0,
  31};
  32
  33static const struct pl01x_serial_platdata serial1 = {
  34        .base = CONFIG_SYS_SERIAL1,
  35        .type = TYPE_PL011,
  36        .clock = 0,
  37        .skip_init = true,
  38};
  39
  40U_BOOT_DEVICE(thunderx_serial1) = {
  41        .name = "serial_pl01x",
  42        .platdata = &serial1,
  43};
  44#endif
  45
  46DECLARE_GLOBAL_DATA_PTR;
  47
  48static struct mm_region thunderx_mem_map[] = {
  49        {
  50                .virt = 0x000000000000UL,
  51                .phys = 0x000000000000UL,
  52                .size = 0x40000000000UL,
  53                .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_NON_SHARE,
  54        }, {
  55                .virt = 0x800000000000UL,
  56                .phys = 0x800000000000UL,
  57                .size = 0x40000000000UL,
  58                .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
  59                         PTE_BLOCK_NON_SHARE,
  60        }, {
  61                .virt = 0x840000000000UL,
  62                .phys = 0x840000000000UL,
  63                .size = 0x40000000000UL,
  64                .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
  65                         PTE_BLOCK_NON_SHARE,
  66        }, {
  67                /* List terminator */
  68                0,
  69        }
  70};
  71
  72struct mm_region *mem_map = thunderx_mem_map;
  73
  74int board_init(void)
  75{
  76        return 0;
  77}
  78
  79int timer_init(void)
  80{
  81        return 0;
  82}
  83
  84int dram_init(void)
  85{
  86        ssize_t node_count = atf_node_count();
  87        ssize_t dram_size;
  88        int node;
  89
  90        printf("Initializing\nNodes in system: %zd\n", node_count);
  91
  92        gd->ram_size = 0;
  93
  94        for (node = 0; node < node_count; node++) {
  95                dram_size = atf_dram_size(node);
  96                printf("Node %d: %zd MBytes of DRAM\n", node, dram_size >> 20);
  97                gd->ram_size += dram_size;
  98        }
  99
 100        gd->ram_size -= MEM_BASE;
 101
 102        *(unsigned long *)CPU_RELEASE_ADDR = 0;
 103
 104        puts("DRAM size:");
 105
 106        return 0;
 107}
 108
 109/*
 110 * Board specific reset that is system reset.
 111 */
 112void reset_cpu(ulong addr)
 113{
 114}
 115
 116/*
 117 * Board specific ethernet initialization routine.
 118 */
 119int board_eth_init(struct bd_info *bis)
 120{
 121        int rc = 0;
 122
 123        return rc;
 124}
 125
 126#ifdef CONFIG_PCI
 127void pci_init_board(void)
 128{
 129        printf("DEBUG: PCI Init TODO *****\n");
 130}
 131#endif
 132