LXR uboot/board/technexion/pico-imx6ul/pico-imx6ul.c

   1// SPDX-License-Identifier: GPL-2.0+
   2/*
   3 * Copyright (C) 2015 Technexion Ltd.
   4 *
   5 * Author: Richard Hu <richard.hu@technexion.com>
   6 */
   7
   8#include <init.h>
   9#include <net.h>
  10#include <asm/arch/clock.h>
  11#include <asm/arch/iomux.h>
  12#include <asm/arch/imx-regs.h>
  13#include <asm/arch/crm_regs.h>
  14#include <asm/arch/mx6-pins.h>
  15#include <asm/arch/sys_proto.h>
  16#include <asm/gpio.h>
  17#include <asm/mach-imx/iomux-v3.h>
  18#include <asm/io.h>
  19#include <common.h>
  20#include <miiphy.h>
  21#include <linux/delay.h>
  22#include <linux/sizes.h>
  23#include <usb.h>
  24#include <power/pmic.h>
  25#include <power/pfuze3000_pmic.h>
  26#include "../../freescale/common/pfuze.h"
  27
  28DECLARE_GLOBAL_DATA_PTR;
  29
  30#define UART_PAD_CTRL  (PAD_CTL_PKE | PAD_CTL_PUE |             \
  31        PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED |               \
  32        PAD_CTL_DSE_40ohm   | PAD_CTL_SRE_FAST  | PAD_CTL_HYS)
  33
  34#define OTG_ID_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE |            \
  35        PAD_CTL_PUS_47K_UP  | PAD_CTL_SPEED_LOW |               \
  36        PAD_CTL_DSE_80ohm   | PAD_CTL_SRE_FAST  | PAD_CTL_HYS)
  37
  38#define MDIO_PAD_CTRL  (PAD_CTL_PUS_100K_UP | PAD_CTL_PUE |     \
  39        PAD_CTL_DSE_48ohm   | PAD_CTL_SRE_FAST | PAD_CTL_ODE)
  40
  41#define LCD_PAD_CTRL    (PAD_CTL_HYS | PAD_CTL_PUS_100K_UP | PAD_CTL_PUE | \
  42        PAD_CTL_PKE | PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm)
  43
  44static int setup_fec(void)
  45{
  46        struct iomuxc *const iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR;
  47        int ret;
  48
  49        clrsetbits_le32(&iomuxc_regs->gpr[1], IOMUX_GPR1_FEC2_MASK,
  50                        IOMUX_GPR1_FEC2_CLOCK_MUX1_SEL_MASK);
  51
  52        ret = enable_fec_anatop_clock(1, ENET_50MHZ);
  53        if (ret)
  54                return ret;
  55
  56        enable_enet_clk(1);
  57
  58        return 0;
  59}
  60
  61#ifdef CONFIG_VIDEO_MXS
  62static iomux_v3_cfg_t const lcd_pads[] = {
  63        MX6_PAD_LCD_CLK__LCDIF_CLK | MUX_PAD_CTRL(LCD_PAD_CTRL),
  64        MX6_PAD_LCD_ENABLE__LCDIF_ENABLE | MUX_PAD_CTRL(LCD_PAD_CTRL),
  65        MX6_PAD_LCD_HSYNC__LCDIF_HSYNC | MUX_PAD_CTRL(LCD_PAD_CTRL),
  66        MX6_PAD_LCD_VSYNC__LCDIF_VSYNC | MUX_PAD_CTRL(LCD_PAD_CTRL),
  67        MX6_PAD_LCD_DATA00__LCDIF_DATA00 | MUX_PAD_CTRL(LCD_PAD_CTRL),
  68        MX6_PAD_LCD_DATA01__LCDIF_DATA01 | MUX_PAD_CTRL(LCD_PAD_CTRL),
  69        MX6_PAD_LCD_DATA02__LCDIF_DATA02 | MUX_PAD_CTRL(LCD_PAD_CTRL),
  70        MX6_PAD_LCD_DATA03__LCDIF_DATA03 | MUX_PAD_CTRL(LCD_PAD_CTRL),
  71        MX6_PAD_LCD_DATA04__LCDIF_DATA04 | MUX_PAD_CTRL(LCD_PAD_CTRL),
  72        MX6_PAD_LCD_DATA05__LCDIF_DATA05 | MUX_PAD_CTRL(LCD_PAD_CTRL),
  73        MX6_PAD_LCD_DATA06__LCDIF_DATA06 | MUX_PAD_CTRL(LCD_PAD_CTRL),
  74        MX6_PAD_LCD_DATA07__LCDIF_DATA07 | MUX_PAD_CTRL(LCD_PAD_CTRL),
  75        MX6_PAD_LCD_DATA08__LCDIF_DATA08 | MUX_PAD_CTRL(LCD_PAD_CTRL),
  76        MX6_PAD_LCD_DATA09__LCDIF_DATA09 | MUX_PAD_CTRL(LCD_PAD_CTRL),
  77        MX6_PAD_LCD_DATA10__LCDIF_DATA10 | MUX_PAD_CTRL(LCD_PAD_CTRL),
  78        MX6_PAD_LCD_DATA11__LCDIF_DATA11 | MUX_PAD_CTRL(LCD_PAD_CTRL),
  79        MX6_PAD_LCD_DATA12__LCDIF_DATA12 | MUX_PAD_CTRL(LCD_PAD_CTRL),
  80        MX6_PAD_LCD_DATA13__LCDIF_DATA13 | MUX_PAD_CTRL(LCD_PAD_CTRL),
  81        MX6_PAD_LCD_DATA14__LCDIF_DATA14 | MUX_PAD_CTRL(LCD_PAD_CTRL),
  82        MX6_PAD_LCD_DATA15__LCDIF_DATA15 | MUX_PAD_CTRL(LCD_PAD_CTRL),
  83        MX6_PAD_LCD_DATA16__LCDIF_DATA16 | MUX_PAD_CTRL(LCD_PAD_CTRL),
  84        MX6_PAD_LCD_DATA17__LCDIF_DATA17 | MUX_PAD_CTRL(LCD_PAD_CTRL),
  85        MX6_PAD_LCD_DATA18__LCDIF_DATA18 | MUX_PAD_CTRL(LCD_PAD_CTRL),
  86        MX6_PAD_LCD_DATA19__LCDIF_DATA19 | MUX_PAD_CTRL(LCD_PAD_CTRL),
  87        MX6_PAD_LCD_DATA20__LCDIF_DATA20 | MUX_PAD_CTRL(LCD_PAD_CTRL),
  88        MX6_PAD_LCD_DATA21__LCDIF_DATA21 | MUX_PAD_CTRL(LCD_PAD_CTRL),
  89        MX6_PAD_LCD_DATA22__LCDIF_DATA22 | MUX_PAD_CTRL(LCD_PAD_CTRL),
  90        MX6_PAD_LCD_DATA23__LCDIF_DATA23 | MUX_PAD_CTRL(LCD_PAD_CTRL),
  91        /* LCD_BLT_CTRL: GPIO for Brightness adjustment  */
  92        MX6_PAD_NAND_ALE__GPIO4_IO10 | MUX_PAD_CTRL(NO_PAD_CTRL),
  93        /* LCD_VDD_EN: LCD enabled */
  94        MX6_PAD_JTAG_TMS__GPIO1_IO11 | MUX_PAD_CTRL(NO_PAD_CTRL),
  95};
  96
  97void setup_lcd(void)
  98{
  99        imx_iomux_v3_setup_multiple_pads(lcd_pads, ARRAY_SIZE(lcd_pads));
 100        gpio_request(IMX_GPIO_NR(4, 10), "lcd_brightness");
 101        gpio_request(IMX_GPIO_NR(1, 11), "lcd_enable");
 102        /* Set Brightness to high */
 103        gpio_direction_output(IMX_GPIO_NR(4, 10) , 1);
 104        /* Set LCD enable to high */
 105        gpio_direction_output(IMX_GPIO_NR(1, 11) , 1);
 106}
 107#endif
 108
 109int board_phy_config(struct phy_device *phydev)
 110{
 111        phy_write(phydev, MDIO_DEVAD_NONE, 0x1f, 0x8190);
 112
 113        if (phydev->drv->config)
 114                phydev->drv->config(phydev);
 115
 116        return 0;
 117}
 118
 119int dram_init(void)
 120{
 121        gd->ram_size = imx_ddr_size();
 122
 123        return 0;
 124}
 125
 126static iomux_v3_cfg_t const uart6_pads[] = {
 127        MX6_PAD_CSI_MCLK__UART6_DCE_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
 128        MX6_PAD_CSI_PIXCLK__UART6_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
 129};
 130
 131#define USB_OTHERREGS_OFFSET    0x800
 132#define UCTRL_PWR_POL           (1 << 9)
 133
 134static iomux_v3_cfg_t const usb_otg_pad[] = {
 135        MX6_PAD_GPIO1_IO00__ANATOP_OTG1_ID | MUX_PAD_CTRL(OTG_ID_PAD_CTRL),
 136};
 137
 138static void setup_iomux_uart(void)
 139{
 140        imx_iomux_v3_setup_multiple_pads(uart6_pads, ARRAY_SIZE(uart6_pads));
 141}
 142
 143static void setup_usb(void)
 144{
 145        imx_iomux_v3_setup_multiple_pads(usb_otg_pad, ARRAY_SIZE(usb_otg_pad));
 146}
 147
 148int board_early_init_f(void)
 149{
 150        setup_iomux_uart();
 151
 152        return 0;
 153}
 154
 155#ifdef CONFIG_DM_PMIC
 156int power_init_board(void)
 157{
 158        struct udevice *dev;
 159        int ret, dev_id, rev_id;
 160
 161        ret = pmic_get("pfuze3000", &dev);
 162        if (ret == -ENODEV)
 163                return 0;
 164        if (ret != 0)
 165                return ret;
 166
 167        dev_id = pmic_reg_read(dev, PFUZE3000_DEVICEID);
 168        rev_id = pmic_reg_read(dev, PFUZE3000_REVID);
 169        printf("PMIC: PFUZE3000 DEV_ID=0x%x REV_ID=0x%x\n", dev_id, rev_id);
 170
 171        /* disable Low Power Mode during standby mode */
 172        pmic_reg_write(dev, PFUZE3000_LDOGCTL, 0x1);
 173
 174        /* SW1B step ramp up time from 2us to 4us/25mV */
 175        pmic_reg_write(dev, PFUZE3000_SW1BCONF, 0x40);
 176
 177        /* SW1B mode to APS/PFM */
 178        pmic_reg_write(dev, PFUZE3000_SW1BMODE, 0xc);
 179
 180        /* SW1B standby voltage set to 0.975V */
 181        pmic_reg_write(dev, PFUZE3000_SW1BSTBY, 0xb);
 182
 183        return 0;
 184}
 185#endif
 186
 187int board_usb_phy_mode(int port)
 188{
 189        if (port == 1)
 190                return USB_INIT_HOST;
 191        else
 192                return USB_INIT_DEVICE;
 193}
 194
 195int board_ehci_hcd_init(int port)
 196{
 197        u32 *usbnc_usb_ctrl;
 198
 199        if (port > 1)
 200                return -EINVAL;
 201
 202        usbnc_usb_ctrl = (u32 *)(USB_BASE_ADDR + USB_OTHERREGS_OFFSET +
 203                                 port * 4);
 204
 205        /* Set Power polarity */
 206        setbits_le32(usbnc_usb_ctrl, UCTRL_PWR_POL);
 207
 208        return 0;
 209}
 210
 211int board_init(void)
 212{
 213        /* Address of boot parameters */
 214        gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
 215
 216        setup_fec();
 217        setup_usb();
 218#ifdef CONFIG_VIDEO_MXS
 219        setup_lcd();
 220#endif
 221        return 0;
 222}
 223
 224int checkboard(void)
 225{
 226        puts("Board: PICO-IMX6UL-EMMC\n");
 227
 228        return 0;
 229}
 230