LXR uboot/include/configs/theadorable.h

   1/* SPDX-License-Identifier: GPL-2.0+ */
   2/*
   3 * Copyright (C) 2015-2016 Stefan Roese <sr@denx.de>
   4 */
   5
   6#ifndef _CONFIG_THEADORABLE_H
   7#define _CONFIG_THEADORABLE_H
   8
   9/*
  10 * High Level Configuration Options (easy to change)
  11 */
  12
  13/*
  14 * TEXT_BASE needs to be below 16MiB, since this area is scrubbed
  15 * for DDR ECC byte filling in the SPL before loading the main
  16 * U-Boot into it.
  17 */
  18#define CONFIG_SYS_TCLK         250000000       /* 250MHz */
  19
  20/*
  21 * The debugging version enables USB support via defconfig.
  22 * This version should also enable all other non-production
  23 * interfaces / features.
  24 */
  25
  26/* I2C */
  27#define CONFIG_SYS_I2C
  28#define CONFIG_SYS_I2C_MVTWSI
  29#define CONFIG_I2C_MVTWSI_BASE0         MVEBU_TWSI_BASE
  30#define CONFIG_I2C_MVTWSI_BASE1         MVEBU_TWSI1_BASE
  31#define CONFIG_SYS_I2C_SLAVE            0x0
  32#define CONFIG_SYS_I2C_SPEED            100000
  33
  34/* USB/EHCI configuration */
  35#define CONFIG_EHCI_IS_TDI
  36#define CONFIG_USB_MAX_CONTROLLER_COUNT 3
  37
  38/* Environment in SPI NOR flash */
  39
  40#define PHY_ANEG_TIMEOUT        8000    /* PHY needs a longer aneg time */
  41
  42/* Keep device tree and initrd in lower memory so the kernel can access them */
  43#define CONFIG_EXTRA_ENV_SETTINGS       \
  44        "fdt_high=0x10000000\0"         \
  45        "initrd_high=0x10000000\0"
  46
  47/* SATA support */
  48#define CONFIG_SYS_SATA_MAX_DEVICE      1
  49#define CONFIG_LBA48
  50
  51/* Enable LCD and reserve 512KB from top of memory*/
  52#define CONFIG_SYS_MEM_TOP_HIDE         0x80000
  53
  54#define CONFIG_BMP_16BPP
  55#define CONFIG_BMP_24BPP
  56#define CONFIG_BMP_32BPP
  57
  58/* FPGA programming support */
  59#define CONFIG_FPGA_STRATIX_V
  60
  61/*
  62 * Bootcounter
  63 */
  64/* Max size of RAM minus BOOTCOUNT_ADDR is the bootcounter address */
  65#define BOOTCOUNT_ADDR                  0x1000
  66
  67/*
  68 * mv-common.h should be defined after CMD configs since it used them
  69 * to enable certain macros
  70 */
  71#include "mv-common.h"
  72
  73/*
  74 * Memory layout while starting into the bin_hdr via the
  75 * BootROM:
  76 *
  77 * 0x4000.4000 - 0x4003.4000    headers space (192KiB)
  78 * 0x4000.4030                  bin_hdr start address
  79 * 0x4003.4000 - 0x4004.7c00    BootROM memory allocations (15KiB)
  80 * 0x4007.fffc                  BootROM stack top
  81 *
  82 * The address space between 0x4007.fffc and 0x400f.fff is not locked in
  83 * L2 cache thus cannot be used.
  84 */
  85
  86/* SPL */
  87/* Defines for SPL */
  88#define CONFIG_SPL_MAX_SIZE             ((128 << 10) - 0x4030)
  89
  90#define CONFIG_SPL_BSS_START_ADDR       (0x40000000 + (128 << 10))
  91#define CONFIG_SPL_BSS_MAX_SIZE         (16 << 10)
  92
  93#ifdef CONFIG_SPL_BUILD
  94#define CONFIG_SYS_MALLOC_SIMPLE
  95#endif
  96
  97#define CONFIG_SPL_STACK                (0x40000000 + ((192 - 16) << 10))
  98#define CONFIG_SPL_BOOTROM_SAVE         (CONFIG_SPL_STACK + 4)
  99
 100/* SPL related SPI defines */
 101#define CONFIG_SYS_U_BOOT_OFFS          CONFIG_SYS_SPI_U_BOOT_OFFS
 102
 103/* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */
 104#define CONFIG_DDR_FIXED_SIZE           (2 << 20)       /* 2GiB */
 105
 106#endif /* _CONFIG_THEADORABLE_H */
 107